The Experts below are selected from a list of 321 Experts worldwide ranked by ideXlab platform

Massimiliano Vasile - One of the best experts on this subject based on the ideXlab platform.

Sergei Sawitzki - One of the best experts on this subject based on the ideXlab platform.

  • FPL - Mapping a VLIW×SIMD Processor on an FPGA: Scalability and Performance
    2007 International Conference on Field Programmable Logic and Applications, 2007
    Co-Authors: Micha Nelissen, Kees Van Berkel, Sergei Sawitzki
    Abstract:

    This paper describes VPF, a VLIW SIMD processor architecture developed to demonstrate the possibilities and limitations of the modern FPGA devices with respect to vector processing. VPF is developed in a bottom-up manner, using some specific Xilinx Virtex-4 device features to achieve 200 MHz performance for vector widths up to 16 issuing one VLIW instruction per clock cycle. The Theoretical Peak performance of VPF is 1.2middot109 vector operations per second. For classical real-world DSP benchmarks around 1...3middot108 vector operations per second can be achieved.

  • Mapping a VLIW×SIMD Processor on an FPGA: Scalability and Performance
    2007 International Conference on Field Programmable Logic and Applications, 2007
    Co-Authors: Micha Nelissen, Kees Van Berkel, Sergei Sawitzki
    Abstract:

    This paper describes VPF, a VLIW SIMD processor architecture developed to demonstrate the possibilities and limitations of the modern FPGA devices with respect to vector processing. VPF is developed in a bottom-up manner, using some specific Xilinx Virtex-4 device features to achieve 200 MHz performance for vector widths up to 16 issuing one VLIW instruction per clock cycle. The Theoretical Peak performance of VPF is 1.2middot109 vector operations per second. For classical real-world DSP benchmarks around 1...3middot108 vector operations per second can be achieved.

Doru Thom Popovici - One of the best experts on this subject based on the ideXlab platform.

  • A Portable GPU Framework for SNP Comparisons
    2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2019
    Co-Authors: Elliott Binder, Doru Thom Popovici
    Abstract:

    With recent improvements in DNA sequencing technologies, the amount of genetic data available for analysis has grown rapidly. The increasing size of datasets has created a demand for high performance implementations capable of processing and analyzing data in a timely manner. In addition, rapid growth in genetic data has also led to the development of more accurate analysis techniques used in DNA forensics and law enforcement. At the heart of some analyses is the comparison of single nucleotide polymorphisms (SNPs) to detect the absence and/or presence of minor alleles, which has been shown to be similar to matrix-matrix multiplication from the domain of dense linear algebra. This similarity suggests that SNP comparison is embarrassingly parallel and may perform well on GPUs. In this paper, we present a portable GPU framework that allows us to leverage the CPU algorithm on GPUs to perform SNP comparisons. We demonstrate that with minor parameter changes to the framework, SNP comparison can be ported onto a variety of GPU platforms from both AMD and NVIDIA. In addition, we provide a model for defining the new parameters for a given GPU. Finally, we demonstrate performance portability across multiple GPU architectures where end-to-end (data transfer + computation) execution time is between 47% and 677% faster than a CPU implementation that is close to the Theoretical Peak of the CPU, and the kernel execution attains between 55% to 97% of the Theoretical Peak throughput of each specific GPU architecture.

  • IPDPS Workshops - A Portable GPU Framework for SNP Comparisons
    2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2019
    Co-Authors: Elliott Binder, Doru Thom Popovici
    Abstract:

    With recent improvements in DNA sequencing technologies, the amount of genetic data available for analysis has grown rapidly. The increasing size of datasets has created a demand for high performance implementations capable of processing and analyzing data in a timely manner. In addition, rapid growth in genetic data has also led to the development of more accurate analysis techniques used in DNA forensics and law enforcement. At the heart of some analyses is the comparison of single nucleotide polymorphisms (SNPs) to detect the absence and/or presence of minor alleles, which has been shown to be similar to matrix-matrix multiplication from the domain of dense linear algebra. This similarity suggests that SNP comparison is embarrassingly parallel and may perform well on GPUs. In this paper, we present a portable GPU framework that allows us to leverage the CPU algorithm on GPUs to perform SNP comparisons. We demonstrate that with minor parameter changes to the framework, SNP comparison can be ported onto a variety of GPU platforms from both AMD and NVIDIA. In addition, we provide a model for defining the new parameters for a given GPU. Finally, we demonstrate performance portability across multiple GPU architectures where end-to-end (data transfer + computation) execution time is between 47% and 677% faster than a CPU implementation that is close to the Theoretical Peak of the CPU, and the kernel execution attains between 55% to 97% of the Theoretical Peak throughput of each specific GPU architecture.

Michael Perrone - One of the best experts on this subject based on the ideXlab platform.

  • Multicore Surprises: Lessons Learned from Optimizing Sweep3D on the Cell Broadband Engine
    2007 IEEE International Parallel and Distributed Processing Symposium, 2007
    Co-Authors: Fabrizio Petrini, Ana Lucia Varbanescu, Gordon Fossum, Juan Fernandez, Mike Kistler, Michael Perrone
    Abstract:

    The Cell Broadband Engine (BE) processor provides the potential to achieve an impressive level of performance for scientific applications. This level of performance can be reached by exploiting several dimensions of parallelism, such as thread-level parallelism using several synergistic processing elements, data streaming parallelism, vector parallelism in the form of 128-bit SIMD operations, and pipeline parallelism by issuing multiple instructions in the same clock cycle. In our exploration to achieve the optimum level of performance for Sweep3D, we have enjoyed many pleasant surprises, such as a very high floating point performance, reaching 64% of the Theoretical Peak in double precision, and an over all performance speedup ranging from 4.5 times when compared with "heavy iron" processors, up to over 20 times with conventional processors.

Nicolas Thiry - One of the best experts on this subject based on the ideXlab platform.