The Experts below are selected from a list of 687 Experts worldwide ranked by ideXlab platform
Niel Hens - One of the best experts on this subject based on the ideXlab platform.
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improving ode integration on graphics processing units by reducing Thread Divergence
International Conference on Computational Science, 2019Co-Authors: Thomas Kovac, Tom Haber, Frank Van Reeth, Niel HensAbstract:Ordinary differential equations are widely used for the mathematical modeling of complex systems in biology and statistics. Since the analysis of such models needs to be performed using numerical integration, many applications can be gravely limited by the computational cost. This paper present a general-purpose integrator that runs massively parallel on graphics processing units. By minimizing Thread Divergence and bundling similar tasks using linear regression, execution time can be reduced by 40–80% when compared to a naive GPU implementation. Compared to a 36-core CPU implementation, a 150 fold runtime improvement is measured.
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ICCS (3) - Improving ODE Integration on Graphics Processing Units by Reducing Thread Divergence
Lecture Notes in Computer Science, 2019Co-Authors: Thomas Kovac, Tom Haber, Frank Van Reeth, Niel HensAbstract:Ordinary differential equations are widely used for the mathematical modeling of complex systems in biology and statistics. Since the analysis of such models needs to be performed using numerical integration, many applications can be gravely limited by the computational cost. This paper present a general-purpose integrator that runs massively parallel on graphics processing units. By minimizing Thread Divergence and bundling similar tasks using linear regression, execution time can be reduced by 40–80% when compared to a naive GPU implementation. Compared to a 36-core CPU implementation, a 150 fold runtime improvement is measured.
Chih-jen Sung - One of the best experts on this subject based on the ideXlab platform.
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An investigation of GPU-based stiff chemical kinetics integration methods
Combustion and Flame, 2017Co-Authors: Nicholas Curtis, Kyle E. Niemeyer, Chih-jen SungAbstract:Abstract A fifth-order implicit Runge–Kutta method and two fourth-order exponential integration methods equipped with Krylov subspace approximations were implemented for the GPU and paired with the analytical chemical kinetic Jacobian software pyJac . The performance of each algorithm was evaluated by integrating thermochemical state data sampled from stochastic partially stirred reactor simulations and compared with the commonly used CPU-based implicit integrator CVODE . We estimated that the implicit Runge–Kutta method running on a single Tesla C2075 GPU is equivalent to CVODE running on 12–38 Intel Xeon E5-4640 v2 CPU cores for integration of a single global integration time step of 10 − 6 s with hydrogen and methane kinetic models. In the stiffest case studied—the methane model with a global integration time step of 10 − 4 s —Thread Divergence and higher memory traffic significantly decreased GPU performance to the equivalent of CVODE running on approximately three CPU cores. The exponential integration algorithms performed more slowly than the implicit integrators on both the CPU and GPU. Thread Divergence and memory traffic were identified as the main limiters of GPU integrator performance, and techniques to mitigate these issues were discussed. Use of a finite-difference Jacobian on the GPU—in place of the analytical Jacobian provided by pyJac —greatly decreased integrator performance due to Thread Divergence, resulting in maximum slowdowns of 7.11 − 240.96 × ; in comparison, the corresponding slowdowns on the CPU were just 1.39 − 2.61 × , underscoring the importance of use of an analytical Jacobian for efficient GPU integration. Finally, future research directions for working towards enabling realistic chemistry in reactive-flow simulations via GPU/SIMT accelerated stiff chemical kinetics integration were identified.
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Numerical Computations with GPUs - GPU-Based Parallel Integration of Large Numbers of Independent ODE Systems
Numerical Computations with GPUs, 2014Co-Authors: Kyle E. Niemeyer, Chih-jen SungAbstract:The task of integrating a large number of independent ODE systems arises in various scientific and engineering areas. For nonstiff systems, common explicit integration algorithms can be used on GPUs, where individual GPU Threads concurrently integrate independent ODEs with different initial conditions or parameters. One example is the fifth-order adaptive Runge–Kutta–Cash–Karp (RKCK) algorithm. In the case of stiff ODEs, standard explicit algorithms require impractically small time-step sizes for stability reasons, and implicit algorithms are therefore commonly used instead to allow larger time steps and reduce the computational expense. However, typical high-order implicit algorithms based on backwards differentiation formulae (e.g., VODE, LSODE) involve complex logical flow that causes severe Thread Divergence when implemented on GPUs, limiting the performance. Therefore, alternate algorithms are needed. A GPU-based Runge–Kutta–Chebyshev (RKC) algorithm can handle moderate levels of stiffness and performs significantly faster than not only an equivalent CPU version but also a CPU-based implicit algorithm (VODE) based on results shown in the literature. In this chapter, we present the mathematical background, implementation details, and source code for the RKCK and RKC algorithms for use integrating large numbers of independent systems of ODEs on GPUs. In addition, brief performance comparisons are shown for each algorithm, demonstrating the potential benefit of moving to GPU-based ODE integrators.
Xipeng Shen - One of the best experts on this subject based on the ideXlab platform.
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streamlining gpu applications on the fly Thread Divergence elimination through runtime Thread data remapping
International Conference on Supercomputing, 2010Co-Authors: Eddy Z Zhang, Yunlian Jiang, Ziyu Guo, Xipeng ShenAbstract:Because of their tremendous computing power and remarkable cost efficiency, GPUs (graphic processing unit) have quickly emerged as a kind of influential platform for high performance computing. However, as GPUs are designed for massive data-parallel computing, their performance is subject to the presence of condition statements in a GPU application. On a conditional branch where Threads diverge in which path to take, the Threads taking different paths have to run serially. Such Divergences often cause serious performance degradations, impairing the adoption of GPU for many applications that contain non-trivial branches or certain types of loops. This paper presents a systematic investigation in the employment of runtime Thread-data remapping for solving that problem. It introduces an abstract form of GPU applications, based on which, it describes the use of reference redirection and data layout transformation for remapping data and Threads to minimize Thread Divergences. It discusses the major challenges for practical deployment of the remapping techniques, most notably, the conflict between the large remapping overhead and the need for the remapping to happen on the fly because of the dependence of Thread Divergences on runtime values. It offers a solution to the challenge by proposing a CPU-GPU pipelining scheme and a label-assign-move (LAM) algorithm to virtually hide all the remapping overhead. At the end, it reports significant performance improvement produced by the remapping for a set of GPU applications, demonstrating the potential of the techniques for streamlining GPU applications on the fly.
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ICS - Streamlining GPU applications on the fly: Thread Divergence elimination through runtime Thread-data remapping
Proceedings of the 24th ACM International Conference on Supercomputing - ICS '10, 2010Co-Authors: Eddy Z Zhang, Yunlian Jiang, Ziyu Guo, Xipeng ShenAbstract:Because of their tremendous computing power and remarkable cost efficiency, GPUs (graphic processing unit) have quickly emerged as a kind of influential platform for high performance computing. However, as GPUs are designed for massive data-parallel computing, their performance is subject to the presence of condition statements in a GPU application. On a conditional branch where Threads diverge in which path to take, the Threads taking different paths have to run serially. Such Divergences often cause serious performance degradations, impairing the adoption of GPU for many applications that contain non-trivial branches or certain types of loops. This paper presents a systematic investigation in the employment of runtime Thread-data remapping for solving that problem. It introduces an abstract form of GPU applications, based on which, it describes the use of reference redirection and data layout transformation for remapping data and Threads to minimize Thread Divergences. It discusses the major challenges for practical deployment of the remapping techniques, most notably, the conflict between the large remapping overhead and the need for the remapping to happen on the fly because of the dependence of Thread Divergences on runtime values. It offers a solution to the challenge by proposing a CPU-GPU pipelining scheme and a label-assign-move (LAM) algorithm to virtually hide all the remapping overhead. At the end, it reports significant performance improvement produced by the remapping for a set of GPU applications, demonstrating the potential of the techniques for streamlining GPU applications on the fly.
Nouredine Melab - One of the best experts on this subject based on the ideXlab platform.
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Many-core Branch-and-Bound for GPU accelerators and MIC coprocessors
2019Co-Authors: Nouredine Melab, Jan Gmys, Mohand Mezmaz, Daniel TuyttensAbstract:Coprocessors are increasingly becoming key building blocks of High Performance Computing platforms. These many-core energy-efficient devices boost the performance of traditional processors. On the other hand, Branch-and-Bound (B&B) algorithms are tree-based exact methods for solving to optimality combinatorial optimization problems (COPs). Solving large COPs results in the generation of a very large pool of subproblems and the evaluation of their associated lower bounds. Generating and evaluating those subproblems on coprocessors raises several issues including processor-coprocessor data transfer optimization, vectorization, Thread Divergence, and so on. In this paper, we investigate the offload-based parallel design and implementation of B&B algorithms for coprocessors addressing these issues. Two major many-core architectures are considered and compared: Nvidia GPU and Intel MIC. The proposed approaches have been experimented using the Flow-Shop scheduling problem and two hardware configurations equivalent in terms of energy consumption: Nvidia Tesla K40 and Intel Xeon Phi 5110P. The reported results show that the GPU-accelerated approach outperforms the MIC offload-based one even in its vectorized version. Moreover, vectorization improves the efficiency of the MIC offload-based approach with a factor of two.
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High-Performance Simulation-Based Optimization - Many-Core Branch-and-Bound for GPU Accelerators and MIC Coprocessors
High-Performance Simulation-Based Optimization, 2019Co-Authors: Nouredine Melab, Jan Gmys, Mohand Mezmaz, Daniel TuyttensAbstract:Coprocessors are increasingly becoming key building blocks of High Performance Computing platforms. These many-core energy-efficient devices boost the performance of traditional processors. On the other hand, Branch-and-Bound (B&B) algorithms are tree-based exact methods for solving to optimality combinatorial optimization problems (COPs). Solving large COPs results in the generation of a very large pool of subproblems and the evaluation of their associated lower bounds. Generating and evaluating those subproblems on coprocessors raises several issues including processor-coprocessor data transfer optimization, vectorization, Thread Divergence, and so on. In this paper, we investigate the offload-based parallel design and implementation of B&B algorithms for coprocessors addressing these issues. Two major many-core architectures are considered and compared: Nvidia GPU and Intel MIC. The proposed approaches have been experimented using the Flow-Shop scheduling problem and two hardware configurations equivalent in terms of energy consumption: Nvidia Tesla K40 and Intel Xeon Phi 5110P. The reported results show that the GPU-accelerated approach outperforms the MIC offload-based one even in its vectorized version. Moreover, vectorization improves the efficiency of the MIC offload-based approach with a factor of two.
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A GPU-based Branch-and-Bound algorithm using Integer-Vector-Matrix data structure
Parallel Computing, 2016Co-Authors: Jan Gmys, Nouredine Melab, Mohand Mezmaz, Daniel TuyttensAbstract:Branch-and-Bound (B&B) algorithms are tree-based exploratory methods for solving combinatorial optimization problems exactly to optimality. These problems are often large in size and known to be NP-hard to solve. The construction and exploration of the B&B-tree are performed using four operators: branching, bounding, selection and pruning. Such algorithms are irregular which makes their parallel design and implementation on GPU challenging. Existing GPU-accelerated B&B algorithms perform only a part of the algorithm on the GPU and rely on the transfer of pools of subproblems across the PCI Express bus to the device. To the best of our knowledge, the algorithm presented in this paper is the first GPU-based B&B algorithm that performs all four operators on the device and subsequently avoids the data transfer bottleneck between CPU and GPU. The implementation on GPU is based on the Integer-Vector-Matrix (IVM) data structure which is used instead of a conventional linked-list to store and manage the pool of subproblems. This paper revisits the IVM-based B&B algorithm on the GPU, addressing the irregularity of the algorithm in terms of workload, memory access patterns and control flow. In particular, the focus is put on reducing Thread Divergence by making a judicious choice for the mapping of Threads onto the data. Compared to a GPU-accelerated B&B based on a linked-list, the algorithm presented in this paper solves a set of standard flowshop instances on average 3.3 times faster.
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branch-and-bound algorithm
2015Co-Authors: Imen Chakroun, Nouredine Melab, Mohand Mezmaz, Ahcène BendjoudiAbstract:Reducing Thread Divergence in a GPU-accelerate
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reducing Thread Divergence in a gpu accelerated branch and bound algorithm
Concurrency and Computation: Practice and Experience, 2013Co-Authors: Imen Chakroun, Nouredine Melab, Mohand Mezmaz, Ahcène BendjoudiAbstract:SUMMARY In this paper, we address the design and implementation of GPU-accelerated Branch-and-Bound algorithms (B&B) for solving Flow-shop scheduling optimization problems (FSP). Such applications are CPU-time consuming and highly irregular. On the other hand, GPUs are massively multi-Threaded accelerators using the SIMD model at execution. A major issue which arises when executing on GPU a B&B applied to FSP is Thread or branch Divergence. Such Divergence is caused by the lower bound function of FSP which contains many irregular loops and conditional instructions. Our challenge is therefore to revisit the design and implementation of B&B applied to FSP dealing with Thread Divergence. Extensive experiments of the proposed approach have been carried out on well-known FSP benchmarks using an Nvidia Tesla C2050 GPU card. Compared to a CPU-based execution, accelerations up to 77.46 are achieved for large problem instances. Copyright c 2010 John Wiley & Sons, Ltd. Received ...
Thomas Kovac - One of the best experts on this subject based on the ideXlab platform.
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improving ode integration on graphics processing units by reducing Thread Divergence
International Conference on Computational Science, 2019Co-Authors: Thomas Kovac, Tom Haber, Frank Van Reeth, Niel HensAbstract:Ordinary differential equations are widely used for the mathematical modeling of complex systems in biology and statistics. Since the analysis of such models needs to be performed using numerical integration, many applications can be gravely limited by the computational cost. This paper present a general-purpose integrator that runs massively parallel on graphics processing units. By minimizing Thread Divergence and bundling similar tasks using linear regression, execution time can be reduced by 40–80% when compared to a naive GPU implementation. Compared to a 36-core CPU implementation, a 150 fold runtime improvement is measured.
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ICCS (3) - Improving ODE Integration on Graphics Processing Units by Reducing Thread Divergence
Lecture Notes in Computer Science, 2019Co-Authors: Thomas Kovac, Tom Haber, Frank Van Reeth, Niel HensAbstract:Ordinary differential equations are widely used for the mathematical modeling of complex systems in biology and statistics. Since the analysis of such models needs to be performed using numerical integration, many applications can be gravely limited by the computational cost. This paper present a general-purpose integrator that runs massively parallel on graphics processing units. By minimizing Thread Divergence and bundling similar tasks using linear regression, execution time can be reduced by 40–80% when compared to a naive GPU implementation. Compared to a 36-core CPU implementation, a 150 fold runtime improvement is measured.