The Experts below are selected from a list of 279 Experts worldwide ranked by ideXlab platform
Emmanuel C. Tatakis - One of the best experts on this subject based on the ideXlab platform.
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optimal design of a half wave cockcroft walton voltage multiplier with minimum Total Capacitance
IEEE Transactions on Power Electronics, 2010Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:Even though the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) is one of the most common ac-dc step-up topologies, VM designers tend to use equal Capacitances in every stage, a fact that leads to a nonoptimal design. The aim of this paper is to introduce a new design method of H-W C-W VM that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum Total Capacitance value. For this purpose, an adequate choice of the Capacitance values per stage is considered, leading to the investigation of four different cases. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
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Optimal Design of a Half-Wave Cockcroft–Walton Voltage Multiplier With Minimum Total Capacitance
IEEE Transactions on Power Electronics, 2010Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:Even though the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) is one of the most common ac-dc step-up topologies, VM designers tend to use equal Capacitances in every stage, a fact that leads to a nonoptimal design. The aim of this paper is to introduce a new design method of H-W C-W VM that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum Total Capacitance value. For this purpose, an adequate choice of the Capacitance values per stage is considered, leading to the investigation of four different cases. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
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Optimal design of a Half-Wave Cockroft-Walton Voltage Multiplier with minimum Total Capacitance
2008 IEEE Power Electronics Specialists Conference, 2008Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:The half-wave Cockroft-Walton voltage multiplier (H-W C-W VM) is one of the most common AC-DC step-up topologies, known for its large voltage gain and its high efficiency. However, over the worldwide bibliography, the most of H-W C-W VM designers persist in using equal Capacitances in every stage without considering an optimal design. The aim of this paper is to introduce a new designing method of H-W C-W VM that lays both on the choice of the adequate Capacitance values to minimize the output voltage drop and ripple (so the voltage gain is maximized) as well as the calculation of the optimal number of stages that is necessary to produce the desired output voltage with the minimum Total Capacitance. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
Wen-long Ming - One of the best experts on this subject based on the ideXlab platform.
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Beijing Converters: Bridge Converters With a Capacitor Added to Reduce Leakage Currents, DC-Bus Voltage Ripples, and Total Capacitance Required
IEEE Transactions on Industrial Electronics, 2017Co-Authors: Qing-chang Zhong, Wen-long Ming, Wanxin Sheng, Yongsheng ZhaoAbstract:Isolation transformers and bulky electrolytic capacitors are often used in power electronic converters to reduce leakage currents and voltage ripples but this leads to low power density and reduced reliability. In this paper, an auxiliary capacitor is added to the widely used conventional full-bridge converter to provide a path for, and hence significantly reduce, the leakage current. The operation of the full-bridge converter is split into the operation of a half-bridge converter and a dc–dc converter so that the ripple energy can be diverted from the dc-bus capacitor to the auxiliary capacitor. Hence, the dc-bus capacitor can be significantly reduced while maintaining very low voltage ripples on the dc bus because it is only required to filter out switching ripples. The auxiliary capacitor is designed to allow high voltage ripples because its voltage is not supplied to any load. Accordingly, the auxiliary capacitor can also be very small as well. As a result, the Total required Capacitance becomes very small. The reduction ratio of the Total Capacitance is significant, which makes it cost-effective to use film capacitors instead of electrolytic capacitors. The proposed converters can be also operated as an inverter without any restriction on power factor because the adopted four switches are all bidirectional in terms of power flow. Experimental results for both rectification and inversion modes are presented to demonstrate the performance of the proposed converter in reducing the ripples, the leakage currents, and the Total Capacitance needed, with comparison to the conventional bridge converter without the auxiliary capacitor.
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A $\theta$ -Converter That Reduces Common Mode Currents, Output Voltage Ripples, and Total Capacitance Required
IEEE Transactions on Power Electronics, 2016Co-Authors: Qing-chang Zhong, Wen-long MingAbstract:In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$ -converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its Capacitance. Hence, the Total Capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter.
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a theta converter that reduces common mode currents output voltage ripples and Total Capacitance required
IEEE Transactions on Power Electronics, 2016Co-Authors: Qing-chang Zhong, Wen-long MingAbstract:In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$ -converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its Capacitance. Hence, the Total Capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter.
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Ripple Eliminator to Smooth DC-Bus Voltage and Reduce the Total Capacitance Required
IEEE Transactions on Industrial Electronics, 2015Co-Authors: Xin Cao, Qing-chang Zhong, Wen-long MingAbstract:Bulky electrolytic capacitors, which are often needed in dc systems to filter out voltage ripples, considerably reduce power density and system reliability. In this paper, a ripple eliminator, which is a bidirectional buck-boost converter terminated with an auxiliary capacitor, is adopted to replace bulky capacitors in dc systems. The voltage ripples on the terminals (i.e., the dc bus) can be transferred to the auxiliary capacitor, and the ripples on the auxiliary capacitor can vary in a wide range. Moreover, the average voltage of the auxiliary capacitor can be controlled either lower or higher than the dc-bus voltage, which offers a wide operational range for the ripple eliminator and also the possibility of further reducing the auxiliary Capacitance. Hence, the Total Capacitance required can be much smaller than the originally needed. After proposing a control strategy to transfer the voltage ripples to the auxiliary capacitor, three control strategies are proposed to regulate the auxiliary-capacitor voltage to maintain proper operation. Intensive experimental results are presented to demonstrate the performance.
Ioannis C Kobougias - One of the best experts on this subject based on the ideXlab platform.
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optimal design of a half wave cockcroft walton voltage multiplier with minimum Total Capacitance
IEEE Transactions on Power Electronics, 2010Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:Even though the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) is one of the most common ac-dc step-up topologies, VM designers tend to use equal Capacitances in every stage, a fact that leads to a nonoptimal design. The aim of this paper is to introduce a new design method of H-W C-W VM that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum Total Capacitance value. For this purpose, an adequate choice of the Capacitance values per stage is considered, leading to the investigation of four different cases. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
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Optimal Design of a Half-Wave Cockcroft–Walton Voltage Multiplier With Minimum Total Capacitance
IEEE Transactions on Power Electronics, 2010Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:Even though the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) is one of the most common ac-dc step-up topologies, VM designers tend to use equal Capacitances in every stage, a fact that leads to a nonoptimal design. The aim of this paper is to introduce a new design method of H-W C-W VM that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum Total Capacitance value. For this purpose, an adequate choice of the Capacitance values per stage is considered, leading to the investigation of four different cases. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
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Optimal design of a Half-Wave Cockroft-Walton Voltage Multiplier with minimum Total Capacitance
2008 IEEE Power Electronics Specialists Conference, 2008Co-Authors: Ioannis C Kobougias, Emmanuel C. TatakisAbstract:The half-wave Cockroft-Walton voltage multiplier (H-W C-W VM) is one of the most common AC-DC step-up topologies, known for its large voltage gain and its high efficiency. However, over the worldwide bibliography, the most of H-W C-W VM designers persist in using equal Capacitances in every stage without considering an optimal design. The aim of this paper is to introduce a new designing method of H-W C-W VM that lays both on the choice of the adequate Capacitance values to minimize the output voltage drop and ripple (so the voltage gain is maximized) as well as the calculation of the optimal number of stages that is necessary to produce the desired output voltage with the minimum Total Capacitance. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.
Qing-chang Zhong - One of the best experts on this subject based on the ideXlab platform.
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Beijing Converters: Bridge Converters With a Capacitor Added to Reduce Leakage Currents, DC-Bus Voltage Ripples, and Total Capacitance Required
IEEE Transactions on Industrial Electronics, 2017Co-Authors: Qing-chang Zhong, Wen-long Ming, Wanxin Sheng, Yongsheng ZhaoAbstract:Isolation transformers and bulky electrolytic capacitors are often used in power electronic converters to reduce leakage currents and voltage ripples but this leads to low power density and reduced reliability. In this paper, an auxiliary capacitor is added to the widely used conventional full-bridge converter to provide a path for, and hence significantly reduce, the leakage current. The operation of the full-bridge converter is split into the operation of a half-bridge converter and a dc–dc converter so that the ripple energy can be diverted from the dc-bus capacitor to the auxiliary capacitor. Hence, the dc-bus capacitor can be significantly reduced while maintaining very low voltage ripples on the dc bus because it is only required to filter out switching ripples. The auxiliary capacitor is designed to allow high voltage ripples because its voltage is not supplied to any load. Accordingly, the auxiliary capacitor can also be very small as well. As a result, the Total required Capacitance becomes very small. The reduction ratio of the Total Capacitance is significant, which makes it cost-effective to use film capacitors instead of electrolytic capacitors. The proposed converters can be also operated as an inverter without any restriction on power factor because the adopted four switches are all bidirectional in terms of power flow. Experimental results for both rectification and inversion modes are presented to demonstrate the performance of the proposed converter in reducing the ripples, the leakage currents, and the Total Capacitance needed, with comparison to the conventional bridge converter without the auxiliary capacitor.
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A $\theta$ -Converter That Reduces Common Mode Currents, Output Voltage Ripples, and Total Capacitance Required
IEEE Transactions on Power Electronics, 2016Co-Authors: Qing-chang Zhong, Wen-long MingAbstract:In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$ -converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its Capacitance. Hence, the Total Capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter.
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a theta converter that reduces common mode currents output voltage ripples and Total Capacitance required
IEEE Transactions on Power Electronics, 2016Co-Authors: Qing-chang Zhong, Wen-long MingAbstract:In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$ -converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its Capacitance. Hence, the Total Capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter.
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Ripple Eliminator to Smooth DC-Bus Voltage and Reduce the Total Capacitance Required
IEEE Transactions on Industrial Electronics, 2015Co-Authors: Xin Cao, Qing-chang Zhong, Wen-long MingAbstract:Bulky electrolytic capacitors, which are often needed in dc systems to filter out voltage ripples, considerably reduce power density and system reliability. In this paper, a ripple eliminator, which is a bidirectional buck-boost converter terminated with an auxiliary capacitor, is adopted to replace bulky capacitors in dc systems. The voltage ripples on the terminals (i.e., the dc bus) can be transferred to the auxiliary capacitor, and the ripples on the auxiliary capacitor can vary in a wide range. Moreover, the average voltage of the auxiliary capacitor can be controlled either lower or higher than the dc-bus voltage, which offers a wide operational range for the ripple eliminator and also the possibility of further reducing the auxiliary Capacitance. Hence, the Total Capacitance required can be much smaller than the originally needed. After proposing a control strategy to transfer the voltage ripples to the auxiliary capacitor, three control strategies are proposed to regulate the auxiliary-capacitor voltage to maintain proper operation. Intensive experimental results are presented to demonstrate the performance.
De-en Jiang - One of the best experts on this subject based on the ideXlab platform.
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Contribution of Dielectric Screening to the Total Capacitance of Few-Layer Graphene Electrodes.
The journal of physical chemistry letters, 2016Co-Authors: Cheng Zhan, De-en JiangAbstract:We apply joint density functional theory (JDFT), which treats the electrode/electrolyte interface self-consistently, to an electric double-layer capacitor (EDLC) based on few-layer graphene electrodes. The JDFT approach allows us to quantify a third contribution to the Total Capacitance beyond quantum Capacitance (CQ) and EDL Capacitance (CEDL). This contribution arises from the dielectric screening of the electric field by the surface of the few-layer graphene electrode, and we therefore term it the dielectric Capacitance (CDielec). We find that CDielec becomes significant in affecting the Total Capacitance when the number of graphene layers in the electrode is more than three. Our investigation sheds new light on the significance of the electrode dielectric screening on the Capacitance of few-layer graphene electrodes.
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Enhancing graphene Capacitance by nitrogen: effects of doping configuration and concentration
Physical chemistry chemical physics : PCCP, 2016Co-Authors: Cheng Zhan, Yu Zhang, Peter T. Cummings, De-en JiangAbstract:Recent experiments have shown that nitrogen doping enhances Capacitance in carbon electrode supercapacitors. However, a detailed study of the effect of N-doping on Capacitance is still lacking. In this paper, we study the doping concentration and the configuration effect on the electric double-layer (EDL) Capacitance, quantum Capacitance, and Total Capacitance. It is found that pyridinic and graphitic nitrogens can increase the Total Capacitance by increasing quantum Capacitance, but pyrrolic configuration limits the Total Capacitance due to its much lower quantum Capacitance than the other two configurations. We also find that, unlike the graphitic and pyridinic nitrogens, the pyrrolic configuration's quantum Capacitance does not depend on the nitrogen concentration, which may explain why some Capacitance versus voltage measurements of N-doped graphene exhibit a V-shaped curve similar to that of undoped graphene. Our investigation provides a deeper understanding of the Capacitance enhancement of the N-doping effect in carbon electrodes and suggests a potentially effective way to optimize the Capacitance by controlling the type of N-doping.
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Quantum Effects on the Capacitance of Graphene-Based Electrodes
The Journal of Physical Chemistry C, 2015Co-Authors: Cheng Zhan, Justin N. Neal, De-en JiangAbstract:Quantum Capacitance has been recently measured for electric double layers (EDL) at electrolyte/graphene interfaces. However, the importance of quantum Capacitance in realistic carbon electrodes is not clear. Toward understanding that from a theoretical perspective, here we studied the quantum Capacitance and Total Capacitance of graphene electrodes as a function of the number of graphene layers. The quantum Capacitance was obtained from electronic density functional theory based on fixed band approximation with an implicit solvation model, while the EDL Capacitances were from classical density functional theory. We found that quantum Capacitance plays a dominant role in Total Capacitance of the single-layer graphene both in aqueous and ionic-liquid electrolytes but the contribution decreases as the number of graphene layers increases. The Total integral Capacitance roughly levels off and is dominated by the EDL Capacitance beyond about four graphene layers. Because many porous carbons have nanopores with ...