The Experts below are selected from a list of 1422 Experts worldwide ranked by ideXlab platform

Osman Demirci - One of the best experts on this subject based on the ideXlab platform.

  • fuzzy logic based smart Traffic Light simulator design and hardware implementation
    Applied Soft Computing, 2010
    Co-Authors: Cihan Karakuzu, Osman Demirci
    Abstract:

    The objective of this study is to develop fuzzy logic based Traffic junction Light simulator system for design and smart Traffic junction Light Controller purposes and also to observe its performance. Traffic junction simulator hardware is developed to overcome difficulties of working in a real environment and to easily test the performance of the Controller. By using the Traffic Light simulator developed in this study, results of constant duration (conventional) Traffic Light Controller and fuzzy logic based Traffic Light Controller are compared where the vehicle inputs are supplied by the simulator. Statistical experimental results obtained from the implemented simulator show that the fuzzy logic Traffic Light Controller dramatically reduced the waiting time at red Lights since the Controller adapts itself according to Traffic density. It is obvious that the intelligent Light Controller is going to provide important advantages in terms of economics and environment.

Cihan Karakuzu - One of the best experts on this subject based on the ideXlab platform.

  • fuzzy logic based smart Traffic Light simulator design and hardware implementation
    Applied Soft Computing, 2010
    Co-Authors: Cihan Karakuzu, Osman Demirci
    Abstract:

    The objective of this study is to develop fuzzy logic based Traffic junction Light simulator system for design and smart Traffic junction Light Controller purposes and also to observe its performance. Traffic junction simulator hardware is developed to overcome difficulties of working in a real environment and to easily test the performance of the Controller. By using the Traffic Light simulator developed in this study, results of constant duration (conventional) Traffic Light Controller and fuzzy logic based Traffic Light Controller are compared where the vehicle inputs are supplied by the simulator. Statistical experimental results obtained from the implemented simulator show that the fuzzy logic Traffic Light Controller dramatically reduced the waiting time at red Lights since the Controller adapts itself according to Traffic density. It is obvious that the intelligent Light Controller is going to provide important advantages in terms of economics and environment.

Belli Fevzi - One of the best experts on this subject based on the ideXlab platform.

  • Regular expression based test sequence generation for HDL program validation
    'Institute of Electrical and Electronics Engineers (IEEE)', 2018
    Co-Authors: Kılınççeker Onur, Türk Ercüment, Challenger Moharram, Belli Fevzi
    Abstract:

    18th IEEE International Conference on Software Quality, Reliability, and Security Companion, QRS-C 2018; Lisbon; Portugal; 16 July 2018 through 20 July 2018This paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence generation problem is simplified to the tree traversal algorithm in which symbol and operator coverage criteria are satisfied. The required tools for test sequence generation are provided to automatize the whole procedure of the proposed approach. Also, a running example, based on a real-life-like Traffic Light Controller (TLC), validates the proposed approach and analyzes its characteristic features

  • Regular Expression Based Test Sequence Generation for HDL Program Validation
    'Institute of Electrical and Electronics Engineers (IEEE)', 2018
    Co-Authors: Kılınççeker Onur, Türk Ercüment, Challenger Moharram, Belli Fevzi
    Abstract:

    18th IEEE International Conference on Software Quality, Reliability and Security Companion (QRS-C) -- JUL 16-20, 2018 -- Lisbon, PORTUGALWOS: 000449555600090This paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence generation problem is simplified to the tree traversal algorithm in which symbol and operator coverage criteria are satisfied. The required tools for test sequence generation are provided to automatize the whole procedure of the proposed approach. Also, a running example, based on a real-life-like Traffic Light Controller (TLC), validates the proposed approach and analyzes its characteristic features.IEEE, IEEE Comp Soc, IEEE Reliabil So

Van Senden Jancees - One of the best experts on this subject based on the ideXlab platform.

  • DIRECTOR: Enabling advanced driver assistance systems with predictive signalized intersection control using LSTM networks: An AI approach to signalized intersection control
    2018
    Co-Authors: Van Senden Jancees
    Abstract:

    Traffic congestion at signalized intersections is a big economical and ecological problem. Handcrafted Traffic Light Controllers (TLCs) are currently used to minimize the impact, but they are expensive to design and maintain and their performance degrades over time. Predictive TLCs and advanced driver assistance systems (ADAS) form a potential solution but are still unfeasible in practice today because of their computational complexity and unpredictability.The distributed predictive TLC developed in this thesis, called DIRECTOR, is feasible and enables time to green/red and green Light optimal speed advice (GLOSA) systems. DIRECTOR utilizes predictions of the arriving Traffic flows and a model of the current queue length to optimize the Traffic Light schedule. It can operate in two modes; Ad-hoc mode, where the schedule is generated and applied right away, and fixed-ahead mode, where the schedule is fixed in advance to enable ADAS. DIRECTOR's design makes it scalable and suitable for live learning, eliminating the need for expensive (re)calibrations and improving its performance with more and better data, which will become available in the near future.A long short-term memory recurrent neural network is developed to predict the arriving Traffic flows. On a case study this network proves to be on average 4.7% more accurate than the current state-of-the-art model, which is significant for a Controller's performance.Simulations of the same case study intersection, which is currently equipped with a state-of-the-art actuated Controller with green wave coordination, show that in ad-hoc mode DIRECTOR performs similar to the current Controller. DIRECTOR reduces the average delay per vehicle by 1% (from 10.4s to 10.3s) at the cost of an increase of 15% in the average number of stops per vehicle (from 0.40 to 0.46) compared to the current Controller. Simulations with ideal predictions show that, in ad-hoc mode, DIRECTOR has the potential to improve the average delay by 8.7% (from 10.4s to 9.5s) while keeping the number of stops equal (at 0.40).Simulations with GLOSA show a 30% reduction in the average number ofstops at the cost of a 13% increase of the travel time compared to the ad-hoc mode. Combining this with ideal predictions shows that DIRECTOR infixed-ahead mode has the potential to keep the average delay equal compared to the current Controller, which will greatly improve Traffic flow.Compared to a more typical Dutch actuated Controller, DIRECTOR achievesa delay reduction of 39% in ad-hoc mode and 23% in fixed-ahead mode.Overall, DIRECTOR is a new data-driven Traffic Light Controller that isrelatively easy to set up, reduces costs, can enable advanced driver assistance systems, is futureproof and has the potential to greatly improve Traffic flow.Embedded System

  • DIRECTOR: Enabling advanced driver assistance systems with predictive signalized intersection control using LSTM networks: An AI approach to signalized intersection control
    2018
    Co-Authors: Van Senden Jancees
    Abstract:

    Traffic congestion at signalized intersections is a big economical and ecological problem. Handcrafted Traffic Light Controllers (TLCs) are currently used to minimize the impact, but they are expensive to design and maintain and their performance degrades over time. Predictive TLCs and advanced driver assistance systems (ADAS) form a potential solution but are still unfeasible in practice today because of their computational complexity and unpredictability.The distributed predictive TLC developed in this thesis, called DIRECTOR, is feasible and enables time to green/red and green Light optimal speed advice (GLOSA) systems. DIRECTOR utilizes predictions of the arriving Traffic flows and a model of the current queue length to optimize the Traffic Light schedule. It can operate in two modes; Ad-hoc mode, where the schedule is generated and applied right away, and fixed-ahead mode, where the schedule is fixed in advance to enable ADAS. DIRECTOR's design makes it scalable and suitable for live learning, eliminating the need for expensive (re)calibrations and improving its performance with more and better data, which will become available in the near future.A long short-term memory recurrent neural network is developed to predict the arriving Traffic flows. On a case study this network proves to be on average 4.7% more accurate than the current state-of-the-art model, which is significant for a Controller's performance.Simulations of the same case study intersection, which is currently equipped with a state-of-the-art actuated Controller with green wave coordination, show that in ad-hoc mode DIRECTOR performs similar to the current Controller. DIRECTOR reduces the average delay per vehicle by 1% (from 10.4s to 10.3s) at the cost of an increase of 15% in the average number of stops per vehicle (from 0.40 to 0.46) compared to the current Controller. Simulations with ideal predictions show that, in ad-hoc mode, DIRECTOR has the potential to improve the average delay by 8.7% (from 10.4s to 9.5s) while keeping the number of stops equal (at 0.40).Simulations with GLOSA show a 30% reduction in the average number ofstops at the cost of a 13% increase of the travel time compared to the ad-hoc mode. Combining this with ideal predictions shows that DIRECTOR infixed-ahead mode has the potential to keep the average delay equal compared to the current Controller, which will greatly improve Traffic flow.Compared to a more typical Dutch actuated Controller, DIRECTOR achievesa delay reduction of 39% in ad-hoc mode and 23% in fixed-ahead mode.Overall, DIRECTOR is a new data-driven Traffic Light Controller that isrelatively easy to set up, reduces costs, can enable advanced driver assistance systems, is futureproof and has the potential to greatly improve Traffic flow.Electrical Engineer | Embedded System

Kılınççeker Onur - One of the best experts on this subject based on the ideXlab platform.

  • Regular expression based test sequence generation for HDL program validation
    'Institute of Electrical and Electronics Engineers (IEEE)', 2018
    Co-Authors: Kılınççeker Onur, Türk Ercüment, Challenger Moharram, Belli Fevzi
    Abstract:

    18th IEEE International Conference on Software Quality, Reliability, and Security Companion, QRS-C 2018; Lisbon; Portugal; 16 July 2018 through 20 July 2018This paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence generation problem is simplified to the tree traversal algorithm in which symbol and operator coverage criteria are satisfied. The required tools for test sequence generation are provided to automatize the whole procedure of the proposed approach. Also, a running example, based on a real-life-like Traffic Light Controller (TLC), validates the proposed approach and analyzes its characteristic features

  • Regular Expression Based Test Sequence Generation for HDL Program Validation
    'Institute of Electrical and Electronics Engineers (IEEE)', 2018
    Co-Authors: Kılınççeker Onur, Türk Ercüment, Challenger Moharram, Belli Fevzi
    Abstract:

    18th IEEE International Conference on Software Quality, Reliability and Security Companion (QRS-C) -- JUL 16-20, 2018 -- Lisbon, PORTUGALWOS: 000449555600090This paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence generation problem is simplified to the tree traversal algorithm in which symbol and operator coverage criteria are satisfied. The required tools for test sequence generation are provided to automatize the whole procedure of the proposed approach. Also, a running example, based on a real-life-like Traffic Light Controller (TLC), validates the proposed approach and analyzes its characteristic features.IEEE, IEEE Comp Soc, IEEE Reliabil So