The Experts below are selected from a list of 10665 Experts worldwide ranked by ideXlab platform
Daehyuk Kim - One of the best experts on this subject based on the ideXlab platform.
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global dna methylation in the chestnut blight fungus cryphonectria parasitica and genome wide changes in dna methylation accompanied with sectorization
Frontiers in Plant Science, 2018Co-Authors: Jeesun Chun, Jyotiranjan Bal, Junhyun Jeon, Jungmi Kim, Jaeyoung Choi, Yonghwan Lee, Jin Hoe Huh, Daehyuk KimAbstract:Mutation in CpBck1, an ortholog of the cell wall integrity mitogen-activated protein kinase kinase kinase (MAPKKK) of Saccharomyces cerevisiae, in the chestnut blight fungus Cryphonectria parasitica resulted in a sporadic sectorization as culture proceeded. The progeny from the sectored area maintained the characteristics of the sector, showing a massive morphogenetic change, including robust mycelial growth without differentiation. Epigenetic changes were investigated as the genetic mechanism underlying this sectorization. Quantification of DNA methylation and whole-genome bisulfite sequencing revealed genome-wide DNA methylation of the wild-type at each nucleotide level and changes in DNA methylation of the sectored progeny. Compared to the wild-type, the sectored progeny exhibited marked genome-wide DNA hypomethylation but increased methylation sites. Expression analysis of two DNA methyltransferases, including two representative types of DNA methyltransferase (DNMTase), demonstrated that both were significantly down-regulated in the sectored progeny. However, functional analysis using mutant phenotypes of corresponding DNMTases demonstrated that a mutant of CpDmt1, an ortholog of RID of Neurospora crassa, resulted in the sectored phenotype but the CpDmt2 mutant did not, suggesting that the genetic basis of fungal sectorization is more complex. The present study revealed that a mutation in a signaling pathway component resulted in sectorization accompanied with changes in genome-wide DNA methylation, which suggests that this signal transduction pathway is important for epigenetic control of sectorization via regulation of genes involved in DNA methylation.
Nikolay Panchenko - One of the best experts on this subject based on the ideXlab platform.
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Effective SIMD Vectorization for intel Xeon Phi coprocessors
Scientific Programming, 2015Co-Authors: Xinmin Tian, Serguei V. Preis, Sergey S. Kozhukhov, Matt Masten, Aleksei G. Cherkasov, Hideki Saito, Eric Garcia, Nikolay PanchenkoAbstract:Efficiently exploiting SIMD vector units is one of the most important aspects in achieving high performance of the application code running on Intel Xeon Phi coprocessors. In this paper, we present several effective SIMD Vectorization techniques such as less-than-full-vector loop Vectorization, Intel MIC specific alignment optimization, and small matrix transpose/multiplication 2D Vectorization implemented in the IntelC/C++ and Fortran production compilers for Intel Xeon Phi coprocessors. A set of workloads from several application domains is employed to conduct the performance study of our SIMD Vectorization techniques. The performance results show that we achieved up to 12.5x performance gain on the Intel Xeon Phi coprocessor. We also demonstrate a 2000x performance speedup from the seamless integration of SIMD Vectorization and parallelization.
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Practical SIMD Vectorization Techniques for Intel® Xeon Phi Coprocessors
2013 IEEE International Symposium on Parallel & Distributed Processing Workshops and Phd Forum, 2013Co-Authors: Xinmin Tian, Serguei V. Preis, Eric N. Garcia, Sergey S. Kozhukhov, Matt Masten, Aleksei G. Cherkasov, Hideki Saito, Nikolay PanchenkoAbstract:Intel® Xeon Phi coprocessor is based on the Intel® Many Integrated Core (Intel® MIC) architecture, which is an innovative new processor architecture that combines abundant thread parallelism with long SIMD vector units. Efficiently exploiting SIMD vector units is one of the most important aspects in achieving high performance of the application code running on Intel® Xeon Phi coprocessors. In this paper, we present several practical SIMD Vectorization techniques such as less-than-full-vector loop Vectorization, Intel® MIC specific alignment optimization, and small matrix transpose/multiplication 2-D Vectorization implemented in the Intel® C/C++ and Fortran production compilers for Intel® Xeon Phi coprocessors. A set of workloads from several application domains is employed to conduct the performance study of our SIMD Vectorization techniques. The performance results show that we achieved up to 12.5x performance gain on the Intel® Xeon Phi coprocessor.
Jeesun Chun - One of the best experts on this subject based on the ideXlab platform.
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global dna methylation in the chestnut blight fungus cryphonectria parasitica and genome wide changes in dna methylation accompanied with sectorization
Frontiers in Plant Science, 2018Co-Authors: Jeesun Chun, Jyotiranjan Bal, Junhyun Jeon, Jungmi Kim, Jaeyoung Choi, Yonghwan Lee, Jin Hoe Huh, Daehyuk KimAbstract:Mutation in CpBck1, an ortholog of the cell wall integrity mitogen-activated protein kinase kinase kinase (MAPKKK) of Saccharomyces cerevisiae, in the chestnut blight fungus Cryphonectria parasitica resulted in a sporadic sectorization as culture proceeded. The progeny from the sectored area maintained the characteristics of the sector, showing a massive morphogenetic change, including robust mycelial growth without differentiation. Epigenetic changes were investigated as the genetic mechanism underlying this sectorization. Quantification of DNA methylation and whole-genome bisulfite sequencing revealed genome-wide DNA methylation of the wild-type at each nucleotide level and changes in DNA methylation of the sectored progeny. Compared to the wild-type, the sectored progeny exhibited marked genome-wide DNA hypomethylation but increased methylation sites. Expression analysis of two DNA methyltransferases, including two representative types of DNA methyltransferase (DNMTase), demonstrated that both were significantly down-regulated in the sectored progeny. However, functional analysis using mutant phenotypes of corresponding DNMTases demonstrated that a mutant of CpDmt1, an ortholog of RID of Neurospora crassa, resulted in the sectored phenotype but the CpDmt2 mutant did not, suggesting that the genetic basis of fungal sectorization is more complex. The present study revealed that a mutation in a signaling pathway component resulted in sectorization accompanied with changes in genome-wide DNA methylation, which suggests that this signal transduction pathway is important for epigenetic control of sectorization via regulation of genes involved in DNA methylation.
Makoto Sasaki - One of the best experts on this subject based on the ideXlab platform.
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Vectorization of continuous energy monte carlo method for neutron transport calculation
Journal of Nuclear Science and Technology, 1992Co-Authors: Takamasa Mori, Masayuki Nakagawa, Makoto SasakiAbstract:The Vectorization method was studied to achieve a high efficiency for the precise physics model used in the continuous energy Monte Carlo method. The collision analysis task was reconstructed on the basis of the event based algorithm, and the stack-driven zone-selection method was applied to the Vectorization of random walk simulation. These methods were installed into the vectorized continuous energy MVP code for general purpose uses. Performance of the present method was evaluated by comparison with conventional scalar codes VIM and MCNP for two typical problems. The MVP code achieved a Vectorization ratio of more than 95% and a computation speed faster by a factor of 8–22 on the FACOM VP-2600 vector supercomputer compared with the conventional scalar codes.
Saman Amarasinghe - One of the best experts on this subject based on the ideXlab platform.
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compiler 2 0 using machine learning to modernize compiler technology
Languages Compilers and Tools for Embedded Systems, 2020Co-Authors: Saman AmarasingheAbstract:Modern compilers are still built using technology that existed decades ago. These include basic algorithms and techniques for lexing, parsing, data-flow analysis, data dependence analysis, Vectorization, register allocation, instruction selection, and instruction scheduling. It is high time that we modernize our compiler toolchain. In this talk, I will show the path to the modernization of one important compiler technique -- Vectorization. Vectorization was first introduced in the era of Cray vector processors during the 1980's. In modernizing Vectorization, I will first show how to use new techniques that better target modern hardware. While vector supercomputers need large vectors, which are only available by parallelizing loops, modern SIMD instructions efficiently work on short vectors. Thus, in 2000, we introduced Superword Level Parallelism (SLP) based Vectorization. SLP finds short vector instructions within basic blocks, and by loop unrolling we can convert vector parallelism to SLP. Next, I will show how we can take advantage of the power of modern computers for compilation, by using more accurate but expensive techniques to improve SLP Vectorization. Due to the hardware resource constraints of the era, like many other compiler optimizations, SLP implementation was a greedy algorithm. In 2018, we introduced goSLP, which uses integer linear programming to find an optimal instruction packing strategy and achieves 7.58% geomean performance improvement over the LLVM's SLP implementation on SPEC2017fp C/C++ programs. Finally, I will show how to truly modernize a compiler by automatically learning the necessary components of the compiler with Ithemal and Vemal. The optimality of goSLP is under LLVM's simple per instruction additive cost model that fits within the Integer programming framework. However, the actual cost of execution in a modern out-of-order, pipelined, superscalar processor is much more complex. Manually building such cost models as well as manually developing compiler optimizations is costly, tedious, error-prone and is hard to keep up with the architectural changes. Ithemal is the first learnt cost model for predicting the throughput of x86 basic blocks. It not only significantly outperforms (more than halves the error) state-of-the-art analytical hand-written tools like llvm-mca, but also is learnt from data requiring minimal human effort. Vemal is a learnt policy for end-to-end Vectorization as opposed to tuning heuristics, which outperforms LLVM's SLP vectorizer. These data-driven techniques can help achieve state-of-the-art results while also reducing the development and maintenance burden of the compiler developer.
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goSLP: Globally Optimized Superword Level Parallelism Framework
Proceedings of the ACM on Programming Languages, 2018Co-Authors: Charith Mendis, Saman AmarasingheAbstract:Modern microprocessors are equipped with single instruction multiple data (SIMD) or vector instruction sets which allow compilers to exploit superword level parallelism (SLP), a type of fine-grained parallelism. Current SLP auto-Vectorization techniques use heuristics to discover Vectorization opportunities in high-level language code. These heuristics are fragile, local and typically only present one Vectorization strategy that is either accepted or rejected by a cost model. We present goSLP, a novel SLP auto-Vectorization framework which solves the statement packing problem in a pairwise optimal manner. Using an integer linear programming (ILP) solver, goSLP searches the entire space of statement packing opportunities for a whole function at a time, while limiting total compilation time to a few minutes. Furthermore, goSLP optimally solves the vector permutation selection problem using dynamic programming. We implemented goSLP in the LLVM compiler infrastructure, achieving a geometric mean speedup of 7.58% on SPEC2017fp, 2.42% on SPEC2006fp and 4.07% on NAS benchmarks compared to LLVM's existing SLP auto-vectorizer.
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exploiting vector parallelism in software pipelined loops
International Symposium on Microarchitecture, 2005Co-Authors: Samuel Larsen, Rodric Rabbah, Saman AmarasingheAbstract:An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditional Vectorization technology first developed for supercomputers. In contrast, scalar hardware is typically targeted using ILP techniques such as software pipelining. This paper presents a novel approach for exploiting vector parallelism in software pipelined loops. The proposed methodology. Our approach results in better resource utilization and allows for software pipelining with shorter initiation intervals. The proposed optimization is applied in the compiler backend, where Vectorization decisions are more amenable to cost analysis. This is unique in that traditional Vectorization optimizations are usually carried out at the statement level. Although our technique most naturally complements statically scheduled machines, we believe it is applicable to any architecture that tightly integrates support for instruction and data level parallelism. We evaluate our methodology using nine SPEC FP benchmarks. In comparison to software pipelining, our approach achieves a maximum speedup of 1.38x, with average of 1.11x
