Video Signal

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Bian Chuan-ping - One of the best experts on this subject based on the ideXlab platform.

  • Technology of CCD Video Signal Processing Based on TDA8783
    Chinese Journal of Electron Devices, 2009
    Co-Authors: Bian Chuan-ping
    Abstract:

    Based on the character of CCD Video Signal,the project of CCD camera Video Signal processing was analyzed and designd.TDA8783,CCD Signal processing chip was adopted,to design the circuit.The device includes a correlated double sampling circuit(CDS),AGC and a Analog-to-Digital Converter(ADC) together with its reference voltage regulator.The process was studied and analyzed in this article.Finally,the problem of Video Signal processing circuit was simply summarized.

  • Research of CCD Video Signal Processing Based on TDA8783
    Aeronautical Computing Technique, 2008
    Co-Authors: Bian Chuan-ping
    Abstract:

    Based on analyzing a CCD Video Signal processing system,a array CCD Video Signal Processing system using TDA8783 as the core and peripheral hardware accessory circuit as the assistant was designed.The time simulation of the system was successfully fulfilled,and the associated debugging of hardware and software were accomplished.The results of the test indicated that the system was stable and reliable.This design has good reference value for miniaturization design about continuing detector.

J. Nieminen - One of the best experts on this subject based on the ideXlab platform.

  • Implementation of PALplus decoder with programmable Video Signal processor
    IEEE Transactions on Circuits and Systems for Video Technology, 1995
    Co-Authors: P. Liuha, P. Pohjala, P. Vanni, J. Nieminen
    Abstract:

    The implementation of the Video Signal processing of a PALpIus decoder is presented. The principle and features of the PALplus transmission system are reviewed and the operations required in the decoding described from the implementation point of view. The architecture and the programming of the scanline Video processor are given. The Video Signal processing operations in the PALplus decoding, namely motion adaptive colorplus, inverse letterbox conversion and helper processing, are implemented using two processors. The suitability of the processor and potential and useful extensions for the processor are discussed. >

R.j. Green - One of the best experts on this subject based on the ideXlab platform.

  • Component Video Signal-to-noise ratio analysis of FM and AM television system
    IEEE Transactions on Communications, 1994
    Co-Authors: B. Selvan, R.j. Green
    Abstract:

    The objective Signal-to-noise performance of component colour Video Signals is analysed in this paper for FM and AM-VSB Video transmission systems. In the analysis, the effect of splitting the composite Video Signal into its components, by subcarrier demodulation and colour decoding, is taken into consideration. The effect of non linearity of the display is also included in the analysis. An expression for objective component Signal-to-noise ratio is derived for both the transmission systems. A relationship between the conventional composite Video SNR and the component Video SNR is established. Effective noise transfer, between the input and various stages of Video Signal processing, is discussed in detail. Noise spectral density analysis, for fully saturated primary colours, is evaluated quantitatively for a PAL-I Video system. Finally, SNR performance of various hues at constant luminance is evaluated, and the results obtained are compared with the subjective noise visibility tests first carried out in 1957. >

  • Component Video Signal-To-Noise Ratio of FM and AM Television System
    1994
    Co-Authors: B. Selvan, R.j. Green
    Abstract:

    The objective Signal-to-noise performance of component colour Video Signals is analysed in this paper for FM and AM-VSB Video transmission systems. In the analysis, the effect of splitting the composite Video Signal into its components, by subcarrier demodulation and colour decoding, is taken into consideration. The effect of non linearity of the display is also included in the analysis. An expression for objective component Signal-to-noise ratio is derived for both the transmission systems. A relationship between the conventional composite Video SNR and the component Video SNR is established. Effective noise transfer, between the input and various stages of Video Signal processing, is discussed in detail. Noise spectral density analysis, for fully saturated primary colours, is evaluated quantitatively for a PAL-I Video system. Finally, SNR performance of various hues at constant luminance is evaluated, and the results obtained are compared with the subjective noise visibility tests first carried out in 1957.

Wayne Wolf - One of the best experts on this subject based on the ideXlab platform.

  • Design methodology for programmable Video Signal processors
    Multimedia Hardware Architectures 1997, 1997
    Co-Authors: Andrew Wolfe, Wayne Wolf, Santanu Dutta, Jason E. Fritts
    Abstract:

    This paper presents a design methodology for a high- performance, programmable Video Signal processor (VSP). The proposed design methodology explores both technology-driven hardware tradeoffs and application-driven architectural tradeoffs for optimizing cost and performance within a class of processor architectures. In particular, this methodology allows concurrent consideration of these competing factors at different levels of design sophistication, ranging from early design exploration towards full processor simulation. We present the results of this methodology for an aggressive very-long-instruction-word (VLIW) Video Signal processor design and discuss its utility for other programmable Signal processor designs.

  • Study of cache system in Video Signal processors
    1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374), 1
    Co-Authors: Wayne Wolf
    Abstract:

    Memory system design is especially important for Video Signal processing, where the Video Signal processor (VSP) not only requires a lot of data, but also needs a very high bandwidth and low latency. While caches become ubiquitous in modern systems, their performance still falls behind that of the processors. Therefore a number of modifications to traditional caches have emerged: victim cache, stream buffer, data prefetching techniques, etc. However, few people have studied cache memory for VSP. We present a case study based on extensive trace-driven scheduling, which shows that while stream buffer and stride prediction table are very effective for streaming Video data, they should be applied in a different way in dedicated VSP with higher degrees of parallelism than in current super-scalar workstation architectures.

  • Processing element design for programmable Video Signal processors
    VLSI Signal Processing VIII, 1
    Co-Authors: Santanu Dutta, Wayne Wolf
    Abstract:

    This paper focusses on the architectural design of programmable processing elements (PEs) and shows how technology and circuit parameters influence the structure of the datapath and hence the overall architecture of a programmable Video Signal processor. We emphasize the need to consider technological and circuit-level issues during the design of a system architecture and present a design methodology whereby the conceptual organization of the PEs-the number of PEs, the pipelining of the datapath, the size of the register file, and the number of register ports-can be evaluated in terms of a target application before a detailed design is undertaken. Motion estimation being an important task in Video processing, we use motion estimation as an example to illustrate how various technology parameters affect the architectural design choices.

A.h.m. Van Roermund - One of the best experts on this subject based on the ideXlab platform.

  • ICASSP - A programmable Video Signal processor
    International Conference on Acoustics Speech and Signal Processing, 1
    Co-Authors: R.j. Sluyter, P J Snijder, Hendrik Dijkstra, Cornelis Marinus Huizer, A.h.m. Van Roermund
    Abstract:

    A description is given of a digital, general-purpose, programmable processor chip, especially designed for effective processing of Video Signals. The architecture is described in terms of three hierarchical levels: the system level, describing how Video Signal processing tasks are realized on the basis of only one type of processor chip; the chip level, describing the modular architecture with the number of modules on the chip to be tuned to the available technology; and the module level, describing the various processing elements, how they communicate, and how they are controlled by so-called cyclo-static programs. For program development, software support tools have been designed, in a top-down mapping trajectory, that start at the Signal-flow-graph level and result in the program code for the processor(s). >