The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform
Michiel Steyaert - One of the best experts on this subject based on the ideXlab platform.
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a 1 57 ghz fully integrated very low phase noise quadrature vco
IEEE Journal of Solid-state Circuits, 2002Co-Authors: P Vancorenland, Michiel SteyaertAbstract:A very low-phase-noise quadrature Voltage-Controlled Oscillator is presented, featuring an inherently better figure of merit than existing architectures. Through an improved circuit schematic and a special layout technique, the phase noise of the circuit can be lowered. The circuit draws 15 mA from a 2-V supply. The phase noise is -133.5 dBc/Hz at 600 kHz and the tuning range is 24% wide at a center frequency of 1.57 GHz.
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wireless cmos frequency synthesizer design
1998Co-Authors: Jan Craninckx, Michiel SteyaertAbstract:List of Figures. List of Tables. List of Symbols and Abbreviations. Preface. 1. Introduction. 2. Phase-Locked Loop Frequency Synthesizers. 3. Voltage-Controlled Oscillator Phase Noise. 4. Bonding Wire Inductance VCOs. 5. Planar-Inductor VCOs. 6. High-Frequency CMOS Prescalers. 7. A Fully Integrated CMOS PLL Frequency Synthesizer. 8. General Conclusions. Bibliography. Index.
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a 1 8 ghz cmos low phase noise Voltage Controlled Oscillator with prescaler
IEEE Journal of Solid-state Circuits, 1995Co-Authors: Jan Craninckx, Michiel SteyaertAbstract:The implementation of the two high-frequency building blocks for a low-phase-noise 1.8-GHz frequency-synthesizing PLL in a standard 0.7-/spl mu/m CMOS process is discussed. The VCO uses on-chip bondwires, instead of spiral inductors, for low noise and low power. The design of these bondwire inductors is discussed in great detail. A general formula for the theoretical limit of the phase noise of LC-tuned Oscillators is presented. The design of a special LC-tank allows a trade-off between noise and power. The realized VCO has a phase noise of -115 dBc/Hz at 200 kHz from the 1.8-GHz carrier and consumes 8 mA from a 3-V supply. The prescaler has a fixed division ratio of 128 and uses an enhanced ECL-alike high-frequency D-flipflop. Its power consumption is 28 mW.
Mark Horowitz - One of the best experts on this subject based on the ideXlab platform.
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circuits and techniques for high resolution measurement of on chip power supply noise
IEEE Journal of Solid-state Circuits, 2005Co-Authors: Elad Alon, Vladimir Stojanovic, Mark HorowitzAbstract:This paper presents a technique for characterizing the statistical properties and spectrum of power supply noise using only two on-chip low-throughput samplers. The samplers utilize a Voltage-Controlled Oscillator to perform high-resolution analog-to-digital conversion with minimal hardware. The measurement system is implemented in a 0.13-/spl mu/m process along with a high-speed link transceiver. Measured results from this chip validate the accuracy of the measurement system and elucidate several aspects of power supply noise, including its cyclostationary nature.
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circuits and techniques for high resolution measurement of on chip power supply noise
Symposium on VLSI Circuits, 2004Co-Authors: Elad Alon, Vladimir Stojanovic, Mark HorowitzAbstract:A technique for characterizing the cyclically time varying statistical properties and spectrum of power supply noise using only two on-chip samplers is presented. The samplers utilize a Voltage-Controlled Oscillator to perform high-resolution analog-to-digital conversion with minimal hardware. The measurement system is implemented in a 0.13 /spl mu/m process as part of a high-speed link transceiver. Measurement results showing the cyclostationary behavior of power supply noise are presented.
Seonghwan Cho - One of the best experts on this subject based on the ideXlab platform.
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analysis and design of Voltage Controlled Oscillator based analog to digital converter
IEEE Transactions on Circuits and Systems, 2010Co-Authors: Jaewook Kim, Taekwang Jang, Younggyu Yoon, Seonghwan ChoAbstract:A Voltage-Controlled Oscillator (VCO) based analog-to-digital converter (ADC) is a time-based architecture with a first-order noise-shaping property, which can be implemented using a VCO and digital circuits. This paper analyzes the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops. Based on this analysis, design criteria for determining parameters for VCO-based ADCs are described. In addition, a digital calibration technique to enhance the spurious-free dynamic range degraded by the nonlinearity is also introduced. To verify the theoretical analysis, a prototype chip is implemented in a 0.13-?m CMOS process. With a 500-MHz sampling frequency, the prototype achieves a signal-to-noise ratio ranging from 71.8 to 21.3 dB for an input bandwidth of 100 kHz-247 MHz, while dissipating 12.6 mW and occupying an area of 0.078 mm2.
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a time based analog to digital converter using a multi phase Voltage Controlled Oscillator
International Symposium on Circuits and Systems, 2006Co-Authors: Jaewook Kim, Seonghwan ChoAbstract:A time-based analog-to-digital converter(ADC) employing a multi-phase Voltage-Controlled Oscillator(VCO) is presented. The VCO is based on a ring Oscillator which converts analog input Voltage to phase information. Digital output is produced by a phase quantizer which consists of a counter for coarse quantization and phase detector for fine quantization. Using this technique, an 8-bit 100Msamples/s ADC is designed and simulated. Impact of jitter and VCO linearity on the ADC performance is analyzed and verified.
Imhyu Shin - One of the best experts on this subject based on the ideXlab platform.
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wideband colpitts Voltage Controlled Oscillator with nanosecond startup time and 28 tuning bandwidth for bubble type motion detector
The Journal of Korean Institute of Electromagnetic Engineering and Science, 2013Co-Authors: Imhyu Shin, Dongwook KimAbstract:Abstract This paper presents a wideband Colpitts Voltage Controlled Oscillator(VCO) with nanosecond startup time and a center frequency of 8.35 GHz for a new bubble-type motion detector that has a bubble-layer detection zone at the specific distance from itself. The VCO circuit consists of two parts; one is a negative resistance part with a HEMT device and Colpitts feedback structure and the other is a resonator part with a varactor diode and shorted shunt mi-crostrip line. The shorted shunt microstrip line and series capacitor are utilized to compensate for the input reactance of the packaged HEMT that changes from capacitive values to inductive values at 8.1 GHz due to parasitic package inductance. By tuning the feedback capacitors which determine negative resistance values, this paper also investigates startup time improvement with the negative resistance variation and tuning bandwidth improvement with the reactance slope variation of the negative resistance part. The VCO measurement shows the tuning bandwidth of 2.3 GHz(28 %), the output power of 4.17.5 dBm and the startup time of less than 2 nsec. Key words : Colpitts, Voltage Controlled Oscillator, Motion Detector, Wideband, Startup Time
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Wideband Colpitts Voltage Controlled Oscillator with nanosecond start-up time for bubble-type motion detector
2013 Asia-Pacific Microwave Conference Proceedings (APMC), 2013Co-Authors: Imhyu ShinAbstract:This paper presents a wideband Colpitts Voltage Controlled Oscillator (VCO) with a center frequency of 8.35GHz and nanosecond start-up time for a new bubble-type motion detector that has a bubble layer of detection zone at the specific distance from itself. Combined with the varactor diode, the shunt microstrip line resonating at 6.8GHz is proposed to compensate the input reactance of the transistor that changes from capacitive values to inductive values at 8.1GHz. The measured VCO shows the tunable bandwidth of 2.3GHz, the output power of 4~7dBm and the start-up time of less than 2nsec. It will be utilized for the novel bubble-type motion detector later.
Luke Theogarajan - One of the best experts on this subject based on the ideXlab platform.
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an ultra low phase noise 20 ghz pll utilizing an optoelectronic Voltage Controlled Oscillator
IEEE Transactions on Microwave Theory and Techniques, 2015Co-Authors: Aaron Bluestone, Daryl T Spencer, Sudharsanan Srinivasan, Danielle Guerra, John E Bowers, Luke TheogarajanAbstract:This paper describes a novel phase-locked loop (PLL) architecture utilizing an optoelectronic Oscillator (OEO) as a Voltage-Controlled Oscillator (VCO). The OEO demonstrates excellent far-out phase-noise performance while the PLL reduces the close-in phase noise. The nonmonotonic VCO characteristics of the OEO placed stringent demands on the loop filter electronics and startup conditions. The crystal reference, prescalar, frequency synthesizer, and loop filter were all implemented with discrete high-performance components. The resulting frequency synthesizer yields a $-$ 10-dBm output at 20 GHz with phase noise of $-$ 80 dBc/Hz at 100-Hz offset, and $-$ 134 dBc/Hz at 10-kHz offset. These results are far superior to PLL synthesizers utilizing only an electronic VCO and illustrate the power of optoelectronic integration.
