Voltage Generator

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K Kimura - One of the best experts on this subject based on the ideXlab platform.

  • a precise on chip Voltage Generator for a gigascale dram with a negative word line scheme
    IEEE Journal of Solid-state Circuits, 1999
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, T Sakata, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    A precise on-chip Voltage Generator for gigascale DRAM's with a negative word-line scheme is described. It combines a charge-pump regulator and a series-pass regulator, and it also includes a positive and negative offset Voltage Generator that uses a bandgap Generator with a differential amplifier. The proposed circuit was experimentally evaluated with a test device fabricated using a 0.3-/spl mu/m process. The simulation results show that the series-pass regulator suppresses the noise on a word-line low Voltage (negative) to below 30 mV for the word-line transient and V/sub BB/ bouncing. A dc-Voltage error of less than 6% without trimming is confirmed for the positive and negative offset Voltage Generator through the test device. These results show that the described scheme can be used in future low-Voltage gigascale DRAM's.

  • a precise on chip Voltage Generator for a giga scale dram with a negative word line scheme
    Symposium on VLSI Circuits, 1998
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    We have designed a precise on-chip Voltage Generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset Voltage Generator that uses a band-gap Generator with a differential amplifier. The noise on a low-Voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC Voltage error of less than 6% without trimming is also achieved.

Hiroki Tanaka - One of the best experts on this subject based on the ideXlab platform.

  • a precise on chip Voltage Generator for a gigascale dram with a negative word line scheme
    IEEE Journal of Solid-state Circuits, 1999
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, T Sakata, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    A precise on-chip Voltage Generator for gigascale DRAM's with a negative word-line scheme is described. It combines a charge-pump regulator and a series-pass regulator, and it also includes a positive and negative offset Voltage Generator that uses a bandgap Generator with a differential amplifier. The proposed circuit was experimentally evaluated with a test device fabricated using a 0.3-/spl mu/m process. The simulation results show that the series-pass regulator suppresses the noise on a word-line low Voltage (negative) to below 30 mV for the word-line transient and V/sub BB/ bouncing. A dc-Voltage error of less than 6% without trimming is confirmed for the positive and negative offset Voltage Generator through the test device. These results show that the described scheme can be used in future low-Voltage gigascale DRAM's.

  • a precise on chip Voltage Generator for a giga scale dram with a negative word line scheme
    Symposium on VLSI Circuits, 1998
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    We have designed a precise on-chip Voltage Generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset Voltage Generator that uses a band-gap Generator with a differential amplifier. The noise on a low-Voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC Voltage error of less than 6% without trimming is also achieved.

Myung S Jhon - One of the best experts on this subject based on the ideXlab platform.

  • shear stress analysis of a semiconducting polymer based electrorheological fluid system
    Polymer, 2005
    Co-Authors: Hyoung Jin Choi, Myung S Jhon
    Abstract:

    Abstract The electrorheological characteristics of a fluid system with semiconducting poly(naphthalene quinone) (PNQR) particles, synthesized from a Friedel–Craft acylation, were investigated via a rotational rheometer equipped with a high Voltage Generator. The flow curves of these ER fluids under several applied electric field strengths and particle concentrations were constructed and their flow characteristics were examined via three different rheological constitutive equations of Bingham model, De Kee–Turcotte model and our proposed model. Our proposed equation was found to fit the data very accurately.

  • electrorheological characteristics of phosphate cellulose based suspensions
    Polymer, 2001
    Co-Authors: Seong G Kim, Ji W Kim, W H Jang, Howon Choi, Myung S Jhon
    Abstract:

    Abstract As a potential candidate for the development of anhydrous electrorheological (ER) materials, phosphate cellulose particles were synthesized from a phosphoric ester reaction between cellulose particles and a 2 M phosphoric acid–urea mixture, and then dispersed in silicone oil to prepare the phosphate cellulose-based ER fluid. Rheological measurements were carried out via a rotational rheometer with a high Voltage Generator in both steady and oscillatory shear modes to investigate the effects of electric field strength and particle concentration on ER performance. The results show not only that the ER properties are enhanced by increasing the particle concentration and electric field strength, but also the cellulose-based ER fluids exhibit viscoelastic behavior under an applied electric field due to the chain formation induced by electric polarization between particles.

  • viscoelastic characterization of semiconducting dodecylbenzenesulfonic acid doped polyaniline electrorheological suspensions
    Journal of Applied Polymer Science, 2001
    Co-Authors: Hyoung Jin Choi, Myung S Jhon
    Abstract:

    Dodecylbenzenesulfonic acid (DBSA)-doped polyaniline particles were synthesized via emulsion polymerization, and electrorheological (ER) fluids were prepared by dispersing the synthesized polyaniline particles in silicone oil. The viscoelastic properties of DBSA-doped polyaniline/silicone oil ER systems were examined using a vertical oscillation rheometer (VOR), which is designed for the rheological measurement of ER fluids, with a high Voltage Generator. Viscoelastic data obtained from the VOR were compared with those obtained from a commercial Physica rotational rheometer. The data from VOR were quite reliable in a broad range of both strain and frequency.

  • synthesis and electrorheological characterization of emulsion polymerized dodecylbenzenesulfonic acid doped polyaniline based suspensions
    Colloid and Polymer Science, 2000
    Co-Authors: Hyoung Jin Choi, M J Shin, Myung S Jhon
    Abstract:

    The electrorheological (ER) properties of dodecylbenzenesulfonic acid (DBSA) doped polyaniline suspensions in silicone oil were investigated. In contrast to chemically polymerized polyaniline in an acidic aqueous medium by oxidation polymerization, we adopted an emulsion polymerization technique in which aniline is polymerized in an emulsion of water and a nonpolar (or weakly polar) organic solvent. The effects of electric field strength and particle concentration on the ER properties of DBSA-doped polyaniline suspensions in silicone oil were then examined. Rheological measurements were also carried out using a rotational rheometer with a high-Voltage Generator in both controlled shear rate and shear stress modes, and the results showed that the ER properties were enhanced by increasing the particle concentration and electric field.

Masakazu Aoki - One of the best experts on this subject based on the ideXlab platform.

  • a precise on chip Voltage Generator for a gigascale dram with a negative word line scheme
    IEEE Journal of Solid-state Circuits, 1999
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, T Sakata, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    A precise on-chip Voltage Generator for gigascale DRAM's with a negative word-line scheme is described. It combines a charge-pump regulator and a series-pass regulator, and it also includes a positive and negative offset Voltage Generator that uses a bandgap Generator with a differential amplifier. The proposed circuit was experimentally evaluated with a test device fabricated using a 0.3-/spl mu/m process. The simulation results show that the series-pass regulator suppresses the noise on a word-line low Voltage (negative) to below 30 mV for the word-line transient and V/sub BB/ bouncing. A dc-Voltage error of less than 6% without trimming is confirmed for the positive and negative offset Voltage Generator through the test device. These results show that the described scheme can be used in future low-Voltage gigascale DRAM's.

  • a precise on chip Voltage Generator for a giga scale dram with a negative word line scheme
    Symposium on VLSI Circuits, 1998
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    We have designed a precise on-chip Voltage Generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset Voltage Generator that uses a band-gap Generator with a differential amplifier. The noise on a low-Voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC Voltage error of less than 6% without trimming is also achieved.

Shinichiro Kimura - One of the best experts on this subject based on the ideXlab platform.

  • a precise on chip Voltage Generator for a gigascale dram with a negative word line scheme
    IEEE Journal of Solid-state Circuits, 1999
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, T Sakata, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    A precise on-chip Voltage Generator for gigascale DRAM's with a negative word-line scheme is described. It combines a charge-pump regulator and a series-pass regulator, and it also includes a positive and negative offset Voltage Generator that uses a bandgap Generator with a differential amplifier. The proposed circuit was experimentally evaluated with a test device fabricated using a 0.3-/spl mu/m process. The simulation results show that the series-pass regulator suppresses the noise on a word-line low Voltage (negative) to below 30 mV for the word-line transient and V/sub BB/ bouncing. A dc-Voltage error of less than 6% without trimming is confirmed for the positive and negative offset Voltage Generator through the test device. These results show that the described scheme can be used in future low-Voltage gigascale DRAM's.

  • a precise on chip Voltage Generator for a giga scale dram with a negative word line scheme
    Symposium on VLSI Circuits, 1998
    Co-Authors: Hiroki Tanaka, Masakazu Aoki, Shinichiro Kimura, N Sakashita, H Hidaka, T Tachibana, K Kimura
    Abstract:

    We have designed a precise on-chip Voltage Generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset Voltage Generator that uses a band-gap Generator with a differential amplifier. The noise on a low-Voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC Voltage error of less than 6% without trimming is also achieved.