The Experts below are selected from a list of 48630 Experts worldwide ranked by ideXlab platform

Daoxu Chen - One of the best experts on this subject based on the ideXlab platform.

  • a qos aware service selection algorithm for multimedia service overlay networks
    International Conference on Parallel and Distributed Systems, 2007
    Co-Authors: Yilin Wang, Daoxu Chen
    Abstract:

    Multimedia applications are becoming more and more popular on today's Internet. Given the enormous development costs and less flexibility, traditional monolithic based approaches are not suitable for building large-scale multimedia systems. By composing of distributed, autonomous services dynamically to provide more complex tasks, service composition provides an attractive way for building large-scale Internet applications. So, multimedia service composition provides a viable solution to large-scale complex multimedia systems. One of the challenging issues of multimedia service composition is how to find service paths to route the data flows through while meeting the applications' resource requirements and specific QoS constraints. However, QoS-aware service routing problem is typically NP-hard. In this paper, we propose a heuristic algorithm named greedy-EF to solve this problem more effectively. More specially, greedy-EF uses an Aggregate Function to evaluate the QoS conditions for each service instance, and a hop-by-hop service selection approach to explore the proper service path. Simulations show that greedy-EF algorithm can achieve desired QoS assurances as well as load balancing in multimedia service overlay networks.

  • ICPADS - A QoS-aware service selection algorithm for multimedia service overlay networks
    2007 International Conference on Parallel and Distributed Systems, 2007
    Co-Authors: Yilin Wang, Daoxu Chen
    Abstract:

    Multimedia applications are becoming more and more popular on today's Internet. Given the enormous development costs and less flexibility, traditional monolithic based approaches are not suitable for building large-scale multimedia systems. By composing of distributed, autonomous services dynamically to provide more complex tasks, service composition provides an attractive way for building large-scale Internet applications. So, multimedia service composition provides a viable solution to large-scale complex multimedia systems. One of the challenging issues of multimedia service composition is how to find service paths to route the data flows through while meeting the applications' resource requirements and specific QoS constraints. However, QoS-aware service routing problem is typically NP-hard. In this paper, we propose a heuristic algorithm named greedy-EF to solve this problem more effectively. More specially, greedy-EF uses an Aggregate Function to evaluate the QoS conditions for each service instance, and a hop-by-hop service selection approach to explore the proper service path. Simulations show that greedy-EF algorithm can achieve desired QoS assurances as well as load balancing in multimedia service overlay networks.

Yilin Wang - One of the best experts on this subject based on the ideXlab platform.

  • a qos aware service selection algorithm for multimedia service overlay networks
    International Conference on Parallel and Distributed Systems, 2007
    Co-Authors: Yilin Wang, Daoxu Chen
    Abstract:

    Multimedia applications are becoming more and more popular on today's Internet. Given the enormous development costs and less flexibility, traditional monolithic based approaches are not suitable for building large-scale multimedia systems. By composing of distributed, autonomous services dynamically to provide more complex tasks, service composition provides an attractive way for building large-scale Internet applications. So, multimedia service composition provides a viable solution to large-scale complex multimedia systems. One of the challenging issues of multimedia service composition is how to find service paths to route the data flows through while meeting the applications' resource requirements and specific QoS constraints. However, QoS-aware service routing problem is typically NP-hard. In this paper, we propose a heuristic algorithm named greedy-EF to solve this problem more effectively. More specially, greedy-EF uses an Aggregate Function to evaluate the QoS conditions for each service instance, and a hop-by-hop service selection approach to explore the proper service path. Simulations show that greedy-EF algorithm can achieve desired QoS assurances as well as load balancing in multimedia service overlay networks.

  • ICPADS - A QoS-aware service selection algorithm for multimedia service overlay networks
    2007 International Conference on Parallel and Distributed Systems, 2007
    Co-Authors: Yilin Wang, Daoxu Chen
    Abstract:

    Multimedia applications are becoming more and more popular on today's Internet. Given the enormous development costs and less flexibility, traditional monolithic based approaches are not suitable for building large-scale multimedia systems. By composing of distributed, autonomous services dynamically to provide more complex tasks, service composition provides an attractive way for building large-scale Internet applications. So, multimedia service composition provides a viable solution to large-scale complex multimedia systems. One of the challenging issues of multimedia service composition is how to find service paths to route the data flows through while meeting the applications' resource requirements and specific QoS constraints. However, QoS-aware service routing problem is typically NP-hard. In this paper, we propose a heuristic algorithm named greedy-EF to solve this problem more effectively. More specially, greedy-EF uses an Aggregate Function to evaluate the QoS conditions for each service instance, and a hop-by-hop service selection approach to explore the proper service path. Simulations show that greedy-EF algorithm can achieve desired QoS assurances as well as load balancing in multimedia service overlay networks.

Henry G Dietz - One of the best experts on this subject based on the ideXlab platform.

  • Chip multiprocessors with on-chip Aggregate Function network
    2009
    Co-Authors: Samuel P. Midkiff, Henry G Dietz, Soohong P. Kim
    Abstract:

    State-of-the-art on-chip networks and block-based cache coherence protocols used in cache-coherent shared-memory Chip MultiProcessors (CMPs) are inefficient for collective operations across cores. Performance of CMPs can be seriously degraded by the multitude of memory requests and coherence messages required to implement each collective operation. This thesis presents a CMP-AFN architecture and Instruction Set Architecture (ISA) extensions that augment a conventional shared-memory CMP with a tightly-integrated Aggregate Function Network (AFN) that implements low-latency collective operations without using or interfering with the memory hierarchy. For a modest increase in circuit complexity, traffic within a CMP’s internal network is dramatically reduced, improving the performance of caches and reducing power consumption. Full system simulations of 16-core CMPs show a CMP-AFN outperforms the reference design significantly, eliminating up to 52% of memory accesses and up to 73% of private L1 data cache misses in both the EPCC OpenMP microbenchmarks and SPEC OMP benchmarks.

  • LCPC - Hardware support for OpenMP collective operations
    Languages and Compilers for Parallel Computing, 2009
    Co-Authors: Samuel P. Midkiff, Henry G Dietz
    Abstract:

    Efficient implementation of OpenMP collective operations (e.g. barriers and reductions) is essential for good performance from OpenMP programs. State-of-the-art on-chip networks and block-based cache coherence protocols used in shared memory Chip MultiProcessors (CMPs) are inefficient for implementing these collective operations. The performance of CMPs can be seriously degraded by the multitude of memory requests and coherence messages required to implement collective operations. To provide efficient support for OpenMP collective operations, this paper presents a CMP-AFN architecture and Instruction Set Architecture (ISA) extensions that augment a conventional shared-memory CMP with a tightly-integrated Aggregate Function Network (AFN) that implements low-latency collectives without using or interfering with the memory hierarchy. For a modest increase in circuit complexity, traffic within a CMP's internal network is dramatically reduced, improving the performance of caches and reducing power consumption. Full system simulations of 16-core CMPs show a CMP-AFN outperforms the reference design significantly, eliminating more than 60% of memory accesses and more than 70% of private L1 data cache misses in both the EPCC OpenMP microbenchmarks and SPEC OMP benchmarks.

  • LCPC - The Aggregate Function API: It's Not Just for PAPERS Anymore
    Languages and Compilers for Parallel Computing, 1998
    Co-Authors: Henry G Dietz, Timothy Mattox, G. Krishnamurthy
    Abstract:

    The concept of data parallelism is a pervasive force throughout parallel processing. Although a certain level of processing-element autonomy can help performance, the fact is that many parallele algorithms, applications, and compiler analysis techniques focus on identifying a set of data objects that can be processed using loosely synchronous parallelism. Thus, it is not surprising that a large number of communication libraries support at least a few synchronized Aggregate operations on data. The Aggregate Function Application Program Interface (AFAPI) library was initially designed to be a portable high-level interface to the various types of PAPERS cluster hardware, so one would expect it to work well using this custom hardware, and it does work well. In this paper, we show that the AFAPI is also an efficient programming model for other types of parallel systems, especially shared memory multiprocessors. For many operations AFAPI can outperform threads libraries and other more traditional shared memory programming models.

  • IEEE PACT - VLIW across multiple superscalar processors on a single chip
    Proceedings 1997 International Conference on Parallel Architectures and Compilation Techniques, 1997
    Co-Authors: Raymond R. Hoare, Henry G Dietz
    Abstract:

    Advances in IC technology increase the integration density for higher clock rates and provide more opportunities for microprocessor design. In this paper, we propose a new paradigm to exploit instruction-level parallelism (ILP) across multiple superscalar processors on a single chip by taking advantages of both VLIW-style static scheduling techniques and dynamic scheduling of superscalar architecture. In the proposed paradigm, ILP is exploited by a compiler from a sequential program and this VLIW-like-parallelized code is further parallelized by 2-way superscalar engines at run-time. Superscalar processors are connected by an Aggregate Function network, which can enforce the necessary static timing constraints and provide appropriate inter-processor data communication mechanisms that are needed for ILP. The Aggregate Function operations are statically scheduled and implement not only fine-grain communication and control, but also simple global computations resembling systolic array operations within the network.

  • the Aggregate Function api it s not just for papers anymore
    Languages and Compilers for Parallel Computing, 1997
    Co-Authors: Henry G Dietz, Timothy Mattox, G. Krishnamurthy
    Abstract:

    The concept of data parallelism is a pervasive force throughout parallel processing. Although a certain level of processing-element autonomy can help performance, the fact is that many parallele algorithms, applications, and compiler analysis techniques focus on identifying a set of data objects that can be processed using loosely synchronous parallelism. Thus, it is not surprising that a large number of communication libraries support at least a few synchronized Aggregate operations on data. The Aggregate Function Application Program Interface (AFAPI) library was initially designed to be a portable high-level interface to the various types of PAPERS cluster hardware, so one would expect it to work well using this custom hardware, and it does work well. In this paper, we show that the AFAPI is also an efficient programming model for other types of parallel systems, especially shared memory multiprocessors. For many operations AFAPI can outperform threads libraries and other more traditional shared memory programming models.

Clement H. C. Leung - One of the best experts on this subject based on the ideXlab platform.

Kazuyuki Yoneyama - One of the best experts on this subject based on the ideXlab platform.

  • Accumulable optimistic fair exchange from verifiably encrypted homomorphic signatures
    International Journal of Information Security, 2017
    Co-Authors: Jae Hong Seo, Keita Xagawa, Keita Emura, Kazuyuki Yoneyama
    Abstract:

    Let us consider a situation where a client (Alice) frequently buys a certain kind of product from a shop (Bob) (e.g., an online music service sells individual songs at the same price, and a client buys songs multiple times in a month). In this situation, Alice and Bob would like to Aggregate the total transactions and pay once per month because individual payments are troublesome. Though optimistic fair exchange (OFE) has been considered in order to swap electronic items simultaneously, known OFE protocols cannot provide such Aggregate Function efficiently because various costs are bounded by the number of transactions in the period. In order to run this aggregation procedure efficiently, we introduce a new kind of OFE called accumulable OFE (AOFE) that allows clients to efficiently accumulate payments in each period. In AOFE, any memory costs, computational costs, and communication complexity of the payment round must be constant in terms of the number of transactions. Since a client usually has just a low power and poor memory device, these efficiencies are desirable in practice. Currently, known approaches (e.g., based on verifiably encrypted signature scheme) are not very successful for constructing AOFE. Thus, we consider a new approach based on a new cryptographic primitive called verifiably encrypted homomorphic signature scheme (VEHS). In this paper, we propose a generic construction of AOFE from VEHS and also present a concrete VEHS scheme over a composite-order bilinear group by using the dual-form signature techniques. This VEHS scheme is also of independent interest. Since we can prove the security of VEHS without random oracles, our AOFE protocol is also secure without random oracles. Finally, we implemented our AOFE protocol, and it is efficient enough for practical use.