The Experts below are selected from a list of 174 Experts worldwide ranked by ideXlab platform

Li Gui-long - One of the best experts on this subject based on the ideXlab platform.

  • Fault-tolerant Service-oriented Architecture Description Language Supporting Exception Handling
    Computer Science, 2011
    Co-Authors: Li Gui-long
    Abstract:

    To solve the problem of the construction of fault tolerant service-oriented software Architecture,the paper proposed SOADL-EH,a new service-oriented software Architecture description language(ADL) supporting exception handling.With the capability of modeling normal SOA and the provision of exception handling services(EHService),exception handling connectors(EHConnector) and exception handling configurations(EHConfigure),etc.software Architecture elements,this language can separate clearly the exception handling logic from the normal business logic of the service-oriented software Architecture Layer,which covers the shortage in exception handling capability of the existing ADLs.

Jun Liu - One of the best experts on this subject based on the ideXlab platform.

  • grt 2 0 an fpga based sdr platform for cognitive radio networks abstract only
    Field Programmable Gate Arrays, 2017
    Co-Authors: Tao Wang, Boyan Ding, Tianfu Jiang, Jun Liu
    Abstract:

    Although there is explosive growth of theoretical research on cognitive radio, the real-time platform for cognitive radio is progressing at a low pace. Researchers expect fast prototyping their designs with appropriate wireless platforms to precisely evaluate and validate their new designs. Platforms for cognitive radio should provide both high-performance and programmability. We observed that for the parallel and reconfigurable nature, FPGA is suitable for developing real-time software-defined radio (SDR) platforms. However, without a carefully designed "middleware Architecture Layer", Real-time programmable wireless system is still difficult to build. In this paper, we present GRT 2.0, a novel high-performance and programmable SDR platform for cognitive radio. This paper focuses on the Architecture design of media access control (MAC) Layer and radio frequency (RF) front-end interface. We allocate different MAC functions into different computing units, including a dedicated, light-weight embedded processor and several peripherals, to ensure both programmability and microsecond-level timing requirements. A serial-to-parallel converter is adopted to solve the issues of frame type matching and precise timing between PHY and RF. To support mobile host computers, we use the more portable USB 3.0 interface instead of PCIe. Finally, with the design of an efficient "gain lock" state machine, automatic gain control (AGC) processing time has been reduced to less than 1us. The evaluation result shows that with 802.11a/g protocol, GRT 2.0 achieves maximum throughput of 23Mbps in MAC, which is compatible to commodity fixed-logic wireless network adaptors. The latency of RF front-end is less than 2us, over 10X performance improvement to the Ethernet cable interface. Moreover, by carefully designed "middleware Architecture Layer" in FPGA, we provide good programmability both in MAC and PHY.

  • FPGA - GRT 2.0: An FPGA-based SDR Platform for Cognitive Radio Networks (Abstract Only)
    Proceedings of the 2017 ACM SIGDA International Symposium on Field-Programmable Gate Arrays, 2017
    Co-Authors: Tao Wang, Boyan Ding, Tianfu Jiang, Jun Liu
    Abstract:

    Although there is explosive growth of theoretical research on cognitive radio, the real-time platform for cognitive radio is progressing at a low pace. Researchers expect fast prototyping their designs with appropriate wireless platforms to precisely evaluate and validate their new designs. Platforms for cognitive radio should provide both high-performance and programmability. We observed that for the parallel and reconfigurable nature, FPGA is suitable for developing real-time software-defined radio (SDR) platforms. However, without a carefully designed "middleware Architecture Layer", Real-time programmable wireless system is still difficult to build. In this paper, we present GRT 2.0, a novel high-performance and programmable SDR platform for cognitive radio. This paper focuses on the Architecture design of media access control (MAC) Layer and radio frequency (RF) front-end interface. We allocate different MAC functions into different computing units, including a dedicated, light-weight embedded processor and several peripherals, to ensure both programmability and microsecond-level timing requirements. A serial-to-parallel converter is adopted to solve the issues of frame type matching and precise timing between PHY and RF. To support mobile host computers, we use the more portable USB 3.0 interface instead of PCIe. Finally, with the design of an efficient "gain lock" state machine, automatic gain control (AGC) processing time has been reduced to less than 1us. The evaluation result shows that with 802.11a/g protocol, GRT 2.0 achieves maximum throughput of 23Mbps in MAC, which is compatible to commodity fixed-logic wireless network adaptors. The latency of RF front-end is less than 2us, over 10X performance improvement to the Ethernet cable interface. Moreover, by carefully designed "middleware Architecture Layer" in FPGA, we provide good programmability both in MAC and PHY.

Robert Winter - One of the best experts on this subject based on the ideXlab platform.

  • virtual decoupling for it business alignment conceptual foundations Architecture design and implementation example
    Web Intelligence, 2009
    Co-Authors: Stephan Aier, Robert Winter
    Abstract:

    IT/business alignment is one of the main topics of information systems research. If IT artifacts and business-related artifacts are coupled point-to-point, however, complex Architectures become unmanageable over time. In computer science, concepts like the ANSI/SPARC three-level database Architecture propose an Architecture Layer which decouples external views on data and the implementation view of data. In this paper, a similar approach for IT/business alignment is proposed. The proposed alignment Architecture is populated by enterprise services as elementary artifacts. Enterprise services link software components and process activities. They are aggregated into applications and subsequently into domains for planning/design and communication purposes. Most design approaches for the construction of enterprise services, applications and domains are top-down, i. e. they decompose complex artifacts on a stepwise basis. As an alternative which takes into account coupling semantics, we propose a bottom-up approach which is demonstrated for the identification of domains. Our approach is evaluated using a telecommunications equipment case study.

  • Virtual Decoupling for IT/Business Alignment – Conceptual Foundations, Architecture Design and Implementation Example
    Business & Information Systems Engineering, 2009
    Co-Authors: Stephan Aier, Robert Winter
    Abstract:

    IT/business alignment is one of the main topics of information systems research. If IT artifacts and business-related artifacts are coupled point-to-point, however, complex Architectures become unmanageable over time. In computer science, concepts like the ANSI/SPARC three-level database Architecture propose an Architecture Layer which decouples external views on data and the implementation view of data. In this paper, a similar approach for IT/business alignment is proposed. The proposed alignment Architecture is populated by enterprise services as elementary artifacts. Enterprise services link software components and process activities. They are aggregated into applications and subsequently into domains for planning/design and communication purposes. Most design approaches for the construction of enterprise services, applications and domains are top-down, i. e. they decompose complex artifacts on a stepwise basis. As an alternative which takes into account coupling semantics, we propose a bottom-up approach which is demonstrated for the identification of domains. Our approach is evaluated using a telecommunications equipment case study.

  • virtual decoupling for it business alignment conceptual foundations Architecture design and implementation example
    Web Intelligence, 2009
    Co-Authors: Stephan Aier, Robert Winter
    Abstract:

    IT/business alignment is one of the main topics of information systems research. If IT artifacts and business-related artifacts are coupled point-to-point, however, complex Architectures become unmanageable over time. In computer science, concepts like the ANSI/SPARC three-level database Architecture propose an Architecture Layer which decouples external views on data and the implementation view of data. In this paper, a similar approach for IT/business alignment is proposed. The proposed alignment Architecture is populated by enterprise services as elementary artifacts. Enterprise services link software components and process activities. They are aggregated into applications and subsequently into domains for planning/design and communication purposes. Most design approaches for the construction of enterprise services, applications and domains are top-down, i. e. they decompose complex artifacts on a stepwise basis. As an alternative which takes into account coupling semantics, we propose a bottom-up approach which is demonstrated for the identification of domains. Our approach is evaluated using a telecommunications equipment case study. Copyright Gabler Verlag 2009

  • Virtuelle Entkopplung von fachlichen und IT-Strukturen für das IT/Business Alignment – Grundlagen, Architekturgestaltung und Umsetzung am Beispiel der Domänenbildung
    WIRTSCHAFTSINFORMATIK, 2009
    Co-Authors: Stephan Aier, Robert Winter
    Abstract:

    Die Integration von Business und IT ist eines der Kernthemen der Wirtschaftsinformatik. Die direkte Punkt-zu-Punkt-Kopplung von fachlichen und IT-Artefakten wird den Anforderungen an die Änderbarkeit von fachlichen und IT-Architekturen nicht gerecht. Die Informatik hat beispielsweise mit der Einführung der „Dreiebenen-Datenbankarchitektur“ eine virtuelle Zuordnungsarchitektur geschaffen, die Elemente der externen und internen Ebene über die konzeptuelle Ebene entkoppelt. Dieser Beitrag entwirft analog dazu eine Alignment-Architektur für das IT/Business Alignment und stellt als entsprechende Artefakte fachliche Services, Applikationen und Domänen vor. Als Alternative zu verbreiteten Top-down-Ansätzen für die Bildung von fachlichen Services, Applikationen und Domänen wird am Beispiel der Domänenbildung ein Bottom-up-Ansatz vorgeschlagen und anhand einer Fallstudie aus der Telekommunikationsindustrie demonstriert. IT/business alignment is one of the main topics of information systems research. If IT artifacts and business-related artifacts are coupled point-to-point, however, complex Architectures become unmanageable over time. In computer science, concepts like the ANSI/SPARC three-level database Architecture propose an Architecture Layer which decouples external views on data and the implementation view of data. In this paper, a similar approach for IT/business alignment is proposed. The proposed alignment Architecture is populated by enterprise services as elementary artifacts. Enterprise services link software components and process activities. They are aggregated into applications and subsequently into domains for planning/design and communication purposes. Most design approaches for the construction of enterprise services, applications and domains are top-down, i. e. stepwise decompose complex artifacts. As an alternative which takes into account coupling semantics, we propose a bottom-up approach which is demonstrated for the identification of domains. Our approach is evaluated using a telecommunications equipment case study.

Tao Wang - One of the best experts on this subject based on the ideXlab platform.

  • grt 2 0 an fpga based sdr platform for cognitive radio networks abstract only
    Field Programmable Gate Arrays, 2017
    Co-Authors: Tao Wang, Boyan Ding, Tianfu Jiang, Jun Liu
    Abstract:

    Although there is explosive growth of theoretical research on cognitive radio, the real-time platform for cognitive radio is progressing at a low pace. Researchers expect fast prototyping their designs with appropriate wireless platforms to precisely evaluate and validate their new designs. Platforms for cognitive radio should provide both high-performance and programmability. We observed that for the parallel and reconfigurable nature, FPGA is suitable for developing real-time software-defined radio (SDR) platforms. However, without a carefully designed "middleware Architecture Layer", Real-time programmable wireless system is still difficult to build. In this paper, we present GRT 2.0, a novel high-performance and programmable SDR platform for cognitive radio. This paper focuses on the Architecture design of media access control (MAC) Layer and radio frequency (RF) front-end interface. We allocate different MAC functions into different computing units, including a dedicated, light-weight embedded processor and several peripherals, to ensure both programmability and microsecond-level timing requirements. A serial-to-parallel converter is adopted to solve the issues of frame type matching and precise timing between PHY and RF. To support mobile host computers, we use the more portable USB 3.0 interface instead of PCIe. Finally, with the design of an efficient "gain lock" state machine, automatic gain control (AGC) processing time has been reduced to less than 1us. The evaluation result shows that with 802.11a/g protocol, GRT 2.0 achieves maximum throughput of 23Mbps in MAC, which is compatible to commodity fixed-logic wireless network adaptors. The latency of RF front-end is less than 2us, over 10X performance improvement to the Ethernet cable interface. Moreover, by carefully designed "middleware Architecture Layer" in FPGA, we provide good programmability both in MAC and PHY.

  • FPGA - GRT 2.0: An FPGA-based SDR Platform for Cognitive Radio Networks (Abstract Only)
    Proceedings of the 2017 ACM SIGDA International Symposium on Field-Programmable Gate Arrays, 2017
    Co-Authors: Tao Wang, Boyan Ding, Tianfu Jiang, Jun Liu
    Abstract:

    Although there is explosive growth of theoretical research on cognitive radio, the real-time platform for cognitive radio is progressing at a low pace. Researchers expect fast prototyping their designs with appropriate wireless platforms to precisely evaluate and validate their new designs. Platforms for cognitive radio should provide both high-performance and programmability. We observed that for the parallel and reconfigurable nature, FPGA is suitable for developing real-time software-defined radio (SDR) platforms. However, without a carefully designed "middleware Architecture Layer", Real-time programmable wireless system is still difficult to build. In this paper, we present GRT 2.0, a novel high-performance and programmable SDR platform for cognitive radio. This paper focuses on the Architecture design of media access control (MAC) Layer and radio frequency (RF) front-end interface. We allocate different MAC functions into different computing units, including a dedicated, light-weight embedded processor and several peripherals, to ensure both programmability and microsecond-level timing requirements. A serial-to-parallel converter is adopted to solve the issues of frame type matching and precise timing between PHY and RF. To support mobile host computers, we use the more portable USB 3.0 interface instead of PCIe. Finally, with the design of an efficient "gain lock" state machine, automatic gain control (AGC) processing time has been reduced to less than 1us. The evaluation result shows that with 802.11a/g protocol, GRT 2.0 achieves maximum throughput of 23Mbps in MAC, which is compatible to commodity fixed-logic wireless network adaptors. The latency of RF front-end is less than 2us, over 10X performance improvement to the Ethernet cable interface. Moreover, by carefully designed "middleware Architecture Layer" in FPGA, we provide good programmability both in MAC and PHY.

Thierry Jacquin - One of the best experts on this subject based on the ideXlab platform.

  • a platform independent mechanism for deployment of business processes using abstract services
    Enterprise Distributed Object Computing, 2013
    Co-Authors: Thierry Jacquin
    Abstract:

    This paper deals with the problem of efficiently deploying business processes in service oriented environments with the purpose of enhancing operational agility and improving governance. Today's solutions rely on early coupling between the business process Layer and the underlying service oriented Architecture Layer and this constrains evolution in either of the two Layers to the ability of the other Layer to adapt. The presented approach leverages abstract architectural mappings that indirectly connect business process activities with service-based assets. It consists of a deployment mechanism that is capable of taking these mappings and generating fully executable artifacts for a variety of runtime platforms. The deployment mechanism is encapsulated in a self-contained entity that is instantiated and executed each time a business process needs to be deployed. This entity contains all the necessary data for the deployment, while ensuring complete accountability of operations. This approach promotes late binding of processes to the underlying SOA and it has the potential to significantly increase the speed of implementing changes in business operations while ensuring long-term sustainability. In addition it promotes independent evolutions of processes and services while encouraging incremental convergence of the SOA towards the needs of the business domain.

  • EDOC Workshops - A Platform-Independent Mechanism for Deployment of Business Processes Using Abstract Services
    2013 17th IEEE International Enterprise Distributed Object Computing Conference Workshops, 2013
    Co-Authors: Adrian Mos, Thierry Jacquin
    Abstract:

    This paper deals with the problem of efficiently deploying business processes in service oriented environments with the purpose of enhancing operational agility and improving governance. Today's solutions rely on early coupling between the business process Layer and the underlying service oriented Architecture Layer and this constrains evolution in either of the two Layers to the ability of the other Layer to adapt. The presented approach leverages abstract architectural mappings that indirectly connect business process activities with service-based assets. It consists of a deployment mechanism that is capable of taking these mappings and generating fully executable artifacts for a variety of runtime platforms. The deployment mechanism is encapsulated in a self-contained entity that is instantiated and executed each time a business process needs to be deployed. This entity contains all the necessary data for the deployment, while ensuring complete accountability of operations. This approach promotes late binding of processes to the underlying SOA and it has the potential to significantly increase the speed of implementing changes in business operations while ensuring long-term sustainability. In addition it promotes independent evolutions of processes and services while encouraging incremental convergence of the SOA towards the needs of the business domain.