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Yueqiang Cheng – One of the best experts on this subject based on the ideXlab platform.

  • secure and efficient software based attestation for industrial control devices with ARM Processors
    Annual Computer Security Applications Conference, 2017
    Co-Authors: Binbin Chen, Xinshu Dong, Guangdong Bai, Sumeet Jauhar, Yueqiang Cheng

    Abstract:

    For industrial control systems, ensuring the software integrity of their devices is a key security requirement. A pure software-based attestation solution is highly desirable for protecting legacy field devices that lack hardware root of trust (e.g., Trusted Platform Module). However, for the large population of field devices with ARM Processors, existing software-based attestation schemes either incur long attestation time or are insecure. In this paper, we design a novel memory stride technique that significantly reduces the attestation time while remaining secure against known attacks and their advanced variants on ARM platform. We analyze the scheme’s security and performance based on the formal framework proposed by ARMknecht et al. [7] (with a necessary change to ensure its applicability in practical settings). We also implement memory stride on two models of real-world power grid devices that are widely deployed today, and demonstrate its superior performance.

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  • ACSAC – Secure and Efficient Software-based Attestation for Industrial Control Devices with ARM Processors
    Proceedings of the 33rd Annual Computer Security Applications Conference, 2017
    Co-Authors: Binbin Chen, Xinshu Dong, Guangdong Bai, Sumeet Jauhar, Yueqiang Cheng

    Abstract:

    For industrial control systems, ensuring the software integrity of their devices is a key security requirement. A pure software-based attestation solution is highly desirable for protecting legacy field devices that lack hardware root of trust (e.g., Trusted Platform Module). However, for the large population of field devices with ARM Processors, existing software-based attestation schemes either incur long attestation time or are insecure. In this paper, we design a novel memory stride technique that significantly reduces the attestation time while remaining secure against known attacks and their advanced variants on ARM platform. We analyze the scheme’s security and performance based on the formal framework proposed by ARMknecht et al. [7] (with a necessary change to ensure its applicability in practical settings). We also implement memory stride on two models of real-world power grid devices that are widely deployed today, and demonstrate its superior performance.

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Patrick Longa – One of the best experts on this subject based on the ideXlab platform.

  • Four\(\mathbb {Q}\)NEON: Faster Elliptic Curve Scalar Multiplications on ARM Processors
    Lecture Notes in Computer Science, 2017
    Co-Authors: Patrick Longa

    Abstract:

    We present a high-speed, high-security implementation of the recently proposed elliptic curve Four\(\mathbb {Q}\) (ASIACRYPT 2015) for 32-bit ARM Processors with NEON support. Exploiting the versatile and compact arithmetic of this curve, we design a vectorized implementation that achieves high-performance across a large variety of ARM platforms. Our software is fully protected against timing and cache attacks, and showcases the impressive speed of Four\(\mathbb {Q}\) when compared with other curve-based alternatives. For example, one single variable-base scalar multiplication is computed in about 235,000 Cortex-A8 cycles or 132,000 Cortex-A15 cycles which, compared to the results of the fastest genus 2 Kummer and Curve25519 implementations on the same platforms, offer speedups between 1.3x–1.7x and between 2.1x–2.4x, respectively. In comparison with the NIST standard curve K-283, we achieve speedups above 4x and 5.5x.

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  • four mathbb q neon faster elliptic curve scalar multiplications on ARM Processors
    International Conference on Selected areas in Cryptography, 2016
    Co-Authors: Patrick Longa

    Abstract:

    We present a high-speed, high-security implementation of the recently proposed elliptic curve Four\(\mathbb {Q}\) (ASIACRYPT 2015) for 32-bit ARM Processors with NEON support. Exploiting the versatile and compact arithmetic of this curve, we design a vectorized implementation that achieves high-performance across a large variety of ARM platforms. Our software is fully protected against timing and cache attacks, and showcases the impressive speed of Four\(\mathbb {Q}\) when compared with other curve-based alternatives. For example, one single variable-base scalar multiplication is computed in about 235,000 Cortex-A8 cycles or 132,000 Cortex-A15 cycles which, compared to the results of the fastest genus 2 Kummer and Curve25519 implementations on the same platforms, offer speedups between 1.3x–1.7x and between 2.1x–2.4x, respectively. In comparison with the NIST standard curve K-283, we achieve speedups above 4x and 5.5x.

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  • fourqneon faster elliptic curve scalar multiplications on ARM Processors
    SAC, 2016
    Co-Authors: Patrick Longa

    Abstract:

    We present a high-speed, high-security implementation of the recently proposed elliptic curve FourQ (ASIACRYPT 2015) for 32-bit ARM Processors with NEON support. Exploiting the versatile and compact arithmetic of this curve, we design a vectorized implementation that achieves high-performance across a large variety of ARM platforms. Our software is fully protected against timing and cache attacks, and showcases the impressive speed of FourQ when compared with other curve-based alternatives. For example, one single variable-base scalar multiplication is computed in about 235,000 Cortex-A8 cycles or 132,000 Cortex-A15 cycles which, compared to the results of the fastest genus 2 Kummer and Curve25519 implementations on the same platforms, offer speedups between 1.3x-1.7x and between 2.1x-2.4x, respectively. In comparison with the NIST standard curve K-283, we achieve speedups above 4x and 5.5x.

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Binbin Chen – One of the best experts on this subject based on the ideXlab platform.

  • secure and efficient software based attestation for industrial control devices with ARM Processors
    Annual Computer Security Applications Conference, 2017
    Co-Authors: Binbin Chen, Xinshu Dong, Guangdong Bai, Sumeet Jauhar, Yueqiang Cheng

    Abstract:

    For industrial control systems, ensuring the software integrity of their devices is a key security requirement. A pure software-based attestation solution is highly desirable for protecting legacy field devices that lack hardware root of trust (e.g., Trusted Platform Module). However, for the large population of field devices with ARM Processors, existing software-based attestation schemes either incur long attestation time or are insecure. In this paper, we design a novel memory stride technique that significantly reduces the attestation time while remaining secure against known attacks and their advanced variants on ARM platform. We analyze the scheme’s security and performance based on the formal framework proposed by ARMknecht et al. [7] (with a necessary change to ensure its applicability in practical settings). We also implement memory stride on two models of real-world power grid devices that are widely deployed today, and demonstrate its superior performance.

    Free Register to Access Article

  • ACSAC – Secure and Efficient Software-based Attestation for Industrial Control Devices with ARM Processors
    Proceedings of the 33rd Annual Computer Security Applications Conference, 2017
    Co-Authors: Binbin Chen, Xinshu Dong, Guangdong Bai, Sumeet Jauhar, Yueqiang Cheng

    Abstract:

    For industrial control systems, ensuring the software integrity of their devices is a key security requirement. A pure software-based attestation solution is highly desirable for protecting legacy field devices that lack hardware root of trust (e.g., Trusted Platform Module). However, for the large population of field devices with ARM Processors, existing software-based attestation schemes either incur long attestation time or are insecure. In this paper, we design a novel memory stride technique that significantly reduces the attestation time while remaining secure against known attacks and their advanced variants on ARM platform. We analyze the scheme’s security and performance based on the formal framework proposed by ARMknecht et al. [7] (with a necessary change to ensure its applicability in practical settings). We also implement memory stride on two models of real-world power grid devices that are widely deployed today, and demonstrate its superior performance.

    Free Register to Access Article