Bandwidth Requirement

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Satoshi Goto - One of the best experts on this subject based on the ideXlab platform.

  • a 1 59gpixel s motion estimation processor with 211 to 211 search range for uhdtv video encoder
    Symposium on VLSI Circuits, 2013
    Co-Authors: Jinjia Zhou, Dajiang Zhou, Gang He, Satoshi Goto
    Abstract:

    A motion estimation (ME) processor for H.264 encoder is implemented in 40nm CMOS. With algorithm and architecture co-optimization, its throughput reaches 1.59Gpixel/s for 7680×4320p 48fps video, at least 7.5 times faster than previous chips. Its core power dissipation is 622mW at 210MHz, with energy efficiency improved by 23%. DRAM Bandwidth Requirement is reduced by 68%. With a maximum search range of ±211 (horizontal) by ±106 (vertical) around a predictive search center, the proposed ME processor well accommodates the large motion of ultra-high-resolution video.

  • an adaptive Bandwidth reduction scheme for video coding
    International Symposium on Circuits and Systems, 2010
    Co-Authors: Liu Song, Dajiang Zhou, Xin Jin, Satoshi Goto, Peilin Liu
    Abstract:

    In high definition video decoders for the standard like H.264, Bandwidth Requirement is a critical design issue due to the overwhelming amount of memory data access. This paper proposes a new adaptive reference frame compression scheme to reduce external memory Bandwidth consumption. An efficient variable length coding is proposed to compress each processing unit efficiently. Moreover, an adaptive compression mode decision unit is proposed to adaptively choose the best compression mode according to the image characteristic and Bandwidth Requirement. As a result, the proposed scheme achieves efficient Bandwidth reduction with little image quality loss. The experimental results show that, at the same Bandwidth reduction ratio the proposed algorithm achieves up-to 0.7 dB gain compared to the existing approaches.

Marwan Krunz - One of the best experts on this subject based on the ideXlab platform.

S H G Chan - One of the best experts on this subject based on the ideXlab platform.

  • multipath routing for video delivery over Bandwidth limited networks
    IEEE Journal on Selected Areas in Communications, 2004
    Co-Authors: Jiancong Chen, S H G Chan
    Abstract:

    The delivery of quality video service often requires high Bandwidth with low delay or cost in network transmission. Current routing protocols such as those used in the Internet are mainly based on the single-path approach (e.g., the shortest-path routing). This approach cannot meet the end-to-end Bandwidth Requirement when the video is streamed over Bandwidth-limited networks. In order to overcome this limitation, we propose multipath routing, where the video takes multiple paths to reach its destination(s), thereby increasing the aggregate throughput. We consider both unicast (point-to-point) and multicast scenarios. For unicast, we present an efficient multipath heuristic (of complexity O(|V|/sup 3/)), which achieves high Bandwidth with low delay. Given a set of path lengths, we then present and prove a simple data scheduling algorithm as implemented at the server, which achieves the theoretical minimum end-to-end delay. For a network with unit-capacity links, the algorithm, when combined with disjoint-path routing, offers an exact and efficient solution to meet a Bandwidth Requirement with minimum delay. For multicast, we study the construction of multiple trees for layered video to satisfy the user Bandwidth Requirements. We propose two efficient heuristics on how such trees can be constructed so as to minimize the cost of their aggregation subject to a delay constraint.

  • multipath routing for video unicast over Bandwidth limited networks
    Global Communications Conference, 2001
    Co-Authors: Jiancong Chen, S H G Chan
    Abstract:

    Video applications, such as video-on-demand systems, in general have Bandwidth and delay constraints. Such QoS Requirements can no longer be guaranteed when video is transmitted with the traditional shortest-path routing over a Bandwidth-limited network such as the Internet. We propose multipath routing algorithms for video unicast so as to meet a certain Bandwidth Requirement with minimum start-up delay (and hence low user buffer Requirement). We first formulate the problem which in its most general form is difficult to solve. However, for the special case where the network links are of unit capacity, we present an exact solution using a k-shortest-disjoint paths algorithm with video rescheduling in the source. For the most general case, we propose an efficient heuristic based on max-flow and shortest path algorithms. The complexity of such an algorithm is only O(|V|/sup 3/), where |V| is the number of nodes in the network. Extensive simulation results show that the multipath approach meets the Bandwidth Requirement with a delay close to that of shortest-path routing.

Madhukar Budagavi - One of the best experts on this subject based on the ideXlab platform.

  • memory Bandwidth and power reduction using lossy reference frame compression in video encoding
    IEEE Transactions on Circuits and Systems for Video Technology, 2011
    Co-Authors: Ajit Deepak Gupte, Bharadwaj Amrutur, M M Mehendale, Madhukar Budagavi
    Abstract:

    Large external memory Bandwidth Requirement leads to increased system power dissipation and cost in video coding application. Majority of the external memory traffic in video encoder is due to reference data accesses. We describe a lossy reference frame compression technique that can be used in video coding with minimal impact on quality while significantly reducing power and Bandwidth Requirement. The low cost transformless compression technique uses lossy reference for motion estimation to reduce memory traffic, and lossless reference for motion compensation (MC) to avoid drift. Thus, it is compatible with all existing video standards. We calculate the quantization error bound and show that by storing quantization error separately, Bandwidth overhead due to MC can be reduced significantly. The technique meets key Requirements specific to the video encode application. 24-39% reduction in peak Bandwidth and 23-31% reduction in total average power consumption are observed for IBBP sequences.

Stephan J Jourdan - One of the best experts on this subject based on the ideXlab platform.

  • exploring instruction fetch Bandwidth Requirement in wide issue superscalar processors
    International Conference on Parallel Architectures and Compilation Techniques, 1999
    Co-Authors: Pierre Michaud, Andre Seznec, Stephan J Jourdan
    Abstract:

    The effective performance of wide-issue superscalar processors depends on many parameters, such as branch prediction accuracy, available instruction-level parallelism, and instruction-fetch Bandwidth. This paper explores the relations between some of these parameters, and more particularly, the Requirement in instruction-fetch Bandwidth. We introduce new enhancements to boost effectively the instruction-fetch Bandwidth of conventional fetch engines. However, experiments strongly show that performance improves less for a given instruction-fetch Bandwidth gain as the base fetch Bandwidth increases. At the level of Bandwidth exhibited by the proposed schemes, the performance improvement is small. This clearly brings to light potential relations between the fetch Bandwidth and the other parameters. We provide a model to explain this behaviour and quantify some relations. Based on the experimental observation that the available parallelism in an instruction window of size N grows as the square root /spl radic/N, we derive from the model that the instruction fetch Bandwidth Requirement increases as the square root of the distance between mispredicted branches. We also show that the instruction fetch Bandwidth Requirement increases linearly with the parallelism available in a fixed-size instruction window.

  • IEEE PACT - Exploring instruction-fetch Bandwidth Requirement in wide-issue superscalar processors
    1999 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00425), 1
    Co-Authors: Pierre Michaud, Andre Seznec, Stephan J Jourdan
    Abstract:

    The effective performance of wide-issue superscalar processors depends on many parameters, such as branch prediction accuracy, available instruction-level parallelism, and instruction-fetch Bandwidth. This paper explores the relations between some of these parameters, and more particularly, the Requirement in instruction-fetch Bandwidth. We introduce new enhancements to boost effectively the instruction-fetch Bandwidth of conventional fetch engines. However, experiments strongly show that performance improves less for a given instruction-fetch Bandwidth gain as the base fetch Bandwidth increases. At the level of Bandwidth exhibited by the proposed schemes, the performance improvement is small. This clearly brings to light potential relations between the fetch Bandwidth and the other parameters. We provide a model to explain this behaviour and quantify some relations. Based on the experimental observation that the available parallelism in an instruction window of size N grows as the square root /spl radic/N, we derive from the model that the instruction fetch Bandwidth Requirement increases as the square root of the distance between mispredicted branches. We also show that the instruction fetch Bandwidth Requirement increases linearly with the parallelism available in a fixed-size instruction window.