Buffer Memory

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Hojun Shim - One of the best experts on this subject based on the ideXlab platform.

  • a compressed frame Buffer to reduce display power consumption in mobile systems
    Asia and South Pacific Design Automation Conference, 2004
    Co-Authors: Hojun Shim, Naehyuck Chang, Massoud Pedram
    Abstract:

    Despite the limited power available in a battery-operated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver the necessary information. We introduce some methodologies for frame Buffer compression that efficiently reduce the power consumption of display systems and thus distinctly extend battery life for hand-held applications. Our algorithm is based on a run-length encoding for on-the-fly compression, with a negligible burden in resources and time. We present an adaptive and incremental re-compression technique to maintain efficiency under frequent partial frame Buffer updates. We save about 30% to 90% frame Buffer activity on average for various hand-held applications. We have implemented an LCD controller with frame Buffer compression occupying 1,026 slices and 960 flip-flops in a Xilinx Sprantan-II FPGA, which has an equivalent gate count of 65,000 gates. It consumes 30mW more power and 10% additional silicon space than an LCD controller without frame Buffer compression, but reduces the power consumption of the frame Buffer Memory by 400mW.

  • low power color tft lcd display for hand held embedded systems
    International Symposium on Low Power Electronics and Design, 2002
    Co-Authors: Inseok Choi, Hojun Shim, Naehyuck Chang
    Abstract:

    An LCD (Liquid Crystal Display) is a standard display device for hand-held embedded systems. Today, color TFT (Thin-Film Transistor) LCDs are common even in cost-effective equipments. An LCD display system is composed of an LCD panel, a frame Buffer Memory, an LCD and frame Buffer controller, and a backlight inverter and lamp. All of them are heavy power consumers, and their portion becomes much more dominant when running interactive applications. This is because interactive applications are often triggered by human inputs and thus result in a lot of slack time in the CPU and Memory system, which can be effectively used for dynamic power management.

  • Low-power color TFT LCD display for hand-held embedded systems
    Proceedings of the International Symposium on Low Power Electronics and Design, 2002
    Co-Authors: Inseok Choi, Hojun Shim
    Abstract:

    An LCD (Liquid Crystal Display) is a standard display device for hand-held embedded systems. Today, color TFT (Thin-Film Transistor) LCDs are common even in cost-effective equipments. An LCD display system is composed of an LCD panel, a frame Buffer Memory, an LCD and frame Buffer controller, and a backlight inverter and lamp. All of them are heavy power consumers, and their portion becomes much more dominant when running interactive applications. This is because interactive applications are often triggered by human inputs and thus result in a lot of slack time in the CPU and Memory system, which can be effectively used for dynamic power management. In this paper, we introduce low-power LCD display schemes as a system-level approach. We accurately characterize the energy consumption at the component level and minimize energy consumption of each component without appreciable display quality degradation. We develop several techniques such as variable-duty-ratio refresh, dynamic-color-depth control and backlight luminance dimming with brightness compensation or contrast enhancement.

Naehyuck Chang - One of the best experts on this subject based on the ideXlab platform.

  • a compressed frame Buffer to reduce display power consumption in mobile systems
    Asia and South Pacific Design Automation Conference, 2004
    Co-Authors: Hojun Shim, Naehyuck Chang, Massoud Pedram
    Abstract:

    Despite the limited power available in a battery-operated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver the necessary information. We introduce some methodologies for frame Buffer compression that efficiently reduce the power consumption of display systems and thus distinctly extend battery life for hand-held applications. Our algorithm is based on a run-length encoding for on-the-fly compression, with a negligible burden in resources and time. We present an adaptive and incremental re-compression technique to maintain efficiency under frequent partial frame Buffer updates. We save about 30% to 90% frame Buffer activity on average for various hand-held applications. We have implemented an LCD controller with frame Buffer compression occupying 1,026 slices and 960 flip-flops in a Xilinx Sprantan-II FPGA, which has an equivalent gate count of 65,000 gates. It consumes 30mW more power and 10% additional silicon space than an LCD controller without frame Buffer compression, but reduces the power consumption of the frame Buffer Memory by 400mW.

  • low power color tft lcd display for hand held embedded systems
    International Symposium on Low Power Electronics and Design, 2002
    Co-Authors: Inseok Choi, Hojun Shim, Naehyuck Chang
    Abstract:

    An LCD (Liquid Crystal Display) is a standard display device for hand-held embedded systems. Today, color TFT (Thin-Film Transistor) LCDs are common even in cost-effective equipments. An LCD display system is composed of an LCD panel, a frame Buffer Memory, an LCD and frame Buffer controller, and a backlight inverter and lamp. All of them are heavy power consumers, and their portion becomes much more dominant when running interactive applications. This is because interactive applications are often triggered by human inputs and thus result in a lot of slack time in the CPU and Memory system, which can be effectively used for dynamic power management.

Marina Thottan - One of the best experts on this subject based on the ideXlab platform.

  • Greening Router Line-Cards via Dynamic Management of Packet Memory
    IEEE Journal on Selected Areas in Communications, 2016
    Co-Authors: Vijay Sivaraman, Diethelm Ostry, Marina Thottan
    Abstract:

    Continued scaling of switching capacity in the Internet core is threatened by power considerations. Internet service providers face increased carbon footprint and operational costs, while router manufacturers encounter upper limits on switching capacity per rack. This paper studies the role of packet Buffer Memory on the power consumption of backbone routers. Our first contribution is to estimate from published datasheets the energy costs of static RAM/dynamic RAM packet-Buffer Memory, showing that it accounts for over 10% of power consumption in a typical router line-card; we then show, using empirical data from core and enterprise networks, that much of this Memory is used for only a small fraction of time. Our second contribution is to develop a simple yet practical algorithm for putting much of the Memory components to sleep and waking them as needed, while being able to control resulting traffic performance degradation in the form of packet loss during transient congestion. Finally, we conduct a comprehensive evaluation of our scheme, via analytical models pertaining to long-range-dependent traffic, using simulations of offline traffic traces taken from carrier/enterprise networks as well as online Transmission Control Protocol flows in ns2, and by implementing our scheme on a programmable-router test bed. This paper is the first to show the feasibility of, and energy savings from, dynamic management of packet Buffer Memory in core routers in the market today.

Mateo Valero - One of the best experts on this subject based on the ideXlab platform.

  • efficient routing mechanisms for dragonfly networks
    International Conference on Parallel Processing, 2013
    Co-Authors: Marina Garcia, Enrique Vallejo, Ramon Beivide, Miguel Odriozola, Mateo Valero
    Abstract:

    High-radix hierarchical networks are cost-effective topologies for large scale computers. In such networks, routers are organized in super nodes, with local and global interconnections. These networks, known as Dragonflies, outperform traditional topologies such as multi-trees or tori, in cost and scalability. However, depending on the traffic pattern, network congestion can lead to degraded performance. Misrouting (non-minimal routing) can be employed to avoid saturated global or local links. Nevertheless, with the current deadlock avoidance mechanisms used for these networks, supporting misrouting implies routers with a larger number of virtual channels. This exacerbates the Buffer Memory requirements that constitute one of the main constraints in high-radix switches. In this paper we introduce two novel deadlock-free routing mechanisms for Dragonfly networks that support on-the-fly adaptive routing. Using these schemes both global and local misrouting are allowed employing the same number of virtual channels as in previous proposals. Opportunistic Local Misrouting obtains the best performance by providing the highest routing freedom, and relying on a deadlock-free escape path to the destination for every packet. However, it requires Virtual Cut-Through flow-control. By contrast, Restricted Local Misrouting prevents the appearance of cycles thanks to a restriction of the possible routes within super nodes. This makes this mechanism suitable for both Virtual Cut-Through and Wormhole networks. Evaluations show that the proposed deadlock-free routing mechanisms prevent the most frequent pathological issues of Dragonfly networks. As a result, they provide higher performance than previous schemes, while requiring the same area devoted to router Buffers.

Massoud Pedram - One of the best experts on this subject based on the ideXlab platform.

  • a compressed frame Buffer to reduce display power consumption in mobile systems
    Asia and South Pacific Design Automation Conference, 2004
    Co-Authors: Hojun Shim, Naehyuck Chang, Massoud Pedram
    Abstract:

    Despite the limited power available in a battery-operated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver the necessary information. We introduce some methodologies for frame Buffer compression that efficiently reduce the power consumption of display systems and thus distinctly extend battery life for hand-held applications. Our algorithm is based on a run-length encoding for on-the-fly compression, with a negligible burden in resources and time. We present an adaptive and incremental re-compression technique to maintain efficiency under frequent partial frame Buffer updates. We save about 30% to 90% frame Buffer activity on average for various hand-held applications. We have implemented an LCD controller with frame Buffer compression occupying 1,026 slices and 960 flip-flops in a Xilinx Sprantan-II FPGA, which has an equivalent gate count of 65,000 gates. It consumes 30mW more power and 10% additional silicon space than an LCD controller without frame Buffer compression, but reduces the power consumption of the frame Buffer Memory by 400mW.