The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform

Jhyy Cheng Liou - One of the best experts on this subject based on the ideXlab platform.

  • high reliability dynamic threshold source side injection for 2 bit Cell with mlc Operation of wrapped select gate sonos in nor type flash memory
    IEEE Transactions on Electron Devices, 2010
    Co-Authors: Kuanti Wang, Tiensheng Chao, Wenluh Yang, Tsungmin Hsieh, Jhyy Cheng Liou, Tzuping Chen, Chienhung Chen, Chienhsing Lee, Shende Wang, Chihhung Lin
    Abstract:

    For the first time, a high-performance (τPGM = 200 ns/τERS = 5 ms) Cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/Cell Operation. Using DTSSI enables easy extraction of the multilevel states with a tight VTH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.

  • optimized ono thickness for multi level and 2 bit Cell Operation for wrapped select gate wsg sonos memory
    Semiconductor Science and Technology, 2008
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Chaosung Lai, Ming Wen, Chienhsing Lee, Jhyy Cheng Liou
    Abstract:

    In this paper, highly reliable wrapped-select-gate (WSG) silicon–oxide–nitride–oxide–silicon (SONOS) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism for WSG-SONOS memory with different ONO thickness was thoroughly investigated. The different programming efficiencies of the WSG-SONOS memory under different ONO thicknesses are explained by the lateral electrical field extracted from the simulation results. Furthermore, multi-level storage is easily obtained, and good VTH distribution presented, for the WSG-SONOS memory with optimized ONO thickness. High program/erase speed (10 µs/5 ms) and low programming current (3.5 µA) are used to achieve the multi-level Operation with tolerable gate and drain disturbance, negligible second-bit effect, exCellent data retention and good endurance performance.

  • highly reliable multilevel and 2 bit Cell Operation of wrapped select gate wsg sonos memory
    IEEE Electron Device Letters, 2007
    Co-Authors: Woeicherng Wu, Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Jhyy Cheng Liou
    Abstract:

    In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory Cells with multilevel and 2-bit/Cell Operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mus/5 ms) and low programming current (3.5 muA) for our WSG SONOS by a source-side injection. Besides the exCellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (>150degC) and good endurance (>104) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/Cell Operation can be used in future high-density and high-performance memory application

Tiensheng Chao - One of the best experts on this subject based on the ideXlab platform.

  • high reliability dynamic threshold source side injection for 2 bit Cell with mlc Operation of wrapped select gate sonos in nor type flash memory
    IEEE Transactions on Electron Devices, 2010
    Co-Authors: Kuanti Wang, Tiensheng Chao, Wenluh Yang, Tsungmin Hsieh, Jhyy Cheng Liou, Tzuping Chen, Chienhung Chen, Chienhsing Lee, Shende Wang, Chihhung Lin
    Abstract:

    For the first time, a high-performance (τPGM = 200 ns/τERS = 5 ms) Cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/Cell Operation. Using DTSSI enables easy extraction of the multilevel states with a tight VTH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.

  • optimized ono thickness for multi level and 2 bit Cell Operation for wrapped select gate wsg sonos memory
    Semiconductor Science and Technology, 2008
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Chaosung Lai, Ming Wen, Chienhsing Lee, Jhyy Cheng Liou
    Abstract:

    In this paper, highly reliable wrapped-select-gate (WSG) silicon–oxide–nitride–oxide–silicon (SONOS) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism for WSG-SONOS memory with different ONO thickness was thoroughly investigated. The different programming efficiencies of the WSG-SONOS memory under different ONO thicknesses are explained by the lateral electrical field extracted from the simulation results. Furthermore, multi-level storage is easily obtained, and good VTH distribution presented, for the WSG-SONOS memory with optimized ONO thickness. High program/erase speed (10 µs/5 ms) and low programming current (3.5 µA) are used to achieve the multi-level Operation with tolerable gate and drain disturbance, negligible second-bit effect, exCellent data retention and good endurance performance.

  • a highly reliable multi level and 2 bit Cell Operation of wrapped select gate wsg sonos memory with optimized ono thickness
    International Symposium on VLSI Technology Systems and Applications, 2007
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Chaosung Lai, Tzuping Chen, Chienhung Chen, Chihhung Lin
    Abstract:

    High-performance wrapped-select-gate (WSG) SONOS (silicon-oxide-nitride-silicon) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism with different ONO thickness in WSG-SONOS memory was well investigated. The different programming efficiency of the WSG-SONOS memory with different ONO thickness can be explained by the lateral electrical field extracted from the simulation. Furthermore, multi-level storage is easily obtained and well Vth distribution is also presented. High program/erase speed (10 us/5 ms) and low programming current (3.5 u/A) are performed to achieve the multi-level Operation with exCellent gate and drain disturbance, second-bit effect, data retention and endurance.

  • highly reliable multilevel and 2 bit Cell Operation of wrapped select gate wsg sonos memory
    IEEE Electron Device Letters, 2007
    Co-Authors: Woeicherng Wu, Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Jhyy Cheng Liou
    Abstract:

    In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory Cells with multilevel and 2-bit/Cell Operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mus/5 ms) and low programming current (3.5 muA) for our WSG SONOS by a source-side injection. Besides the exCellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (>150degC) and good endurance (>104) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/Cell Operation can be used in future high-density and high-performance memory application

  • ahighly reliable multi level and2 bit Cell Operation ofwrapped select gate wsg sonos
    2007
    Co-Authors: Tiensheng Chao, Jerchyi Wang, Jianhao Chen, Chaosung Lai, Tzuping Chen, Chienhung Chen, Chihhung Lin
    Abstract:

    electric field atp-njunction, whileforthethickONO stacks High-performance wrapped-select-gate (WSG) SONGS (60/80/100), theelectric field atthegapincreased gradually asshown (silicon-oxide-nitride-silicon) memoryCells withmulti-level and inFig. 5. 2-bit/Cell Operation havebeensuccessfully demonstrated. The Figures 6 and7 demonstrated thedrain andgatedisturbance source-side injection mechanism withdifferent ONO thickness in performance oftheWSG-SONOSmemorywithdifferent ONO WSG-SONOS memorywas wellinvestigated. The differentthickness forthe multi-level Operation, respectively. Fromthese figures, programming efficiency oftheWSG-SONOSmemorywithdifferentwecaneasily observe that thethick topoxide will contribute tobetter ONO thickness canbeexplained bythelateral electrical field extractedgate disturbance while thedrain disturbance isnotaffected bytheONO fromthesimulation. Furthermore, multi-level storage iseasily obtainedthickness. Moreover, thethin bottom oxide exhibits better P/E cycling andwellVthdistribution isalso presented. Highprogram/erase speed performance resulted intheVFl shift owingtotheless interface states (1Ous/5ms) andlowprogramming current (3.5uA) areperformed to generation asindicated inFig.8.To sumup,theONO thickness achieve themulti-level Operation withexCellent gateanddrain (50/80/100) usedintheWSG-SONOSmemoryshould beoptimized to disturbance, second-bit effect, data retention andendurance. gethighperformance andbetter reliability.

Wenluh Yang - One of the best experts on this subject based on the ideXlab platform.

  • high reliability dynamic threshold source side injection for 2 bit Cell with mlc Operation of wrapped select gate sonos in nor type flash memory
    IEEE Transactions on Electron Devices, 2010
    Co-Authors: Kuanti Wang, Tiensheng Chao, Wenluh Yang, Tsungmin Hsieh, Jhyy Cheng Liou, Tzuping Chen, Chienhung Chen, Chienhsing Lee, Shende Wang, Chihhung Lin
    Abstract:

    For the first time, a high-performance (τPGM = 200 ns/τERS = 5 ms) Cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/Cell Operation. Using DTSSI enables easy extraction of the multilevel states with a tight VTH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.

  • optimized ono thickness for multi level and 2 bit Cell Operation for wrapped select gate wsg sonos memory
    Semiconductor Science and Technology, 2008
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Chaosung Lai, Ming Wen, Chienhsing Lee, Jhyy Cheng Liou
    Abstract:

    In this paper, highly reliable wrapped-select-gate (WSG) silicon–oxide–nitride–oxide–silicon (SONOS) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism for WSG-SONOS memory with different ONO thickness was thoroughly investigated. The different programming efficiencies of the WSG-SONOS memory under different ONO thicknesses are explained by the lateral electrical field extracted from the simulation results. Furthermore, multi-level storage is easily obtained, and good VTH distribution presented, for the WSG-SONOS memory with optimized ONO thickness. High program/erase speed (10 µs/5 ms) and low programming current (3.5 µA) are used to achieve the multi-level Operation with tolerable gate and drain disturbance, negligible second-bit effect, exCellent data retention and good endurance performance.

  • a highly reliable multi level and 2 bit Cell Operation of wrapped select gate wsg sonos memory with optimized ono thickness
    International Symposium on VLSI Technology Systems and Applications, 2007
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Chaosung Lai, Tzuping Chen, Chienhung Chen, Chihhung Lin
    Abstract:

    High-performance wrapped-select-gate (WSG) SONOS (silicon-oxide-nitride-silicon) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism with different ONO thickness in WSG-SONOS memory was well investigated. The different programming efficiency of the WSG-SONOS memory with different ONO thickness can be explained by the lateral electrical field extracted from the simulation. Furthermore, multi-level storage is easily obtained and well Vth distribution is also presented. High program/erase speed (10 us/5 ms) and low programming current (3.5 u/A) are performed to achieve the multi-level Operation with exCellent gate and drain disturbance, second-bit effect, data retention and endurance.

  • highly reliable multilevel and 2 bit Cell Operation of wrapped select gate wsg sonos memory
    IEEE Electron Device Letters, 2007
    Co-Authors: Woeicherng Wu, Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Jhyy Cheng Liou
    Abstract:

    In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory Cells with multilevel and 2-bit/Cell Operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mus/5 ms) and low programming current (3.5 muA) for our WSG SONOS by a source-side injection. Besides the exCellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (>150degC) and good endurance (>104) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/Cell Operation can be used in future high-density and high-performance memory application

Tsungmin Hsieh - One of the best experts on this subject based on the ideXlab platform.

  • high reliability dynamic threshold source side injection for 2 bit Cell with mlc Operation of wrapped select gate sonos in nor type flash memory
    IEEE Transactions on Electron Devices, 2010
    Co-Authors: Kuanti Wang, Tiensheng Chao, Wenluh Yang, Tsungmin Hsieh, Jhyy Cheng Liou, Tzuping Chen, Chienhung Chen, Chienhsing Lee, Shende Wang, Chihhung Lin
    Abstract:

    For the first time, a high-performance (τPGM = 200 ns/τERS = 5 ms) Cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/Cell Operation. Using DTSSI enables easy extraction of the multilevel states with a tight VTH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.

  • optimized ono thickness for multi level and 2 bit Cell Operation for wrapped select gate wsg sonos memory
    Semiconductor Science and Technology, 2008
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Chaosung Lai, Ming Wen, Chienhsing Lee, Jhyy Cheng Liou
    Abstract:

    In this paper, highly reliable wrapped-select-gate (WSG) silicon–oxide–nitride–oxide–silicon (SONOS) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism for WSG-SONOS memory with different ONO thickness was thoroughly investigated. The different programming efficiencies of the WSG-SONOS memory under different ONO thicknesses are explained by the lateral electrical field extracted from the simulation results. Furthermore, multi-level storage is easily obtained, and good VTH distribution presented, for the WSG-SONOS memory with optimized ONO thickness. High program/erase speed (10 µs/5 ms) and low programming current (3.5 µA) are used to achieve the multi-level Operation with tolerable gate and drain disturbance, negligible second-bit effect, exCellent data retention and good endurance performance.

  • highly reliable multilevel and 2 bit Cell Operation of wrapped select gate wsg sonos memory
    IEEE Electron Device Letters, 2007
    Co-Authors: Woeicherng Wu, Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Tsungmin Hsieh, Jhyy Cheng Liou
    Abstract:

    In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory Cells with multilevel and 2-bit/Cell Operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mus/5 ms) and low programming current (3.5 muA) for our WSG SONOS by a source-side injection. Besides the exCellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (>150degC) and good endurance (>104) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/Cell Operation can be used in future high-density and high-performance memory application

Chihhung Lin - One of the best experts on this subject based on the ideXlab platform.

  • high reliability dynamic threshold source side injection for 2 bit Cell with mlc Operation of wrapped select gate sonos in nor type flash memory
    IEEE Transactions on Electron Devices, 2010
    Co-Authors: Kuanti Wang, Tiensheng Chao, Wenluh Yang, Tsungmin Hsieh, Jhyy Cheng Liou, Tzuping Chen, Chienhung Chen, Chienhsing Lee, Shende Wang, Chihhung Lin
    Abstract:

    For the first time, a high-performance (τPGM = 200 ns/τERS = 5 ms) Cell with superior reliability characteristics is demonstrated in a nor-type architecture, using dynamic-threshold source-side injection (DTSSI) in a wrapped select-gate silicon-oxide-nitride-oxide-silicon memory device, with multilevel and 2-bit/Cell Operation. Using DTSSI enables easy extraction of the multilevel states with a tight VTH distribution, a nearly negligible second-bit effect, superior endurance characteristics, and good data retention.

  • a highly reliable multi level and 2 bit Cell Operation of wrapped select gate wsg sonos memory with optimized ono thickness
    International Symposium on VLSI Technology Systems and Applications, 2007
    Co-Authors: Tiensheng Chao, Wuchin Peng, Wenluh Yang, Jerchyi Wang, Jianhao Chen, Tsungyu Yang, Chaosung Lai, Tzuping Chen, Chienhung Chen, Chihhung Lin
    Abstract:

    High-performance wrapped-select-gate (WSG) SONOS (silicon-oxide-nitride-silicon) memory Cells with multi-level and 2-bit/Cell Operation have been successfully demonstrated. The source-side injection mechanism with different ONO thickness in WSG-SONOS memory was well investigated. The different programming efficiency of the WSG-SONOS memory with different ONO thickness can be explained by the lateral electrical field extracted from the simulation. Furthermore, multi-level storage is easily obtained and well Vth distribution is also presented. High program/erase speed (10 us/5 ms) and low programming current (3.5 u/A) are performed to achieve the multi-level Operation with exCellent gate and drain disturbance, second-bit effect, data retention and endurance.

  • ahighly reliable multi level and2 bit Cell Operation ofwrapped select gate wsg sonos
    2007
    Co-Authors: Tiensheng Chao, Jerchyi Wang, Jianhao Chen, Chaosung Lai, Tzuping Chen, Chienhung Chen, Chihhung Lin
    Abstract:

    electric field atp-njunction, whileforthethickONO stacks High-performance wrapped-select-gate (WSG) SONGS (60/80/100), theelectric field atthegapincreased gradually asshown (silicon-oxide-nitride-silicon) memoryCells withmulti-level and inFig. 5. 2-bit/Cell Operation havebeensuccessfully demonstrated. The Figures 6 and7 demonstrated thedrain andgatedisturbance source-side injection mechanism withdifferent ONO thickness in performance oftheWSG-SONOSmemorywithdifferent ONO WSG-SONOS memorywas wellinvestigated. The differentthickness forthe multi-level Operation, respectively. Fromthese figures, programming efficiency oftheWSG-SONOSmemorywithdifferentwecaneasily observe that thethick topoxide will contribute tobetter ONO thickness canbeexplained bythelateral electrical field extractedgate disturbance while thedrain disturbance isnotaffected bytheONO fromthesimulation. Furthermore, multi-level storage iseasily obtainedthickness. Moreover, thethin bottom oxide exhibits better P/E cycling andwellVthdistribution isalso presented. Highprogram/erase speed performance resulted intheVFl shift owingtotheless interface states (1Ous/5ms) andlowprogramming current (3.5uA) areperformed to generation asindicated inFig.8.To sumup,theONO thickness achieve themulti-level Operation withexCellent gateanddrain (50/80/100) usedintheWSG-SONOSmemoryshould beoptimized to disturbance, second-bit effect, data retention andendurance. gethighperformance andbetter reliability.