The Experts below are selected from a list of 321 Experts worldwide ranked by ideXlab platform
Guo-wei Huang - One of the best experts on this subject based on the ideXlab platform.
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low frequency noise in sonos tft with a trigate nanowire structure under program erase operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
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Low-Frequency Noise in SONOS-TFT With a Trigate Nanowire Structure Under Program/Erase Operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
Yung-chun Wu - One of the best experts on this subject based on the ideXlab platform.
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Performance evaluation of Si ultra-thin body (1 nm) junctionless FET with LG = 1 nm and LG = 3 nm
2015 Silicon Nanoelectronics Workshop (SNW), 2015Co-Authors: Yi-ruei Jhan, Yung-chun WuAbstract:A Si ultra-thin body (UTB) junctionless field-effect transistor (UTB-JLFET) with LG = 1 nm and LG = 3 nm have been demonstrated by solving the coupled drift-diffusion (DD) and density-gradient (DG) model. The simulation results show that the Si can be used in ultra-short Channel Device as long as UTB is employed. As UTB is employed, ultra-short Channel Device does not need to follow an empirical rule of Tch = LG / 3. Furthermore, UTB-JLFET 6T-SRAM cell has reasonable static noise margin (SNM) value of 138 mV. The circuit performances reveal UTB-JLFET can be used for sub-5 nm CMOS technology nodes.
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Performance Evaluation of Silicon and Germanium Ultrathin Body (1 nm) Junctionless Field-Effect Transistor With Ultrashort Gate Length (1 nm and 3 nm)
IEEE Electron Device Letters, 2015Co-Authors: Yi-ruei Jhan, Vasanthan Thirunavukkarasu, Cheng-ping Wang, Yung-chun WuAbstract:Silicon (Si) and Germanium (Ge) ultrathin body junctionless field-effect transistor (UTB-JLFET) with LG= 1 nm and LG = 3 nm were demonstrated by solving the coupled drift-diffusion and density-gradient model. The simulation results show that the Si and Ge Channel can be used in ultrashort Channel Device as long as UTB is employed. As UTB is employed, ultra-short Channel Device does not need to follow an empirical rule of Teh = LG/3. Furthermore, Ge UTB-JLFET 6T-SRAM cell has reasonable static noise margin value of 149 mV. The circuit performances reveal that UTB-JLFET can be used for sub-5-nm CMOS technology nodes.
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low frequency noise in sonos tft with a trigate nanowire structure under program erase operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
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Low-Frequency Noise in SONOS-TFT With a Trigate Nanowire Structure Under Program/Erase Operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
Hsin-hui Hu - One of the best experts on this subject based on the ideXlab platform.
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low frequency noise in sonos tft with a trigate nanowire structure under program erase operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
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Low-Frequency Noise in SONOS-TFT With a Trigate Nanowire Structure Under Program/Erase Operation
IEEE Electron Device Letters, 2012Co-Authors: Hsin-hui Hu, Yong-ren Jheng, Yung-chun Wu, Min-feng Hung, Guo-wei HuangAbstract:This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) Channels. The difference in the flicker noise (1/f) level between a multiple-Channel NW Device and a standard single-Channel Device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
L.b. Wolff - One of the best experts on this subject based on the ideXlab platform.
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Underwater partial polarization signatures from the SHallow water Real-time IMaging Polarimeter (SHRIMP)
OCEANS '02 MTS IEEE, 2002Co-Authors: J.s. Taylor, P.s. Davis, L.b. WolffAbstract:Research has shown that naturally occurring light outdoors and underwater is partially linearly polarized. The polarized component can be combined to form an image that describes the polarization of the light in the scene. This image is known as the degree of linear polarization image or partial polarization image. These naturally occurring polarization signatures can provide a diver or an unmanned underwater vehicle with more information to detect, classify and identify threats such as obstacles and/or mines in the shallow water environment. The SHallow water Real-time IMaging Polarimeter (SHRIMP), recently developed under sponsorship of Dr. Tom Swean at the Office of Naval research (Code 321OE), can measure underwater partial polarization imagery. This sensor is a passive, three-Channel Device that simultaneously measures the three components of the Stokes vector needed to determine the partial linear polarization of the scene. The testing of this vector has been completed and the data has been analyzed. This paper presents performance results from the field-testing and quantifies the gain provided by the partial polarization signature of targets in the very shallow water and surf zone regions.
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Partial polarization signature results from the field testing of the SHallow water Real-time IMaging polarimeter (SHRIMP)
MTS IEEE Oceans 2001. An Ocean Odyssey. Conference Proceedings (IEEE Cat. No.01CH37295), 2001Co-Authors: J.s. Taylor, L.b. WolffAbstract:Research has shown that essentially all naturally occurring light outdoor's and underwater is partially linearly polarized. The polarized components can be combined to form an image that describes the polarization of the light in the scene. This image is known as the degree of linear polarization image or partial polarization image. Naturally occurring polarization signatures have the potential to provide a diver or an unmanned underwater vehicle with the information necessary to detect, classify, and identify threats such as obstacles or mines in the shallow water environment. The SHallow water Real-time IMaging Polarimeter (SHRIMP) has recently been designed and developed to measure the underwater partial polarization of targets. This camera is a passive, three-Channel Device that simultaneously measures the three components of the Stokes vector needed to determine the partial linear polarization of the scene. Testing of this sensor has been ongoing. This paper presents the results of the laboratory characterization and performance results from the field testing that quantify the partial polarization signature of targets in the very shallow water and surf zone regions.
Sung Hwan Choi - One of the best experts on this subject based on the ideXlab platform.
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effect of Channel widths on negative shift of threshold voltage including stress induced hump phenomenon in ingazno thin film transistors under high gate and drain bias stress
Applied Physics Letters, 2012Co-Authors: Sung Hwan ChoiAbstract:We investigated the degradation of indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) for various Channel widths under high-gate and drain bias stress. The threshold voltage of IGZO TFT with wide-Channel width (W > 100 μm) was significantly shifted. This included stress-induced hump-effect in a negative direction after the stress, whereas IGZO TFT with narrow-Channel width (W < 100 μm) shifted in a positive direction. This phenomenon may be attributed to the hole trapping into the back-interface region. In order to enhance the reliability of IGZO TFTs, we developed and verified that the multiple-Channel Device showed better bias-temperature stability (ΔVTH: −0.1 V), whereas the single-Channel Device exhibited a −0.4 VΔVTH shift.