The Experts below are selected from a list of 327 Experts worldwide ranked by ideXlab platform
Koushik Chakraborty - One of the best experts on this subject based on the ideXlab platform.
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exploring warp criticality in near threshold gpgpu applications using a dynamic Choke Point analysis
IEEE Transactions on Very Large Scale Integration Systems, 2020Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General-purpose graphics processing units (GPGPUs), due to their enormous parallelism, have found ubiquitous applications in parallel computing. However, their peak power rating has also increased over the years. As a consequence, near-threshold computing (NTC) has come to the rescue. However, a severe device-level delay variability arising from process variation (PV) can significantly diminish the NTC system performance. In this article, we examine Choke Points—a unique device-level characteristic of PV at NTC—that can exacerbate the delays of the GPGPU parallel warps. In order to improve the NTC GPU performance, we propose a family of holistic circuit-architectural solutions, referred to as Choke-Point-aware warp speculator (CPAWS). CPAWS identifies the Choke Point-induced critical warps in GPGPU applications and improves their execution latencies. Compared to a state-of-the-art warp scheduling policy, our best scheme improves the performance and energy efficiency of an NTC GPU by ~39% and ~31%, respectively.
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predicting critical warps in near threshold gpgpu applications using a dynamic Choke Point analysis
Design Automation and Test in Europe, 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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DATE - Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis
2019 Design Automation & Test in Europe Conference & Exhibition (DATE), 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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ace gpu tackling Choke Point induced performance bottlenecks in a near threshold computing gpu
International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.
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ISLPED - ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU
Proceedings of the International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.
Teruomi Miyazawa - One of the best experts on this subject based on the ideXlab platform.
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Choke Point physiology in airway stenting: A case presentation and discussion.
Respiratory investigation, 2016Co-Authors: Teruomi Miyazawa, Seiichi Nobuyama, Hiroki Nishine, Hiroshi Handa, Masamichi MineshitaAbstract:Abstract Background The Point in the airway that allows the smallest maximal flow is known as the "Choke Point". The tube law describes the velocity of the expired air, which cannot exceed the wave-speed. Flow limitation during forced expiration is affected by the relationship between the transmural pressure (Ptm) and cross-sectional area ( A ) of the airway. Wave speed is dependent on the stiffness of the airway wall, as well as on the cross-section of the airway itself (d A /dPtm). Methods Airway stenting at the wave-speed, flow-limiting segment (Choke Point) is assessed by using a catheter, via the working channel of a stereoscopic bronchoscope, to measure the difference between lateral pressure and pleural pressure. Results Based on the wave-speed concept of maximal expiratory flow limitation, stenting at the Choke Point increased the cross-sectional area and supported the weakened airway wall, thus improving expiratory flow limitation and relieving dyspnea. Conclusion To ensure correct stent positioning and thus optimal functional benefit, it is important to locate the exact position of tracheobronchial stenosis.
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Novel Multimodality Imaging and Physiologic Assessments Clarify Choke-Point Physiology and Airway Wall Structure in Expiratory Central Airway Collapse
Respiratory care, 2011Co-Authors: Hiroshi Handa, Teruomi Miyazawa, Hiroki Nishine, Septimiu Murgu, Noriaki Kurimoto, Jyongsu Huang, Henri G. ColtAbstract:Choke Points and airway wall structure in expiratory central airway collapse are poorly defined. Computed tomography, white light bronchoscopy, endobronchial ultrasound, vibration response imaging, spirometry, impulse oscillometry, negative expiratory pressure, and intraluminal catheter airway pressure measurements were used in a patient with cough, dyspnea, and recurrent pulmonary infections. Computed tomography and white light bronchoscopy identified dynamic collapse of the trachea and mainstem bronchi, consistent with severe crescent tracheobronchomalacia. Spirometry showed severe obstruction. Endobronchial ultrasound revealed collapse of the airway cartilage, and vibration response imaging revealed fluttering at both lung zones. Impulse oscillometry and negative expiratory pressure suggested tidal expiratory flow limitation in the intrathoracic airways. Intraluminal catheter airway pressure measurements identified the Choke Point in the lower trachea. After Y-stent insertion, the Choke Point migrated distally. Imaging studies revealed improved airway dynamics, airway patency, and ventilatory function. Novel imaging and physiologic assessments could be used to localize Choke Points and airway wall structure in tracheobronchomalacia.
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Stenting at the Flow-limiting Segment in Tracheobronchial Stenosis due to Lung Cancer
American journal of respiratory and critical care medicine, 2004Co-Authors: Teruomi Miyazawa, Yuka Miyazu, Yasuo Iwamoto, Atsuko Ishida, Koji Kanoh, Hidetaka Sumiyoshi, Masao Doi, Noriaki KurimotoAbstract:Airway stenting at the wave-speed flow-limiting segment (the Choke Point) is assessed. We determined prospectively the precise location of the Choke Point using the flow-volume curve, endobronchial ultrasonography, ultrathin bronchoscopy, and three-dimensional computed tomography scan before and after stenting in 64 patients with extrincic compression due to lung cancer. We noted distinct flow-volume curve patterns specific to the type of stenosis. The tracheal stenosis group indicated fixed narrowing patterns with an expiratory plateau, bronchial stenosis group dynamic collapse patterns with an expiratory flow deterioration (choking), carinal stenosis group combined fixed and dynamic patterns, and extensive stenosis group complex patterns containing elements of all the former. After stenting, almost full-function patterns with significant improvement in PEF were observed in all groups (p < 0.01, p < 0.05, p < 0.001, p < 0.01, respectively). In patients with extensive stenosis, implantation of additional stents was required when the Choke Points were observed to have migrated to the areas of malacia with cartilage destruction by the tumor. Secondary stenting at migrated Choke Points resulted in a significant improvement in PEF over the initial stenting (p < 0.01). Stenting at the Choke Point improved expiratory flow limitation by increasing the cross-sectional area, supporting the weakened airway wall and relieving dyspnea.
Sanghamitra Roy - One of the best experts on this subject based on the ideXlab platform.
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exploring warp criticality in near threshold gpgpu applications using a dynamic Choke Point analysis
IEEE Transactions on Very Large Scale Integration Systems, 2020Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General-purpose graphics processing units (GPGPUs), due to their enormous parallelism, have found ubiquitous applications in parallel computing. However, their peak power rating has also increased over the years. As a consequence, near-threshold computing (NTC) has come to the rescue. However, a severe device-level delay variability arising from process variation (PV) can significantly diminish the NTC system performance. In this article, we examine Choke Points—a unique device-level characteristic of PV at NTC—that can exacerbate the delays of the GPGPU parallel warps. In order to improve the NTC GPU performance, we propose a family of holistic circuit-architectural solutions, referred to as Choke-Point-aware warp speculator (CPAWS). CPAWS identifies the Choke Point-induced critical warps in GPGPU applications and improves their execution latencies. Compared to a state-of-the-art warp scheduling policy, our best scheme improves the performance and energy efficiency of an NTC GPU by ~39% and ~31%, respectively.
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predicting critical warps in near threshold gpgpu applications using a dynamic Choke Point analysis
Design Automation and Test in Europe, 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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DATE - Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis
2019 Design Automation & Test in Europe Conference & Exhibition (DATE), 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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ace gpu tackling Choke Point induced performance bottlenecks in a near threshold computing gpu
International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.
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ISLPED - ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU
Proceedings of the International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.
Masamichi Mineshita - One of the best experts on this subject based on the ideXlab platform.
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Choke Point physiology in airway stenting: A case presentation and discussion.
Respiratory investigation, 2016Co-Authors: Teruomi Miyazawa, Seiichi Nobuyama, Hiroki Nishine, Hiroshi Handa, Masamichi MineshitaAbstract:Abstract Background The Point in the airway that allows the smallest maximal flow is known as the "Choke Point". The tube law describes the velocity of the expired air, which cannot exceed the wave-speed. Flow limitation during forced expiration is affected by the relationship between the transmural pressure (Ptm) and cross-sectional area ( A ) of the airway. Wave speed is dependent on the stiffness of the airway wall, as well as on the cross-section of the airway itself (d A /dPtm). Methods Airway stenting at the wave-speed, flow-limiting segment (Choke Point) is assessed by using a catheter, via the working channel of a stereoscopic bronchoscope, to measure the difference between lateral pressure and pleural pressure. Results Based on the wave-speed concept of maximal expiratory flow limitation, stenting at the Choke Point increased the cross-sectional area and supported the weakened airway wall, thus improving expiratory flow limitation and relieving dyspnea. Conclusion To ensure correct stent positioning and thus optimal functional benefit, it is important to locate the exact position of tracheobronchial stenosis.
Aatreyi Bal - One of the best experts on this subject based on the ideXlab platform.
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exploring warp criticality in near threshold gpgpu applications using a dynamic Choke Point analysis
IEEE Transactions on Very Large Scale Integration Systems, 2020Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General-purpose graphics processing units (GPGPUs), due to their enormous parallelism, have found ubiquitous applications in parallel computing. However, their peak power rating has also increased over the years. As a consequence, near-threshold computing (NTC) has come to the rescue. However, a severe device-level delay variability arising from process variation (PV) can significantly diminish the NTC system performance. In this article, we examine Choke Points—a unique device-level characteristic of PV at NTC—that can exacerbate the delays of the GPGPU parallel warps. In order to improve the NTC GPU performance, we propose a family of holistic circuit-architectural solutions, referred to as Choke-Point-aware warp speculator (CPAWS). CPAWS identifies the Choke Point-induced critical warps in GPGPU applications and improves their execution latencies. Compared to a state-of-the-art warp scheduling policy, our best scheme improves the performance and energy efficiency of an NTC GPU by ~39% and ~31%, respectively.
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predicting critical warps in near threshold gpgpu applications using a dynamic Choke Point analysis
Design Automation and Test in Europe, 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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DATE - Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis
2019 Design Automation & Test in Europe Conference & Exhibition (DATE), 2019Co-Authors: S Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik ChakrabortyAbstract:General purpose graphics processing units (GP-GPU) can significantly improve the power consumption at the NTC operating region. However, process variation (PV) can drastically reduce its performance. In this paper, we examine Choke Points–a unique device-level characteristic of PV at NTC–that can exacerbate the warp criticality problem. We show that the modern warp schedulers cannot tackle the Choke Point induced critical warps in an NTC GPU. We propose Warp Latency Booster, a circuit-architectural solution to dynamically predict the critical warps and accelerate them in their respective execution units. Our best scheme achieves an average improvement of ~32% and ~41% in performance, and ~21% and ~19% in energy-efficiency, respectively, over two state-of-the-art warp schedulers.
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ace gpu tackling Choke Point induced performance bottlenecks in a near threshold computing gpu
International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.
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ISLPED - ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU
Proceedings of the International Symposium on Low Power Electronics and Design, 2018Co-Authors: Tahmoures Shabanian, Prabal Basu, Aatreyi Bal, Koushik Chakraborty, Sanghamitra RoyAbstract:The proliferation of multicore devices with a strict thermal budget has aided to the research in Near-Threshold Computing (NTC). However, the operation of a Graphics Processing Unit (GPU) at the NTC region has still remained recondite. In this work, we explore an important reliability predicament of NTC, called Choke Points, that severely throttles the performance of GPUs. Employing a cross-layer methodology, we demonstrate the potency of Choke Points in inducing timing errors in a GPU, operating at the NTC region. We propose a holistic circuit-architectural solution, that promotes an energy-efficient NTC-GPU design paradigm by gracefully tackling the Choke Point induced timing errors. Our proposed scheme offers 3.18x and 88.5% improvements in NTC-GPU performance and energy delay product, respectively, over a state-of-the-art timing error mitigation technique, with marginal area and power overheads.