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Parameswaran Ramanathan - One of the best experts on this subject based on the ideXlab platform.

  • use of Common Time Base for checkpointing and rollback recovery in a distributed system
    IEEE Transactions on Software Engineering, 1993
    Co-Authors: Parameswaran Ramanathan, Kang G Shin
    Abstract:

    An approach to checkpointing and rollback recovery in a distributed computing system using a Common Time Base is proposed. A Common Time Base is established in the system using a hardware clock synchronization algorithm. This Common Time Base is coupled with the idea of pseudo-recovery points to develop a checkpointing algorithm that has the following advantages: reduced wait for commitment for establishing recovery lines, fewer messages to be exchanged, and less memory requirement. These advantages are assessed quantitatively by developing a probabilistic model. >

  • use of Common Time Base rollback recovery in a
    1993
    Co-Authors: Parameswaran Ramanathan
    Abstract:

    A new approach for checkpointing and rollback recovery in a distributed computing system using a Common Time Base is proposed in this paper. First, a Common Time Base is established in the system using a hardware clock synchronization algorithm. This Common Time Base is coupled with the idea of pseudo-recovery points to develop a checkpointing algorithm that has the following advantages: 1) reduced wait for commitment for establishing recovery lines, 2) fewer messages to he exchanged, and 3) less memory requirement. These advantages are assessed quantitatively by developing a probabilistic model.

Kang G Shin - One of the best experts on this subject based on the ideXlab platform.

  • use of Common Time Base for checkpointing and rollback recovery in a distributed system
    IEEE Transactions on Software Engineering, 1993
    Co-Authors: Parameswaran Ramanathan, Kang G Shin
    Abstract:

    An approach to checkpointing and rollback recovery in a distributed computing system using a Common Time Base is proposed. A Common Time Base is established in the system using a hardware clock synchronization algorithm. This Common Time Base is coupled with the idea of pseudo-recovery points to develop a checkpointing algorithm that has the following advantages: reduced wait for commitment for establishing recovery lines, fewer messages to be exchanged, and less memory requirement. These advantages are assessed quantitatively by developing a probabilistic model. >

Giraldeau Francis - One of the best experts on this subject based on the ideXlab platform.

  • Analyse de performance de systèmes distribués et hétérogènes à l'aide de traçage noyau
    2015
    Co-Authors: Giraldeau Francis
    Abstract:

    RÉSUMÉ Les systèmes infonuagiques sont en utilisation croissante. La complexité de ces systèmes provient du fait qu'ils s'exécutent de manière distribuée sur des architectures multicoeurs. Cette composition de services est souvent hétérogène, c.-à-d. qui implique différentes technologies, librairies et environnements de programmation. L'interopérabilité est assurée plutôt par l'utilisation de protocoles ouverts. L'espace de configuration résultant croît de manière exponentielle avec le nombre de paramètres, et change continuellement en fonction des nouveaux besoins et de l'adaptation de la capacité. Lorsqu'un problème de performance survient, il doit être possible d'identifier rapidement la cause pour y remédier. Or, ce problème peut être intermittent et difficile à reproduire, et dont la cause peut être une interaction transitoire entre des tâches ou des ressources. Les outils utilisés actuellement pour le diagnostic des problèmes de performance comprennent les métriques d'utilisation des ressources, les outils de profilage, la surveillance du réseau, des outils de traçage, des débogueurs interactifs et les journaux systèmes. Or, chaque composant doit être analysé séparément, ou l'utilisateur doit corréler manuellement cette information pour tenter de déduire la cause du problème. L'observation globale de l'exécution de systèmes distribués est un enjeu majeur pour en maitriser la complexité et régler les problèmes efficacement. L'objectif principal de cette recherche est d'obtenir un outil d'analyse permettant de comprendre la performance d'ensemble d'une application distribuée. Ce type d'analyse existe au niveau applicatif, mais elles sont spécifiques à un environnement d'exécution ou un domaine particulier. Nos travaux se distinguent par l'utilisation d'une trace noyau, qui procure un niveau plus abstrait de l'exécution d'un programme, et qui est indépendant du langage ou des librairies utilisées. La présente recherche vise à déterminer si la sémantique des évènements du système d'exploitation peut servir à une analyse satisfaisante. Le surcout du traçage est un enjeu important, car il doit demeurer faible pour ne pas perturber le système et être utile en pratique. Nous proposons un nouvel algorithme permettant de retrouver les relations d'attente entre les tâches et les périphériques d'un ordinateur local. Nous avons établi que le chemin critique exact d'une application nécessite des évènements qui ne sont pas visibles depuis le système d'exploitation. Nous proposons donc une approximation du chemin critique, dénomée chemin actif d'exécution, où chaque attente est remplacée par sa cause racine. Les approches antérieures reposent sur l'analyse des appels système. L'analyse doit tenir en compte la sémantique de centaines d'appels système, ce qui n'est pas possible dans le cas général, car le fonctionnement d'un appel système dépend de l'état du système au moment de son exécution. Par exemple, le comportement de l'appel système read() est complètement différent si le fichier réside sur un disque local ou sur un serveur de fichier distant. L'appel système ioctl() est particulièrement problématique, car son comportement est défini par le programmeur. Le traçage des appels système contribue aussi à augmenter le surcout, alors qu'une faible proportion d'entre eux modifie le flot de l'exécution. Les tâches d'arrière-plan du noyau n'effectuent pas d'appels système et ne peuvent pas être prises en compte par cette méthode. À cause de ces propriétés, l'analyse basée sur des appels système est fortement limitée. Notre approche remplace les appels système par des évènements de l'ordonnanceur et des interruptions. Ces évènements de plus bas niveau sont indépendants de la sémantique des appels système et prennent en compte les tâches noyau. Le traçage des appels système est donc optionnel, ce qui contribue à réduire le surcout et simplifie drastiquement l'analyse. Les bancs d'essais réalisés avec des logiciels commerciaux populaires indiquent qu'environ 90% du surcout est lié aux évènements d'ordonnancement. En produisant des cycles d'ordonnancement à la fréquence maximale du système, il a été établi que le surcout moyen au pire cas est de seulement 11%. Nous avons aussi réalisé une interface graphique interactive montrant les résultats de l'analyse. Grâce à cet outil, il a été possible d'identifier avec succès plusieurs problèmes de performance et de synchronisation. Le fonctionnement interne et l'architecture du programme sont exposés par l'outil de visualisation, qui se révèle utile pour effectuer la rétro-ingénierie d'un système complexe. Dans un second temps, la dimension distribuée du problème a été ajoutée. L'algorithme de Base a été étendu pour supporter l'attente indirecte pour un évènement distant, tout en préservant ses propriétés antérieures. Le même algorithme peut donc servir pour des processus locaux ou distants. Nous avons instrumenté le noyau de manière à pouvoir faire correspondre les paquets TCP/IP émis et reçus entre les machines impliqués dans le traitement à observer. L'algorithme tient en compte que la réception ou l'émission de paquets peut se produire de manière asynchrone. Les traces obtenues sur plusieurs systèmes n'ont pas une Base de temps commune, car chacun possède sa propre horloge. Aux fins de l'analyse, toutes les traces doivent être synchronisées, et les échanges apparaitre dans l'ordre de causalité. Pour cette raison, les traces doivent être préalablement synchronisées. L'algorithme a été utilisé pour explorer le comportement de différentes architectures logicielles. Différentes conditions d'opérations ont été simulées (délais réseau, durée de traitement, retransmission, etc.) afin de valider le comportement et la robustesse de la technique. Il a été vérifié que le résultat obtenu sur une grappe d'ordinateurs est le même que celui obtenu lorsque les services s'exécutent dans des machines virtuelles. Le surcout moyen nécessaire pour tracer une requête Web s'établit à 5%. La borne supérieure du surcout pour des requêtes distantes est d'environ 18%. Pour compléter l'analyse, nous avons réalisé des cas d'utilisation impliquant six environnements logiciel et domaines différents, dont une application Web Django, un serveur de calcul Java-RMI, un système de fichier distribué CIFS, un service Erlang et un calcul parallèle MPI. Comme contribution secondaire, nous avons proposé deux améliorations à l'algorithme de synchronisation. La première consiste en une étape de présynchronisation qui réduit considérablement la consommation maximale de mémoire. La deuxième amélioration concerne la performance de la fonction de transformation du temps. Le temps est représenté en nanosecondes et le taux de variation à appliquer doit être très précis. L'utilisation de l'arithmétique à point flottant de précision double n'est pas assez précis et produit des inversions d'évènements. Un couteux calcul à haute précision est requis. Grâce à une simple factorisation de l'équation linéaire, la plupart des calculs à haute précision ont été remplacés par une arithmétique entière 64-bit. Les bancs d'essai ont mesuré que cette optimisation procure une accélération de 65 fois en moyenne et que la précision du résultat n'est pas affectée. Le troisième thème de la recherche porte sur le profilage des segments du chemin d'exécution. L'échantillonnage des compteurs de performance matériel permet le profilage du code natif avec un faible surcout. Une limitation concerne le code interprété qui peut se retrouver dans une application hétérogène. Dans ce cas, le code profilé est celui de l'interpréteur, et le lien avec les sources du programme est perdu. Nous avons conçu une technique permettant de transférer à un interpréteur l'évènement de débordement du compteur de performance, provenant d'une interruption non masquable du processeur. L'analyse de l'état de l'interpréteur peut être effectuée en espace utilisateur. Un module d'analyse pour Python a été développé. Nous avons comparé le cout des méthodes pour obtenir la pile d'appel de l'interpréteur Python et celle du code interprété. Ces données sont sauvegardées par l'entremise de LTTng-UST, dont la source de temps est cohérente avec les traces produites en mode noyau, ce qui permet d'associer les échantillons produits avec le chemin d'exécution. Nous avons validé le profil à l'aide d'une application d'étalonnage. Nous avons mesuré une erreur inférieure à 1%, et ce résultat est équivalent à celui produit par un profileur déterministe. La période d'échantillonnage est établie selon un compromis entre le surcout et la résolution de l'échantillonnage. Nos tests indiquent que, pour un chemin d'exécution de 50ms, une plage de taux d'échantillonnage existe et satisfait à la fois une marge d'erreur inférieure à 5% et un surcout de moins de 10%.----------ABSTRACT Cloud systems are increasingly used. These systems have a complex behavior, because they run on a cluster of multi-core computers. This composition of services is often heterogeneous, involving different technologies, libraries and programming environments. Interoperability is ensured using open protocols rather than standardizing runTime environments. The resulting configuration space grows exponentially with the number of parameters, and constantly changes in response to new needs and capacity adaptation. When a performance problem arises, it should be possible to quickly identify the cause in order to address it. However, performance problems can be intermittent and difficult to reproduce, and their cause can be a transient interaction between tasks or resources. The tools currently used to diagnose performance problems include resource utilization metrics, profiling tools, network monitoring, layout tools, interactive debuggers and system logs. However, each component must be analyzed separately, or the user must manually correlate that information to try deducing the root cause. Observing the performance of globally distributed systems is a major challenge, to master their complexity and solve problems effectively. The main objective of this research is to obtain an analysis tool for understanding the overall performance of a distributed application. This type of analysis exists at the application level, but they are specific to a runTime environment or a particular application domain. To address this issue, we propose to use kernel tracing, which provides a more abstract information about the execution of a program and is independent of the language or the libraries used. This research aims to determine whether the semantics of the operating system events are effective for performance analysis of such systems. The additional cost of tracing is an important issue because it must remain low, to avoid disturbing the system and be useful in practice. We propose a new algorithm to find the waiting relationships between tasks and devices on a local computer. We established that the exact critical path of an application requires events which are not visible from the operating system. We therefore propose an approximation of the critical path, that we named execution path. Previous approaches rely on system call analysis. However, the analysis must take into account the semantics of hundreds of system calls. Tracing all system calls increases the overhead, while most system calls do not change the flow of execution. Furthermore, the background kernel threads do not perform system calls and are not taken into account. Our approach relies instead on lower-level events, namely from the scheduler and the interruptions. These events are independent of the semantics of system calls and take into account the kernel threads. Tracing system calls is optional, which helps reduce the overhead and simplifies the analysis. The benchmarks made with popular commercial software indicate that about 90% of the overhead is related to scheduling events. By producing scheduling cycles at the maximum frequency, we established that the average worst case overhead is only 11%. Finally, we implemented an interactive graphical view showing the results of the analysis. With this tool, it was possible to identify quickly several performance and synchronization problems in actual applications. The tool also exposes the internal functioning and architecture of the program, which is useful for performing reverse engineering of a complex system. Secondly, we addressed the distributed dimension of the problem. The basic algorithm has been extended to support indirect network wait, while preserving its previous properties. The same algorithm can therefore be used for local or remote processes. We instrumented the kernel for matching the TCP/IP packets sent and received between machines involved in the processing. The algorithm takes into account the fact that reception and transmission of packets can occur asynchronously. The traces obtained on several systems do not have a Common Time Base, as each has its own clock. The analysis requires that all traces have the same Time reference and exchanges must appear in the causal order. For this reason, the traces must first be synchronized. The algorithm was used to explore the behavior of different software architectures. We simulated various operating conditions (network delays, processing delays, retransmission, etc.) to validate the behavior and robustness of the technique. We verified that the result on a cluster of physical computers is the same as the one obtained when the services are running inside virtual machines. The average overhead to trace Web requests is about 5%. The worst case overhead measured with the higest frequency remote procedure call (empty remote call) is approximately 18\%. To complete the analysis, we implemented use cases and software environments involving six different application domains, including a Django Web application, a Java-RMI server, a CIFS distributed file system, an Erlang service and a MPI parallel computation. As a secondary contribution, we proposed two improvements to the synchronization algorithm. The first is a pre-synchronization step that dramatically reduces the maximum memory consumption. The second improvement concerns the performance of the Time transformation function. The Time is represented in nanoseconds and the rate of change to apply must be very precise. The use of double precision floating point arithmetic is not accurate enough and produces event inversions. Expensive high-precision calculation is required. We replaced most of high-precision calculations by integer arithmetic of native register size, providing an average acceleration of approximately 65 Times for the synchronization. The third area of research focuses on profiling the execution path segments. Sampling hardware performance counters allows efficient profiling of native code. One limitation concerns the interpreted code that may be found in an heterogeneous application. In this case, the native code running is the interpreter itself, and the link with the actual sources of the interpreted program is lost. We developed a technique to transfer to an interpreter the performance counter overflow event from the non-maskable interrupt of the processor. The analysis of the interpreter state can then be performed in user-space. To demonstrate the feasability of the approach, we implemented the analysis module for Python. We compared the cost of methods to get the call stack of the Python interpreter and the interpreted code. This data is saved through LTTng-UST, which has a Time source consistent with the kernel mode trace and allows the association of the samples produced with the execution path. We validated the profile using a calibrated program. We measured less than 1% profile error, and this result is equivalent to the error rate of a deterministic profiler. The sampling period is a compromise between the overhead and the profile resolution. Our tests indicate that, for an execution path of 50ms, a range of sampling exists that satisfies both a margin of error lower than 5% and an overhead of less than 10%

James S. Hyde - One of the best experts on this subject based on the ideXlab platform.

  • Saturation recovery EPR and ELDOR at W-band for spin labels
    Journal of Magnetic Resonance, 2008
    Co-Authors: Wojciech Froncisz, Theodore G. Camenisch, Joseph J. Ratke, James R. Anderson, Witold K. Subczynski, Robert A. Strangeway, Jason W. Sidabras, James S. Hyde
    Abstract:

    Abstract A reference arm W -band (94 GHz) microwave bridge with two sample-irradiation arms for saturation recovery (SR) EPR and ELDOR experiments is described. Frequencies in each arm are derived from 2 GHz synthesizers that have a Common Time-Base and are translated to 94 GHz in steps of 33 and 59 GHz. Intended applications are to nitroxide radical spin labels and spin probes in the liquid phase. An enabling technology is the use of a W -band loop-gap resonator (LGR) [J.W. Sidabras, R.R. Mett, W. Froncisz, T.G. Camenisch, J.R. Anderson, J.S. Hyde, Multipurpose EPR loop-gap resonator and cylindrical TE 011 cavity for aqueous samples at 94 GHz, Rev. Sci. Instrum. 78 (2007) 034701]. The high efficiency parameter (8.2 GW −1/2 with sample) permits the saturating pump pulse level to be just 5 mW or less. Applications of SR EPR and ELDOR to the hydrophilic spin labels 3-carbamoyl-2,2,5,5-tetra-methyl-3-pyrroline-1-yloxyl (CTPO) and 2,2,6,6,-tetramethyl-4-piperidone-1-oxyl (TEMPONE) are described in detail. In the SR ELDOR experiment, nitrogen nuclear relaxation as well as Heisenberg exchange transfer saturation from pumped to observed hyperfine transitions. SR ELDOR was found to be an essential method for measurements of saturation transfer rates for small molecules such as TEMPONE. Free induction decay (FID) signals for small nitroxides at W -band are also reported. Results are compared with multifrequency measurements of T 1e previously reported for these molecules in the range of 2–35 GHz [J.S. Hyde, J.-J. Yin, W.K. Subczynski, T.G. Camenisch, J.J. Ratke, W. Froncisz, Spin label EPR T 1 values using saturation recovery from 2 to 35 GHz. J. Phys. Chem. B 108 (2004) 9524–9529]. The values of T 1e decrease at 94 GHz relative to values at 35 GHz.

Težak Nenad - One of the best experts on this subject based on the ideXlab platform.

  • Active suppression of lowfrequency interference currents by controlled grid interface of power converters in rail vehicles
    University of Zagreb. Faculty of Electrical Engineering and Computing. Department of Control and Computer Engineering., 2014
    Co-Authors: Težak Nenad
    Abstract:

    Tema disertacije je aktivno potiskivanje niskofrekvencijskih struja smetnji primjenom upravljanih mrežnih sučelja energetskih pretvarača za napajanje glavnih i pomoćnih pogona u željezničkim vozilima. Široka primjena energetskih pretvarača u željezničkim vozilima, uz druge ključne nove tehnologije, omogućila je u proteklom razdoblju značajno poboljšanje dinamičkih karakteristika suvremenih vozila uz istodobno ostvarivanje ekonomičnijeg rada pogona kao i niz drugih prednosti proizašlih iz primjene glavnih pogona zasnovanih na vektorski upravljanim izmjeničnim reguliranim elektromotornim pogonima s asinkronim vučnim motorima i fleksibilnih pretvarača pomoćnih napajanja za osiguravanje energije svim ostalim pomoćnim podsustavima (rashladni sustavi pretvarača glavnog pogona, sustavi ventilacije, grijanja, klimatizacije, rasvjeta, informacijski i upravljački sustavi na vozilu…). Pri tome je ukupna instalirana snaga svih glavnih i pomoćnih pogona u vozilu znatno povećana, posebice uzmu li se u obzir i konfiguracije višestrukih vučnih jedinica (MTU – Multiple Traction Units) vrlo uobičajene u putničkom prometu, ali i u teretnom željezničkom prometu (povezivanjem lokomotiva u tzv. tandemske konfiguracije). Suvremeni pretvarači za napajanje glavnih i pomoćnih pogona, u pravilu su zasnovani na IGBT tehnologiji. Karakter rada takvih pretvarača, kod kojih se formiranje željenih iznosa napona i struja ostvaruje nekom od metoda upravljanja IGBT sklopkama (npr. modulacija širine impulsa – Pulse Width Modulation – PWM), uz istodobno povećanje jedinične i ukupne snage pretvarača na vozilu, uzrokovali su znatno povećanje sadržaja neželjenih viših harmonika i drugih smetnji u strujama pojne mreže. Sve struje smetnji sadržane u struji pojne mreže, uključujući i one nastale radom pretvarača glavnih i pomoćnih pogona, mogu svojim djelovanjem štetno utjecati na ispravnost rada telekomunikacijskih (TK) i signalno-sigurnosnih (SS) uređaja uz prugu, što se izravno odražava i na smanjenje sigurnosti željezničkog prometa. Posebice su opasni harmonici struja smetnji niskih frekvencija, jer se znatno teže filtriraju, pogotovo ako im je frekvencija u blizini radnih frekvencija (frekvencijskih pojasa) SS uređaja. Najbolji rezultati u potiskivanju struja smetnji u struji mreže koju vozilo razmjenjuje s aktivnom mrežom, postižu se kombiniranjem aktivnih i pasivnih mjera. Pri tome se posebna pažnja posvećuje provedbi aktivnih mjera u okviru upravljačko-regulacijske strukture mrežnih sučelja pretvarača za napajanje glavnih i pomoćnih pogona. Aktivnim potiskivanjem niskofrekvencijskih struja smetnji, primjenom upravljanih mrežnih sučelja energetskih pretvarača u željezničkim vozilima, nastoji se maksimalno iskoristiti raspoložive mogućnosti kako bi se ostvarilo što pouzdanije, ekonomičnije i energetski učinkovitije rješenje za potiskivanje struja smetnji sadržanih u struji pojne mreže. Pri postavljanju tehničkih zahtjeva na upravljačko-regulacijski sustav, kojim će se provesti aktivne mjere za potiskivanje struja smetnji poseban se naglasak stavlja na harmonike struja smetnji niskih frekvencija, pogotovo ako im je frekvencija u blizini radnih frekvencija SS uređaja te na identifikaciju točaka utiskivanja smetnji i njihovog širenja upravljačko-regulacijskom strukturom, kako bi se mogla provesti imunizacija sustava (uvođenjem odgovarajućih filtara na signale povratnih veza, odabirom odgovarajuće topologije regulacijske strukture i tipova regulatora pojedinih veličina, primjena adaptivnog/selektivnog predupravljanja …). Disertacija opisuje i predlaže algoritme upravljanja mrežnim sučeljima energetskih pretvarača za napajanje glavnih i pomoćnih pogona u željezničkim vozilima koji će aktivnim potiskivanjem struja smetnji osigurati da negativni utjecaji rada tih pretvarača na pojnu mrežu budu u dopuštenim granicama definiranim tzv. mrežnim pravilima i drugim relevantnim propisima. Za uspjeh predložene koncepcije aktivnog potiskivanja struja smetnji (poglavito osnovnih sklopnih harmonika) u struji mreže na razini vozila, koordiniranim djelovanjem na upravljačko-regulacijske strukture i pripadne PWM jedinice mrežnih sučelja više dislociranih pretvarača ključan je razvoj što robusnijih, a istodobno što točnijih sinkronizacijskih algoritama, kao osnove za formiranje zajedničke sinkronizacijske baze na osnovi estimiranog faznog kuta osnovnog harmonika napona mreže. Stoga je poseban naglasak u disertaciji stavljen na prikaz sinkronizacijske tehnike zasnovane na algoritmima sa zatvorenom petljom (npr. fazno zatvorena petlja ili PLL – Phase Locked Loop), koje su namijenjene za primjenu na jednofaznim sustavima napajanja. Primjenom predloženih algoritama upravljanja mrežnim sučeljima energetskih pretvarača za napajanje glavnih i pomoćnih pogona u željezničkim vozilima, pokazano je da se može osigurati da negativni utjecaji rada tih pretvarača na pojnu mrežu budu u dopuštenim granicama, unatoč relativno niskoj sklopnoj frekvenciji pretvarača s bipolarnim tranzistorima s izoliranom upravljačkom elektrodom. Razvijeni algoritmi potiskivanja niskofrekvencijekih struja smetnji detaljno su testirani ispitivanjima u laboratorijskim uvjetima i na stvarnom vozilu.The objective of this thesis is active suppression of low-frequency interference currents by controlled grid interface of power converters in rail vehicles. Wide applications of power electronic converters installed onboard railway vehicles has been one of the key enabling technologies for significant improvement of their dynamic characteristics, energy efficiency and other benefits resulting from implementation of main propulsion system Based on high-performance variable speed controlled AC traction drives and versatile auxiliary power supply converters providing energy for all auxiliary onboard systems (cooling system of the main propulsion, ventilation, heating, air-conditioning, lighting, on-board control and information systems…). Total power of traction drives and auxiliary power supply converters installed onboard modern railway vehicle has been significantly increased, particularly if multiple traction units for passenger and freight traffic are considered: multiple traction units composed from light rail vehicles for urban/suburban transport, or tandem configurations of locomotives. Operation of traction drives and auxiliary power supply power electronic converters installed onboard modern rail vehicles, dominantly Based on IGBT switches, causes significantly higher content of line harmonics and interharmonic components in the line current. Interference currents, including those induced by the operation of onboard power converters can significantly influence the correct operation of telecommunication, train control systems and other railway signaling infrastructure along the tracks, having direct impact to the safety of the railway transport. Passive filtration techniques for suppression of low frequency interference line currents appeared to be insufficient, but are applied in combination with active mitigation techniques. Special attention is devoted to the correct implementation of active suppression techniques within the corresponding control structure of the grid interfaced converters of the traction drives and auxiliary power supply converters installed onboard. Active suppression of low-frequency interference currents, by implementation of properly controlled grid interface of power converters in rail vehicles in combination with passive mitigation techniques, results in reliable and energy efficient solutions, especially if cumulative suppression effects by coordinated action on a vehicle level are attained. The dissertation describes and suggests active suppression methods Based on proper design of the grid interface of the power converter and its corresponding control system. In the thesis, particular focus is set on identification of sources of interferences currents, their propagation mechanisms, as well as identification of interference injection points within the control structure of the grid interface and corresponding mitigation techniques for minimization of negative effects. Development of more accurate and yet even more robust synchronization algorithms, presented in thesis, is crucial for successful implementation of the proposed concept of active suppression of switching harmonics by pulse-width modulation (PWM) carriers phase-shift control coordinated on a vehicle level. By implementation of dedicated block for estimation of DC-offset in the input signal, an enhanced quadrature-signal generator is attained, which in combination with standard or modified frequency locked loop (FLL) forms a core of the robust synchronization algorithm. Basic configuration can be also be upgraded by additional resonant parts and filters for stabilization of central frequencies for selected highorder harmonics of line voltage, in order to additionally improve robustness of the synchronization algorithm, particularly the noise immunity and the resiliency to the effects of high-order voltage/current harmonics, ensuring proper operation of the grid-interfaced converters even under very distorted overhead line voltage conditions. Single-phase versions of synchronization algorithms can easily be extended to the variants suitable in three-phase applications (currents/voltages signal-processing for measurement and control systems related to power-converters in general, particularly active power filters, grid-interfaced converters in distributed renewable energy generation units, power quality assessment). In order to implement the active suppression of low frequency interference currents on a vehicle level, few other necessary algorithms were proposed, enabling phase coordinated control of the PWM carriers of the onboard grid-interfaced converters without any dedicated infrastructure, i.e. employing only the regularly used measurements necessary used for normal operation of the traction drive converters and auxiliary power supply converters. Since all the converters installed onboard are fed by the same overhead-line voltage, measured for control purposes in all corresponding control systems, a Common Time-Base necessary for the synchronization of all grid interfaces of the onboard converters can be derived from the estimated phase angle of the fundamental component of the line voltage. In order to minimize the noise impact and ensure maximal stability and operating precision in someTimes very polluted network environment (voltage sags/dips/swells due to pantograph bouncing and other overhead line voltage phenomena, severe harmonic distortion…) estimated phase angle of the fundamental component of the line voltage should be obtained by high-performance synchronization algorithm, resilient to the impact of high-order harmonics/subharmonics, dc-offset and other interferences while retaining good dynamic performance with respect to the steady-state and transient response tracking capabilities, settling Times etc. Otherwise, due to rather high frequency modulation index, i.e. ratio between the switching frequency and fundamental frequency of the line voltage, instable Common Time Base my produce adverse calculation outputs (e.g. synchrophasor components, necessary in alternative approach for determination of the phase angle of the PWM carrier), resulting in poor performance, someTimes even below the acceptance threshold level. Software net-mark algorithm is derived as software coded counterpart of hardware Based zero-crossing detection solutions. The method is monitoring the outputs of the values of the estimated fundamental component of the line voltage and/or corresponding phase-angle, detecting the cyclic task when the polarity of these signals occurs. By simple mathematical expressions, the exact zero-crossing position within that cyclic task is obtained! Employing the excellent linearity of the estimated phase-angle (frequency of the line voltage is practically constant within the analyzed Time range), the calculation precision for evaluation of the zero-crossing position within the cyclic task, can be further improved by employing simple proportional relations between the neighboring samples. This simple, computationally non-intensive algorithm is the core of the procedure for the precise measurement of the fundamental frequency, as well as for synchronization of cyclic tasks to the line frequency and phase-control of the PWM carriers for grid-interfaced converters attached to the same line voltage. Thesis proposes implementation of a parallel finite impulse response filter structure Based on sliding mean value prototype (Sliding Mean Value tandem filters), in order to minimize the effects of intermodulation distortion, e.g. between the interference current and the fundamental component of the line current. Proposed Sliding Mean Value tandem filters are easy to implement and derive all their good features from the finite impulse response core they are Based on – inherent stability, not demanding recursive form of the algorithm with respect to the CPU load regardless of the filter depth etc. Transport delay Time of the proposed filter combination is shorter than for the series combination of the particular filters, while overall filtering characteristics in both sets of notch frequencies are improved with respect to the particular SMV filters. Proposed method can be very effectively applied for suppression of interference paths related to the voltage controller and its interaction with the synchronization output from the synchronization subsystem Based on PLL (Phase Locked Loop). All necessary algorithms have to be implemented and executed in real-Time, within rather short Time frame limited by the period of the corresponding application program cyclic task. Thus, a selection of employed signal-processing and control algorithms have to take into consideration the total computing performance of the target embedded system Based on the modest digital signal processor (DSP), using ultimately optimized application program code and partial emulation of high-precision math (necessary or even critical in proper implementation of some algorithms) to partially compensate the capabilities of modern digital controllers Based on the latest generation of DSP/FPGA (Field Programmable Gate Array) solutions, which have significantly improved their CPU and overall system performance benchmarks recently. The required careful implementation of active/passive methods suppression techniques of low-frequency interference line currents was demonstrated in thesis on two examples. Quality evaluation of performances of the grid interfaces of the traction drive converters and auxiliary power supply converter, and their corresponding control system in particular, a series of tests for assessment of the line current frequency spectrum, resulting from the operation of the converter in typical exploitation conditions, were performed. Thorough tests started in laboratory conditions, where completed with extensive field tests performed on the vehicle, with satisfactory results. Dissertation is organized in eight chapters. The first chapter (“Introduction”) highlights the contexts of the research activities in the field of interference currents suppression (even demanding restrictions with respect to the permissible level of interference currents, even higher installed power of onboard converters – per single converter, single traction unit or total installed power per vehicle – multiple traction units, tandem configurations of locomotives, increase of railway traffic volume leading to staggering number of vehicles on the same power section…) with emphasis to the practical considerations related to the design of the most effective technical solution Based on the application of appropriate active techniques by controlled gridinterfaced converters of onboard converters in combination with passive methods (application of interference currents passive filters in power circuitry…). Introductory part also announces scientific contributions of the dissertation, elaborated in the following chapters. Second chapter (“Topologies and control structures of the converters installed in railway vehicles“) brings an overview, Based on the available information from the industry and academia, of the power circuit topologies of the converters used for traction drive converters and auxiliary power supply converters, particularly the grid-interfaced converters in such applications intended for AC overhead line voltage. Apart from the most widely used solutions, a topologies Based mostly on multilevel power converters are also shortly referred to as state-of-the-art solutions which will rather soon take over the deserved dominating position. Third chapter preceding the central part of the dissertation (“Sources and non-active suppression techniques of low-frequency interference currents caused by operation of traction drive converters and auxiliary power supply converters”) brings the context of the interference generation phenomena (most Common sources of interferences, relationships between the key factors in the process of generation of interference currents including mutual interaction of multiple vehicles and power facilities in the feeder stations, interaction mechanisms between the injected interference signals and control structure…). After initial part of the chapter, an overview of the most popular passive suppression methods applied within the modern low-frequency interference current suppression system solution is given, illustrated by practical examples referring to the traction converters and auxiliary power supply converters in railway applications. Finally the chapter concludes with insight to the active suppression techniques not Based on the closed loop control algorithms like proper selection and implementation of modulation of IGBT switches, including adaptive phase-coordination of PWM carriers within converter, as well as phase coordination of carriers between identical grid interfaces of physically dislocated converters, identification and elimination/minimization of the most Common causes of non-linearity effects in control of power converters (e.g. dead-Time elimination etc.). Fourth chapter (“Active suppression of low-frequency interference currents caused by operation of traction drive converters and auxiliary power supply converters by application of control algorithms”), provides systematic approach to the relevant issues concerning proper design and implementation of the active suppression system concept by maximizing the usage of properly implemented appropriate control algorithms (sampling algorithms, filtering algorithms including parallel finite impulse response filter structures Based on the for minimization of intermodulation distortion tuned to the symmetrical pairs of frequencies with respect to the fundamental frequency of the grid voltage, robust and accurate algorithms for synchronization of the power converter and estimation of the grid voltage characteristics, software net-mark as zero-crossing detector of the fundamental component of the input voltage, feedforward algorithms Based on PLL outputs and narrow-band reconstruction of the actual value of the grid voltage, phase-coordinated control of PWM carriers of grid interfaced converters on a vehicle level, without dedicated hardware infrastructure…), minimizing the possibilities for interaction between the corresponding control structure and the power-stage of the converter and vice-versa. Fifth chapter (“Implementation of algorithms on a target embedded control system”) describes hardware and software related issues that have been solved within the research activities in order to implement the proposed set of algorithms within given constrains defined by limited computing capabilities (basic 16-bit integer arithmetic) of the target system in combination with rather short period of control cyclic task (