The Experts below are selected from a list of 63 Experts worldwide ranked by ideXlab platform

Roberto Santana - One of the best experts on this subject based on the ideXlab platform.

  • evolutionary optimization of Compiler Flag selection by learning and exploiting Flags interactions
    Genetic and Evolutionary Computation Conference, 2016
    Co-Authors: Unai Garciarena, Roberto Santana
    Abstract:

    Compiler Flag selection can be an effective way to increase the quality of executable code according to different code quality criteria. Evolutionary algorithms have been successfully applied to this optimization problem. However, previous approaches have only partially addressed the question of capturing and exploiting the interactions between compilation options to improve the search. In this paper we deal with this question comparing estimation of distribution algorithms (EDAs) and a traditional genetic algorithm approach. We show that EDAs that learn bivariate interactions can improve the results of GAs for some of the programs considered. We also show that the probabilistic models generated as a result of the search for optimal Flag combinations can be used to unveil the (problem-dependent) interactions between the Flags, allowing the user a more informed choice of compilation options.

  • GECCO (Companion) - Evolutionary Optimization of Compiler Flag Selection by Learning and Exploiting Flags Interactions
    Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion - GECCO '16 Companion, 2016
    Co-Authors: Unai Garciarena, Roberto Santana
    Abstract:

    Compiler Flag selection can be an effective way to increase the quality of executable code according to different code quality criteria. Evolutionary algorithms have been successfully applied to this optimization problem. However, previous approaches have only partially addressed the question of capturing and exploiting the interactions between compilation options to improve the search. In this paper we deal with this question comparing estimation of distribution algorithms (EDAs) and a traditional genetic algorithm approach. We show that EDAs that learn bivariate interactions can improve the results of GAs for some of the programs considered. We also show that the probabilistic models generated as a result of the search for optimal Flag combinations can be used to unveil the (problem-dependent) interactions between the Flags, allowing the user a more informed choice of compilation options.

Nordin Zakaria - One of the best experts on this subject based on the ideXlab platform.

  • performance profile of some hybrid heuristic search techniques using Compiler Flag selection as a seed example
    Congress on Evolutionary Computation, 2012
    Co-Authors: Thayalan Sandran, Nordin Zakaria
    Abstract:

    The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of Compiler technology has resulted in built in optimization functionality called Compiler Flags. Like a switch the Flag turns on or off for a particular optimization behavior. The existence of various Flags in turn causes confusion as to which Flag or combination of Flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best Compiler Flag combination respectively and finally proposing a hybrid algorithm that produces better Flag combination in comparison to the former two.

  • IEEE Congress on Evolutionary Computation - Performance profile of some hybrid heuristic search techniques using Compiler Flag selection as a seed example
    2012 IEEE Congress on Evolutionary Computation, 2012
    Co-Authors: Thayalan Sandran, Nordin Zakaria
    Abstract:

    The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of Compiler technology has resulted in built in optimization functionality called Compiler Flags. Like a switch the Flag turns on or off for a particular optimization behavior. The existence of various Flags in turn causes confusion as to which Flag or combination of Flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best Compiler Flag combination respectively and finally proposing a hybrid algorithm that produces better Flag combination in comparison to the former two.

Thayalan Sandran - One of the best experts on this subject based on the ideXlab platform.

  • SocProS (2) - An Optimized Tuning of Genetic Algorithm Parameters in Compiler Flag Selection Based on Compilation and Execution Duration
    Advances in Intelligent and Soft Computing, 2020
    Co-Authors: Thayalan Sandran, M. Nordin Zakaria
    Abstract:

    Compiler Flags exist to provide option for the software developer to dictate certain parameter to the Compiler. Such parameters provide hints to the Compiler on how to handle certain portion of the source code. In the realm of optimization, Compiler Flags provide the fastest way to speed up a program. The right combination of Flags will provide significant enhancement in speed without compromising the integrity of the output. However, the main challenge is choosing that particular right set of Flags. Many a times, developers work around this issue by dictating the optimization level. In that way, the Compiler imposes a package of Flags. This process may lead to degradation of performance in terms of execution speed and also significant increase in program size. In this work, we are studying the usage of Genetic Algorithm as a way to select the optimization Flags that could produce codes which compile and execute fast.

  • a genetic algorithm approach towards Compiler Flag selection based on compilation and execution duration
    International Conference on Computer and Information Science, 2012
    Co-Authors: Thayalan Sandran, Mohamed Nordin Zakaria
    Abstract:

    The evolution of microprocessor technology often leads towards the production of high performance processors and chipsets. In the same token, to harness such capabilities is an art itself. The synthesis of fast executables begins at code design phase up till the compilation process. Even though Compilers are at the end position, the right Flag would provide substantial performance gain. Given the large choice of Flags, often the programmer opts for the simpler method which is to merely dictate the optimization level. The Compiler then imposes a set of Flags accordingly. There are several shortcomings to this approach. In this work, we are proposing the usage of Genetic Algorithm to determine the Flags that could be used to produce code which consumes shorter compilation and execution time.

  • performance profile of some hybrid heuristic search techniques using Compiler Flag selection as a seed example
    Congress on Evolutionary Computation, 2012
    Co-Authors: Thayalan Sandran, Nordin Zakaria
    Abstract:

    The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of Compiler technology has resulted in built in optimization functionality called Compiler Flags. Like a switch the Flag turns on or off for a particular optimization behavior. The existence of various Flags in turn causes confusion as to which Flag or combination of Flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best Compiler Flag combination respectively and finally proposing a hybrid algorithm that produces better Flag combination in comparison to the former two.

  • IEEE Congress on Evolutionary Computation - Performance profile of some hybrid heuristic search techniques using Compiler Flag selection as a seed example
    2012 IEEE Congress on Evolutionary Computation, 2012
    Co-Authors: Thayalan Sandran, Nordin Zakaria
    Abstract:

    The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of Compiler technology has resulted in built in optimization functionality called Compiler Flags. Like a switch the Flag turns on or off for a particular optimization behavior. The existence of various Flags in turn causes confusion as to which Flag or combination of Flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best Compiler Flag combination respectively and finally proposing a hybrid algorithm that produces better Flag combination in comparison to the former two.

  • an optimized tuning of genetic algorithm parameters in Compiler Flag selection based on compilation and execution duration
    Soft Computing for Problem Solving, 2012
    Co-Authors: Thayalan Sandran, Nordin M Zakaria
    Abstract:

    Compiler Flags exist to provide option for the software developer to dictate certain parameter to the Compiler. Such parameters provide hints to the Compiler on how to handle certain portion of the source code. In the realm of optimization, Compiler Flags provide the fastest way to speed up a program. The right combination of Flags will provide significant enhancement in speed without compromising the integrity of the output. However, the main challenge is choosing that particular right set of Flags. Many a times, developers work around this issue by dictating the optimization level. In that way, the Compiler imposes a package of Flags. This process may lead to degradation of performance in terms of execution speed and also significant increase in program size. In this work, we are studying the usage of Genetic Algorithm as a way to select the optimization Flags that could produce codes which compile and execute fast.

Unai Garciarena - One of the best experts on this subject based on the ideXlab platform.

  • evolutionary optimization of Compiler Flag selection by learning and exploiting Flags interactions
    Genetic and Evolutionary Computation Conference, 2016
    Co-Authors: Unai Garciarena, Roberto Santana
    Abstract:

    Compiler Flag selection can be an effective way to increase the quality of executable code according to different code quality criteria. Evolutionary algorithms have been successfully applied to this optimization problem. However, previous approaches have only partially addressed the question of capturing and exploiting the interactions between compilation options to improve the search. In this paper we deal with this question comparing estimation of distribution algorithms (EDAs) and a traditional genetic algorithm approach. We show that EDAs that learn bivariate interactions can improve the results of GAs for some of the programs considered. We also show that the probabilistic models generated as a result of the search for optimal Flag combinations can be used to unveil the (problem-dependent) interactions between the Flags, allowing the user a more informed choice of compilation options.

  • GECCO (Companion) - Evolutionary Optimization of Compiler Flag Selection by Learning and Exploiting Flags Interactions
    Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion - GECCO '16 Companion, 2016
    Co-Authors: Unai Garciarena, Roberto Santana
    Abstract:

    Compiler Flag selection can be an effective way to increase the quality of executable code according to different code quality criteria. Evolutionary algorithms have been successfully applied to this optimization problem. However, previous approaches have only partially addressed the question of capturing and exploiting the interactions between compilation options to improve the search. In this paper we deal with this question comparing estimation of distribution algorithms (EDAs) and a traditional genetic algorithm approach. We show that EDAs that learn bivariate interactions can improve the results of GAs for some of the programs considered. We also show that the probabilistic models generated as a result of the search for optimal Flag combinations can be used to unveil the (problem-dependent) interactions between the Flags, allowing the user a more informed choice of compilation options.

John Wawrzynek - One of the best experts on this subject based on the ideXlab platform.

  • AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning
    arXiv: Distributed Parallel and Cluster Computing, 2020
    Co-Authors: Qijing Huang, John Xiang, Ion Stoica, Krste Asanovic, William K. Moses, John Wawrzynek
    Abstract:

    The performance of the code a Compiler generates depends on the order in which it applies the optimization passes. Choosing a good order--often referred to as the phase-ordering problem, is an NP-hard problem. As a result, existing solutions rely on a variety of heuristics. In this paper, we evaluate a new technique to address the phase-ordering problem: deep reinforcement learning. To this end, we implement AutoPhase: a framework that takes a program and uses deep reinforcement learning to find a sequence of compilation passes that minimizes its execution time. Without loss of generality, we construct this framework in the context of the LLVM Compiler toolchain and target high-level synthesis programs. We use random forests to quantify the correlation between the effectiveness of a given pass and the program's features. This helps us reduce the search space by avoiding phase orderings that are unlikely to improve the performance of a given program. We compare the performance of AutoPhase to state-of-the-art algorithms that address the phase-ordering problem. In our evaluation, we show that AutoPhase improves circuit performance by 28% when compared to using the -O3 Compiler Flag, and achieves competitive results compared to the state-of-the-art solutions, while requiring fewer samples. Furthermore, unlike existing state-of-the-art solutions, our deep reinforcement learning solution shows promising result in generalizing to real benchmarks and 12,874 different randomly generated programs, after training on a hundred randomly generated programs.

  • FCCM - AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning
    2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2019
    Co-Authors: Qijing Huang, John Xiang, Ion Stoica, Krste Asanovic, William S. Moses, John Wawrzynek
    Abstract:

    The performance of the code generated by a Compiler depends on the order in which the optimization passes are applied. In high-level synthesis, the quality of the generated circuit relates directly to the code generated by the front-end Compiler. Choosing a good order–often referred to as the phase-ordering problem–is an NP-hard problem. In this paper, we evaluate a new technique to address the phase-ordering problem: deep reinforcement learning. We implement a framework in the context of the LLVM Compiler to optimize the ordering for HLS programs and compare the performance of deep reinforcement learning to state-of-the-art algorithms that address the phase-ordering problem. Overall, our framework runs one to two orders of magnitude faster than these algorithms, and achieves a 16% improvement in circuit performance over the -O3 Compiler Flag.

  • AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning
    arXiv: Programming Languages, 2019
    Co-Authors: Qijing Huang, John Xiang, Ion Stoica, Krste Asanovic, William S. Moses, John Wawrzynek
    Abstract:

    The performance of the code generated by a Compiler depends on the order in which the optimization passes are applied. In high-level synthesis, the quality of the generated circuit relates directly to the code generated by the front-end Compiler. Choosing a good order--often referred to as the phase-ordering problem--is an NP-hard problem. In this paper, we evaluate a new technique to address the phase-ordering problem: deep reinforcement learning. We implement a framework in the context of the LLVM Compiler to optimize the ordering for HLS programs and compare the performance of deep reinforcement learning to state-of-the-art algorithms that address the phase-ordering problem. Overall, our framework runs one to two orders of magnitude faster than these algorithms, and achieves a 16% improvement in circuit performance over the -O3 Compiler Flag.

  • AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning
    2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2019
    Co-Authors: Qijing Huang, William Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
    Abstract:

    The performance of the code generated by a Compiler depends on the order in which the optimization passes are applied. In high-level synthesis, the quality of the generated circuit relates directly to the code generated by the front-end Compiler. Choosing a good order-often referred to as the phase-ordering problem-is an NP-hard problem. In this paper, we evaluate a new technique to address the phase-ordering problem: deep reinforcement learning. We implement a framework in the context of the LLVM Compiler to optimize the ordering for HLS programs and compare the performance of deep reinforcement learning to state-of-the-art algorithms that address the phase-ordering problem. Overall, our framework runs one to two orders of magnitude faster than these algorithms, and achieves a 16% improvement in circuit performance over the -O3 Compiler Flag.