The Experts below are selected from a list of 73068 Experts worldwide ranked by ideXlab platform
Tian Fatt Tay - One of the best experts on this subject based on the ideXlab platform.
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residue Number systems a new paradigm to datapath optimization for low power and high performance digital signal processing applications
IEEE Circuits and Systems Magazine, 2015Co-Authors: Chiphong Chang, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Tian Fatt TayAbstract:Residue Number System (RNS) is a non-weighted Number system which was proposed by Garner back in 1959 to achieve fast implementation of addition, subtraction and multiplication operations in special-purpose computations. Unfortunately, RNS did not turn out as a popular alternative to two?s Complement Number system in those days. The rigidity of instruction set architectures of the market-dominant computers and microprocessors then has been the main barrier to sustain the development of RNS-based applications. In recent years, technological advancement in semiconductor technology has revived the interests to reconsider RNS for application-specific computing. There are at least two unique motivations which make RNS computations more attractive and applicable in modern digital signal processing applications. Firstly, the modular and distributive properties of RNS are used to achieve performance improvements especially in the emerging distributed and ubiquitous computing platforms such as cloud, wireless ad hoc networks, and applications which require tolerance against soft error. Secondly, energy efficiency becomes a key driver in the continual densification of Complementary metal oxide semiconductor (CMOS) digital integrated circuits. The high degree of computational parallelism in RNS offers new degree of freedom to optimize energy performance, particularly for very long word length arithmetic such as those involved in the hardware implementation of cryptographic algorithms. Our aim in this paper is to show this revolution by discussing interesting development in RNS and foster the innovative use of RNS for more applications. Different applications of RNS are investigated to demonstrate how this unconventional Number system can be leveraged to benefit their implementation.
Earl E. Swartzlander - One of the best experts on this subject based on the ideXlab platform.
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The Negative Two's Complement Number System
The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology, 2007Co-Authors: Earl E. SwartzlanderAbstract:The two's Complement fractional fixed-point Number system is widely used to implement digital signal processing on VLSI chips. It has a range of values from ?1 to one least significant bit below +1. Either the multiplication of ?1 ? ?1 or taking the absolute value of ?1 produces a result (+1) that cannot be represented. A new system, the negative two's Complement Number system, is described here that has a range of one least significant bit above ?1 to +1 which eliminates the problem. This paper presents the new Number system and describes algorithms for the basic arithmetic operations.
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truncated multiplications for the negative two s Complement Number system
International Midwest Symposium on Circuits and Systems, 2006Co-Authors: Hyuk Park, Earl E. SwartzlanderAbstract:In the design of digital signal processing systems, where single-precision results are required, the power dissipation and area of parallel multipliers can be significantly reduced by truncating the less significant columns and compensating to produce an approximate rounded product. This paper provides the design and modeling of truncated multiplications of signed inputs utilizing the negative fractional two's Complement Number system and compares them with those for the unsigned Number system and the conventional two's Complement Number system. A software simulation finds the input patterns with extreme errors for truncated multiplication with constant correction. It is shown that the negative two's Complement Number system is suitable for truncated multiplication of signed Numbers.
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efficient sign extension for multiple addition
Proceedings of SPIE - The International Society for Optical Engineering, 2003Co-Authors: Robert T Grisamore, Earl E. SwartzlanderAbstract:A technique for reducing the sign extension overhead in adder trees is presented. A generalized version of the technique is shown to reduce the Number of redundant sign extension computations required for reducing parallel adder trees from N terms to two terms. Additionally, the technique eliminates the fan-out latency that traditional sign extension places on late arriving sign bits. Twos Complement Number growth is also managed in carry-save form without the need for carry propagation. The application of the technique to 2N term adder trees is demonstrated. The implementation requires no computational overhead and needs minimal hardware. This design not only reduces hardware complexity, but also reduces computation delay. Finally, a simple circuit transformation to the traditional 4-2 compressor allows simple construction of circuits utilizing the technique.
Athasit Surarerks - One of the best experts on this subject based on the ideXlab platform.
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on the fly conversion from signed digit Number system into Complement representation
International Symposium on Communications and Information Technologies, 2006Co-Authors: Veerasit Charoensiri, Athasit SurarerksAbstract:This paper proposes a generic algorithm for converting the redundant Number representation into the Complement Number representation using "on-the-fly" architecture, which can be taken place in parallel. This method can solve the carry propagation problem occurring in the conventional conversions, which are sequential algorithms. The detail in this paper shows that the conversion is computable by the "on-the-fly" technique and lead to a faster computation time. Moreover, the proposed methodology can perform the conversion of a Number in any integer radix into the Complement representation. The mathematical proofs of the proposed algorithm in terms of correctness are also included in this paper.
G M Blair - One of the best experts on this subject based on the ideXlab platform.
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the equivalence of twos Complement addition and the conversion of redundant binary to twos Complement Numbers
IEEE transactions on circuits and systems. 2 Analog and digital signal processing, 1998Co-Authors: G M BlairAbstract:The equivalence between redundant-binary (RB) to twos-Complement Number conversion and twos-Complement addition is shown using a simple transform between the two Number domains. As a consequence, all hardware architectures designed for either operation may be easily adapted to implement the other.
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low area pipelined conversion from signed binary to two s Complement Number representation
Electronics Letters, 1996Co-Authors: G M BlairAbstract:A new architecture is proposed for the conversion of Numbers from signed-binary to two's-Complement representation, where the former arrives in a skewed, most-significant-digits-first format, due to pipelined arithmetic operations.
Chiphong Chang - One of the best experts on this subject based on the ideXlab platform.
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residue Number systems a new paradigm to datapath optimization for low power and high performance digital signal processing applications
IEEE Circuits and Systems Magazine, 2015Co-Authors: Chiphong Chang, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Tian Fatt TayAbstract:Residue Number System (RNS) is a non-weighted Number system which was proposed by Garner back in 1959 to achieve fast implementation of addition, subtraction and multiplication operations in special-purpose computations. Unfortunately, RNS did not turn out as a popular alternative to two?s Complement Number system in those days. The rigidity of instruction set architectures of the market-dominant computers and microprocessors then has been the main barrier to sustain the development of RNS-based applications. In recent years, technological advancement in semiconductor technology has revived the interests to reconsider RNS for application-specific computing. There are at least two unique motivations which make RNS computations more attractive and applicable in modern digital signal processing applications. Firstly, the modular and distributive properties of RNS are used to achieve performance improvements especially in the emerging distributed and ubiquitous computing platforms such as cloud, wireless ad hoc networks, and applications which require tolerance against soft error. Secondly, energy efficiency becomes a key driver in the continual densification of Complementary metal oxide semiconductor (CMOS) digital integrated circuits. The high degree of computational parallelism in RNS offers new degree of freedom to optimize energy performance, particularly for very long word length arithmetic such as those involved in the hardware implementation of cryptographic algorithms. Our aim in this paper is to show this revolution by discussing interesting development in RNS and foster the innovative use of RNS for more applications. Different applications of RNS are investigated to demonstrate how this unconventional Number system can be leveraged to benefit their implementation.