The Experts below are selected from a list of 324 Experts worldwide ranked by ideXlab platform
Yi Hsuan Cheng - One of the best experts on this subject based on the ideXlab platform.
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a low thd clock free class d audio amplifier with an increased Damping Resistor and cross offset cancellation technique
International Symposium on Circuits and Systems, 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
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ISCAS - A low THD clock-free Class-D audio amplifier with an increased Damping Resistor and cross offset cancellation technique
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
Ying Wei Chou - One of the best experts on this subject based on the ideXlab platform.
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a low thd clock free class d audio amplifier with an increased Damping Resistor and cross offset cancellation technique
International Symposium on Circuits and Systems, 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
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ISCAS - A low THD clock-free Class-D audio amplifier with an increased Damping Resistor and cross offset cancellation technique
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
Goro Fujita - One of the best experts on this subject based on the ideXlab platform.
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a method of enhancement of transmission capability limit using system Damping Resistor and series shunt capacitors
Power and Energy Society General Meeting, 2009Co-Authors: Y. Mikuni, G. Shirai, R. Yokoyama, Goro FujitaAbstract:This paper presents a method of enhancement of transmission capability limit using system Damping Resistor (SDR) and series — shunt capacitors (SC and ShC). The SDR is very effective for short distance transmission lines such as 50km or so. The SDR is small in capacities for transmitted power and the durations of switching time are around 0.5s. Experiments are carried out for the determination of optimal size and switching time of the SDR for about 50, 100 and 150km transmission lines. The effectiveness is certified by experiments using an artificial transmission line model. For long distance transmission lines, experimental results indicate that the transmission lines compensated by series capacitor are effective.
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A method of enhancement of transmission capability limit using system Damping Resistor and series — Shunt capacitors
2009 IEEE Power & Energy Society General Meeting, 2009Co-Authors: Y. Mikuni, G. Shirai, R. Yokoyama, Goro FujitaAbstract:This paper presents a method of enhancement of transmission capability limit using system Damping Resistor (SDR) and series — shunt capacitors (SC and ShC). The SDR is very effective for short distance transmission lines such as 50km or so. The SDR is small in capacities for transmitted power and the durations of switching time are around 0.5s. Experiments are carried out for the determination of optimal size and switching time of the SDR for about 50, 100 and 150km transmission lines. The effectiveness is certified by experiments using an artificial transmission line model. For long distance transmission lines, experimental results indicate that the transmission lines compensated by series capacitor are effective.
Meng Wei Chien - One of the best experts on this subject based on the ideXlab platform.
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a low thd clock free class d audio amplifier with an increased Damping Resistor and cross offset cancellation technique
International Symposium on Circuits and Systems, 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
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ISCAS - A low THD clock-free Class-D audio amplifier with an increased Damping Resistor and cross offset cancellation technique
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
Shin Chieh Chen - One of the best experts on this subject based on the ideXlab platform.
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a low thd clock free class d audio amplifier with an increased Damping Resistor and cross offset cancellation technique
International Symposium on Circuits and Systems, 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
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ISCAS - A low THD clock-free Class-D audio amplifier with an increased Damping Resistor and cross offset cancellation technique
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014Co-Authors: Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Kehorng Chen, Yinghsi Lin, Tsungyen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan ChengAbstract:An increased Damping Resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8Ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).
