The Experts below are selected from a list of 46098 Experts worldwide ranked by ideXlab platform
C. Van Hoof - One of the best experts on this subject based on the ideXlab platform.
-
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K
IEEE Journal of Solid-State Circuits, 2009Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first flash Analog-to-Digital Converter (ADC) in standard CMOS technology that functions from 300 K (room temperature) down to 4.2 K. It has been designed to operate in cryogenic sensor systems as they are cooled from room temperature to their final cryogenic operating temperature. In order to preserve the circuit's performance over this wide temperature range, even in the presence of temperature-induced transistor anomalies, Dedicated Architecture and switching schemes are employed. SPICE models for adequate circuit simulation at 4.2 K have been extracted. A first prototype of the chosen Architecture, an 8-bit ADC in a standard 0.7 mum CMOS technology, achieves a differential nonlinearity (DNL) of 0.5 LSB at room temperature and 1 LSB at 4.2 K at a sampling frequency of 12.5 kHz.
-
ESSCIRC - An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first standard CMOS flash analog-to-digital converter (ADC) operational over an ultra wide temperature range (UWT) from room temperature (27deg C or 300 K) down to 4 K (-269deg C). To preserve the circuits performance over the UWT range in the presence of temperature induced transistor anomalies, Dedicated Architecture and switching schemes are employed.
Ybe Creten - One of the best experts on this subject based on the ideXlab platform.
-
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K
IEEE Journal of Solid-State Circuits, 2009Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first flash Analog-to-Digital Converter (ADC) in standard CMOS technology that functions from 300 K (room temperature) down to 4.2 K. It has been designed to operate in cryogenic sensor systems as they are cooled from room temperature to their final cryogenic operating temperature. In order to preserve the circuit's performance over this wide temperature range, even in the presence of temperature-induced transistor anomalies, Dedicated Architecture and switching schemes are employed. SPICE models for adequate circuit simulation at 4.2 K have been extracted. A first prototype of the chosen Architecture, an 8-bit ADC in a standard 0.7 mum CMOS technology, achieves a differential nonlinearity (DNL) of 0.5 LSB at room temperature and 1 LSB at 4.2 K at a sampling frequency of 12.5 kHz.
-
ESSCIRC - An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first standard CMOS flash analog-to-digital converter (ADC) operational over an ultra wide temperature range (UWT) from room temperature (27deg C or 300 K) down to 4 K (-269deg C). To preserve the circuits performance over the UWT range in the presence of temperature induced transistor anomalies, Dedicated Architecture and switching schemes are employed.
Patrick Merken - One of the best experts on this subject based on the ideXlab platform.
-
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K
IEEE Journal of Solid-State Circuits, 2009Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first flash Analog-to-Digital Converter (ADC) in standard CMOS technology that functions from 300 K (room temperature) down to 4.2 K. It has been designed to operate in cryogenic sensor systems as they are cooled from room temperature to their final cryogenic operating temperature. In order to preserve the circuit's performance over this wide temperature range, even in the presence of temperature-induced transistor anomalies, Dedicated Architecture and switching schemes are employed. SPICE models for adequate circuit simulation at 4.2 K have been extracted. A first prototype of the chosen Architecture, an 8-bit ADC in a standard 0.7 mum CMOS technology, achieves a differential nonlinearity (DNL) of 0.5 LSB at room temperature and 1 LSB at 4.2 K at a sampling frequency of 12.5 kHz.
-
ESSCIRC - An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first standard CMOS flash analog-to-digital converter (ADC) operational over an ultra wide temperature range (UWT) from room temperature (27deg C or 300 K) down to 4 K (-269deg C). To preserve the circuits performance over the UWT range in the presence of temperature induced transistor anomalies, Dedicated Architecture and switching schemes are employed.
Robert Mertens - One of the best experts on this subject based on the ideXlab platform.
-
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K
IEEE Journal of Solid-State Circuits, 2009Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first flash Analog-to-Digital Converter (ADC) in standard CMOS technology that functions from 300 K (room temperature) down to 4.2 K. It has been designed to operate in cryogenic sensor systems as they are cooled from room temperature to their final cryogenic operating temperature. In order to preserve the circuit's performance over this wide temperature range, even in the presence of temperature-induced transistor anomalies, Dedicated Architecture and switching schemes are employed. SPICE models for adequate circuit simulation at 4.2 K have been extracted. A first prototype of the chosen Architecture, an 8-bit ADC in a standard 0.7 mum CMOS technology, achieves a differential nonlinearity (DNL) of 0.5 LSB at room temperature and 1 LSB at 4.2 K at a sampling frequency of 12.5 kHz.
-
ESSCIRC - An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first standard CMOS flash analog-to-digital converter (ADC) operational over an ultra wide temperature range (UWT) from room temperature (27deg C or 300 K) down to 4 K (-269deg C). To preserve the circuits performance over the UWT range in the presence of temperature induced transistor anomalies, Dedicated Architecture and switching schemes are employed.
Willy Sansen - One of the best experts on this subject based on the ideXlab platform.
-
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K
IEEE Journal of Solid-State Circuits, 2009Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first flash Analog-to-Digital Converter (ADC) in standard CMOS technology that functions from 300 K (room temperature) down to 4.2 K. It has been designed to operate in cryogenic sensor systems as they are cooled from room temperature to their final cryogenic operating temperature. In order to preserve the circuit's performance over this wide temperature range, even in the presence of temperature-induced transistor anomalies, Dedicated Architecture and switching schemes are employed. SPICE models for adequate circuit simulation at 4.2 K have been extracted. A first prototype of the chosen Architecture, an 8-bit ADC in a standard 0.7 mum CMOS technology, achieves a differential nonlinearity (DNL) of 0.5 LSB at room temperature and 1 LSB at 4.2 K at a sampling frequency of 12.5 kHz.
-
ESSCIRC - An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008Co-Authors: Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, C. Van HoofAbstract:This paper presents the first standard CMOS flash analog-to-digital converter (ADC) operational over an ultra wide temperature range (UWT) from room temperature (27deg C or 300 K) down to 4 K (-269deg C). To preserve the circuits performance over the UWT range in the presence of temperature induced transistor anomalies, Dedicated Architecture and switching schemes are employed.
