Diodes

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Tsunenobu Kimoto - One of the best experts on this subject based on the ideXlab platform.

  • ultrahigh voltage sic mps Diodes with hybrid unipolar bipolar operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

  • Ultrahigh-Voltage SiC MPS Diodes With Hybrid Unipolar/Bipolar Operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

D F Wong - One of the best experts on this subject based on the ideXlab platform.

  • a polynomial time optimal diode insertion routing algorithm for fixing antenna problem ic layout
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2004
    Co-Authors: Lida Huang, Xiaoping Tang, Hua Xiang, D F Wong
    Abstract:

    The antenna problem is a phenomenon of plasma-induced gate-oxide degradation. It directly affects manufacturability of very large scale integration (VLSI) circuits, especially in deep submicron technology using high-density plasma. Diode insertion is a very effective way to solve this problem. Ideally, Diodes are inserted directly under the wires that violate antenna rules. But in today's high-density VLSI layouts, there is simply not enough room for "under-the-wire" diode insertion for all wires. Thus, it is necessary to insert many Diodes at legal "off-wire" locations and extend the antenna-rule violating wires to connect to their respective Diodes. Previously, only simple heuristic algorithms were available for this diode insertion and routing problem. In this paper, we show that the diode insertion and routing problem for an arbitrary given number of routing layers can be optimally solved in polynomial time. Our algorithm guarantees finding a feasible diode insertion and routing solution whenever one exists. Moreover, we can guarantee to find a feasible solution to minimize a cost function of the form /spl alpha//spl times/L+/spl beta//spl times/N, where L is the total length of extension wires and N is the total number of vias on the extension wires. Experimental results show that our algorithm is very efficient.

  • a polynomial time optimal diode insertion routing algorithm for fixing antenna problem
    Design Automation and Test in Europe, 2002
    Co-Authors: Lida Huang, Xiaoping Tang, Hua Xiang, D F Wong
    Abstract:

    Antenna problem is a phenomenon of plasma induced gate oxide degradation. It directly affects manufacturability of VLSI circuits, especially in deep-submicron technology using high density plasma. Diode insertion is a very effective way to solve this problem Ideally Diodes are inserted directly under the wires that violate antenna rules. But in today's high-density VLSI layouts, there is simply not enough room for "under-the-wire" diode insertion for all wires. Thus it is necessary to insert many Diodes at legal "off-wire" locations and extend the antenna-rule violating wires to connect to their respective Diodes. Previously only simple heuristic algorithms were available for this diode insertion and routing problem. In this paper we show that the diode insertion and routing problem for an arbitrary given number of routing layers can be optimally solved in polynomial time. Our algorithm guarantees to find a feasible diode insertion and routing solution whenever one exists. Moreover we can guarantee to find a feasible solution to minimize a cost function of the form /spl alpha/ /spl middot/ L + /spl beta/ /spl middot/ N where L is the total length of extension wires and N is the total number of Was on the extension wires. Experimental results show that our algorithm is very efficient.

Hiroki Niwa - One of the best experts on this subject based on the ideXlab platform.

  • ultrahigh voltage sic mps Diodes with hybrid unipolar bipolar operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

  • Ultrahigh-Voltage SiC MPS Diodes With Hybrid Unipolar/Bipolar Operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

Lida Huang - One of the best experts on this subject based on the ideXlab platform.

  • a polynomial time optimal diode insertion routing algorithm for fixing antenna problem ic layout
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2004
    Co-Authors: Lida Huang, Xiaoping Tang, Hua Xiang, D F Wong
    Abstract:

    The antenna problem is a phenomenon of plasma-induced gate-oxide degradation. It directly affects manufacturability of very large scale integration (VLSI) circuits, especially in deep submicron technology using high-density plasma. Diode insertion is a very effective way to solve this problem. Ideally, Diodes are inserted directly under the wires that violate antenna rules. But in today's high-density VLSI layouts, there is simply not enough room for "under-the-wire" diode insertion for all wires. Thus, it is necessary to insert many Diodes at legal "off-wire" locations and extend the antenna-rule violating wires to connect to their respective Diodes. Previously, only simple heuristic algorithms were available for this diode insertion and routing problem. In this paper, we show that the diode insertion and routing problem for an arbitrary given number of routing layers can be optimally solved in polynomial time. Our algorithm guarantees finding a feasible diode insertion and routing solution whenever one exists. Moreover, we can guarantee to find a feasible solution to minimize a cost function of the form /spl alpha//spl times/L+/spl beta//spl times/N, where L is the total length of extension wires and N is the total number of vias on the extension wires. Experimental results show that our algorithm is very efficient.

  • a polynomial time optimal diode insertion routing algorithm for fixing antenna problem
    Design Automation and Test in Europe, 2002
    Co-Authors: Lida Huang, Xiaoping Tang, Hua Xiang, D F Wong
    Abstract:

    Antenna problem is a phenomenon of plasma induced gate oxide degradation. It directly affects manufacturability of VLSI circuits, especially in deep-submicron technology using high density plasma. Diode insertion is a very effective way to solve this problem Ideally Diodes are inserted directly under the wires that violate antenna rules. But in today's high-density VLSI layouts, there is simply not enough room for "under-the-wire" diode insertion for all wires. Thus it is necessary to insert many Diodes at legal "off-wire" locations and extend the antenna-rule violating wires to connect to their respective Diodes. Previously only simple heuristic algorithms were available for this diode insertion and routing problem. In this paper we show that the diode insertion and routing problem for an arbitrary given number of routing layers can be optimally solved in polynomial time. Our algorithm guarantees to find a feasible diode insertion and routing solution whenever one exists. Moreover we can guarantee to find a feasible solution to minimize a cost function of the form /spl alpha/ /spl middot/ L + /spl beta/ /spl middot/ N where L is the total length of extension wires and N is the total number of Was on the extension wires. Experimental results show that our algorithm is very efficient.

Jun Suda - One of the best experts on this subject based on the ideXlab platform.

  • ultrahigh voltage sic mps Diodes with hybrid unipolar bipolar operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

  • Ultrahigh-Voltage SiC MPS Diodes With Hybrid Unipolar/Bipolar Operation
    IEEE Transactions on Electron Devices, 2017
    Co-Authors: Hiroki Niwa, Jun Suda, Tsunenobu Kimoto
    Abstract:

    In this paper, ultrahigh-voltage (UHV) SiC devices with hybrid unipolar/bipolar operation are introduced and demonstrated. As the first step of such a device, a merged p-i-n Schottky (MPS) diode with an epitaxial p+-anode layer is proposed to reduce the conduction loss of a bipolar device in the low current region. A “snapback” phenomenon is intensively investigated by analytical modeling, device simulation, and experiment and a design guideline of snapback-free hybrid operating MPS Diodes is presented. Using the design guideline, snapback-free MPS Diodes are fabricated and forward characteristics are investigated. By using a proper edge termination structure, a UHV SiC MPS diode with breakdown voltage of 11.3 kV is demonstrated.

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