The Experts below are selected from a list of 99 Experts worldwide ranked by ideXlab platform
Jean-christophe Crébier - One of the best experts on this subject based on the ideXlab platform.
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gate Driver supply architectures for common mode conducted emi reduction in series connection of multiple power devices
IEEE Transactions on Power Electronics, 2018Co-Authors: Van-sang Nguyen, Pierre Lefranc, Jean-christophe CrébierAbstract:This paper presents a study on the gate Driver circuitries that need to be implemented to drive several power devices when associated in series connection. More specifically, the propagation paths of parasitic currents through the gate Driver circuitries, exited under high switching speeds, are studied in different configurations trying to minimize common mode currents generated. In a gate Driver Circuitry for a regular low side–high side switching cell configuration with one upper switch and one lower switch, the voltage transient dv/dt at the middle point applied across the primary-secondary parasitic capacitance of gate Driver supplies, and control signal isolation units are the reasons for the generation of conducted electromagnetic interference (EMI) perturbations. In complex power converters, multicell, multilevel, or even series connection of power devices, many Driver circuits are required and implemented. Similarly, in such converters, there are several dv/dt sources generated at different floating points producing conducted EMI perturbations from the power part to the control part through many gate Driver circuitries. Based on previous works, this paper analyzes the best configuration to minimize parasitic currents, especially reducing the conducted common mode currents in series connected transistors topologies. Simulations and practical results validate the analysis for two power devices in series connection, and then the extrapolations for more power devices in series connection, up to six are discussed and analyzed with the help of simulations results.
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Contributions to dedicated gate Driver Circuitry for very high switching speed high temperature power devices
2016Co-Authors: Van-sang Nguyen, Farshid Sarrafin_ardebili, Davy Colin, Nicolas Rouger, Pierre Lefranc, Yves Lembeye, Jean-daniel Arnould, Bruno Allard, Jean-christophe CrébierAbstract:Based on WBG power devices operating constraints, this paper analyses and presents developments and prototyping of dedicated high side control signal level shifters. Designs take into account temperature, propagation delay deviation and high dv/dt susceptibility to deliver a generic solution able to comply with new device constraints. If silicon technology remains today the unique reliable technical solution, the implementation of gate Driver in this technology is becoming very challenging. Delay deviations, signal integrity (duty cycle duration and time location) of prototypes are characterized with respect to temperature as well as dv/dt immunity.
M Pfeiffer - One of the best experts on this subject based on the ideXlab platform.
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a low drive voltage transparent metal free n i p electrophosphorescent light emitting diode
Organic Electronics, 2003Co-Authors: M Pfeiffer, Stephen R Forrest, Xiang ZhouAbstract:Abstract We demonstrate a transparent, inverted, electrophosphorescent n–i–p organic light emitting diode (OLED) exhibiting a luminance of 500 cd/m 2 at 3.1 V, and with a luminous power efficiency of 23 lm/W when light emitted from both top and bottom surfaces is summed. We find that 10% more light is emitted from the top surface; hence a power efficiency of 12 lm/W is obtained for a device viewed through the top, transparent contact. This device, with applications to head-up and displays employing n-type Si Driver Circuitry, has significantly higher power efficiency and lower drive voltage than undoped fluorescent inverted OLEDs. Efficient injection of both electrons and holes is made possible by controlled n- and p-doping of the transport layers with high doping levels. The light emitting region is protected from ITO sputtering damage by a 210 nm thick p-doped hole transport layer. The transparency of the device at the peak OLED emission wavelength of 510 nm is (80 ± 5)%.
Van-sang Nguyen - One of the best experts on this subject based on the ideXlab platform.
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gate Driver supply architectures for common mode conducted emi reduction in series connection of multiple power devices
IEEE Transactions on Power Electronics, 2018Co-Authors: Van-sang Nguyen, Pierre Lefranc, Jean-christophe CrébierAbstract:This paper presents a study on the gate Driver circuitries that need to be implemented to drive several power devices when associated in series connection. More specifically, the propagation paths of parasitic currents through the gate Driver circuitries, exited under high switching speeds, are studied in different configurations trying to minimize common mode currents generated. In a gate Driver Circuitry for a regular low side–high side switching cell configuration with one upper switch and one lower switch, the voltage transient dv/dt at the middle point applied across the primary-secondary parasitic capacitance of gate Driver supplies, and control signal isolation units are the reasons for the generation of conducted electromagnetic interference (EMI) perturbations. In complex power converters, multicell, multilevel, or even series connection of power devices, many Driver circuits are required and implemented. Similarly, in such converters, there are several dv/dt sources generated at different floating points producing conducted EMI perturbations from the power part to the control part through many gate Driver circuitries. Based on previous works, this paper analyzes the best configuration to minimize parasitic currents, especially reducing the conducted common mode currents in series connected transistors topologies. Simulations and practical results validate the analysis for two power devices in series connection, and then the extrapolations for more power devices in series connection, up to six are discussed and analyzed with the help of simulations results.
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Contributions to dedicated gate Driver Circuitry for very high switching speed high temperature power devices
2016Co-Authors: Van-sang Nguyen, Farshid Sarrafin_ardebili, Davy Colin, Nicolas Rouger, Pierre Lefranc, Yves Lembeye, Jean-daniel Arnould, Bruno Allard, Jean-christophe CrébierAbstract:Based on WBG power devices operating constraints, this paper analyses and presents developments and prototyping of dedicated high side control signal level shifters. Designs take into account temperature, propagation delay deviation and high dv/dt susceptibility to deliver a generic solution able to comply with new device constraints. If silicon technology remains today the unique reliable technical solution, the implementation of gate Driver in this technology is becoming very challenging. Delay deviations, signal integrity (duty cycle duration and time location) of prototypes are characterized with respect to temperature as well as dv/dt immunity.
Xiang Zhou - One of the best experts on this subject based on the ideXlab platform.
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a low drive voltage transparent metal free n i p electrophosphorescent light emitting diode
Organic Electronics, 2003Co-Authors: M Pfeiffer, Stephen R Forrest, Xiang ZhouAbstract:Abstract We demonstrate a transparent, inverted, electrophosphorescent n–i–p organic light emitting diode (OLED) exhibiting a luminance of 500 cd/m 2 at 3.1 V, and with a luminous power efficiency of 23 lm/W when light emitted from both top and bottom surfaces is summed. We find that 10% more light is emitted from the top surface; hence a power efficiency of 12 lm/W is obtained for a device viewed through the top, transparent contact. This device, with applications to head-up and displays employing n-type Si Driver Circuitry, has significantly higher power efficiency and lower drive voltage than undoped fluorescent inverted OLEDs. Efficient injection of both electrons and holes is made possible by controlled n- and p-doping of the transport layers with high doping levels. The light emitting region is protected from ITO sputtering damage by a 210 nm thick p-doped hole transport layer. The transparency of the device at the peak OLED emission wavelength of 510 nm is (80 ± 5)%.
Pierre Lefranc - One of the best experts on this subject based on the ideXlab platform.
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gate Driver supply architectures for common mode conducted emi reduction in series connection of multiple power devices
IEEE Transactions on Power Electronics, 2018Co-Authors: Van-sang Nguyen, Pierre Lefranc, Jean-christophe CrébierAbstract:This paper presents a study on the gate Driver circuitries that need to be implemented to drive several power devices when associated in series connection. More specifically, the propagation paths of parasitic currents through the gate Driver circuitries, exited under high switching speeds, are studied in different configurations trying to minimize common mode currents generated. In a gate Driver Circuitry for a regular low side–high side switching cell configuration with one upper switch and one lower switch, the voltage transient dv/dt at the middle point applied across the primary-secondary parasitic capacitance of gate Driver supplies, and control signal isolation units are the reasons for the generation of conducted electromagnetic interference (EMI) perturbations. In complex power converters, multicell, multilevel, or even series connection of power devices, many Driver circuits are required and implemented. Similarly, in such converters, there are several dv/dt sources generated at different floating points producing conducted EMI perturbations from the power part to the control part through many gate Driver circuitries. Based on previous works, this paper analyzes the best configuration to minimize parasitic currents, especially reducing the conducted common mode currents in series connected transistors topologies. Simulations and practical results validate the analysis for two power devices in series connection, and then the extrapolations for more power devices in series connection, up to six are discussed and analyzed with the help of simulations results.
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Contributions to dedicated gate Driver Circuitry for very high switching speed high temperature power devices
2016Co-Authors: Van-sang Nguyen, Farshid Sarrafin_ardebili, Davy Colin, Nicolas Rouger, Pierre Lefranc, Yves Lembeye, Jean-daniel Arnould, Bruno Allard, Jean-christophe CrébierAbstract:Based on WBG power devices operating constraints, this paper analyses and presents developments and prototyping of dedicated high side control signal level shifters. Designs take into account temperature, propagation delay deviation and high dv/dt susceptibility to deliver a generic solution able to comply with new device constraints. If silicon technology remains today the unique reliable technical solution, the implementation of gate Driver in this technology is becoming very challenging. Delay deviations, signal integrity (duty cycle duration and time location) of prototypes are characterized with respect to temperature as well as dv/dt immunity.
