The Experts below are selected from a list of 327 Experts worldwide ranked by ideXlab platform
Juin J. Liou - One of the best experts on this subject based on the ideXlab platform.
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Compact Thermal Failure Model for Devices Subject to Electrostatic Discharge Stresses
IEEE Transactions on Electron Devices, 2015Co-Authors: Yuanzhong Zhou, Meng Miao, Javier A. Salcedo, Jean-jacques Hajjar, Juin J. LiouAbstract:A leading cause of device failure under Electrostatic Discharge stress conditions is thermal failure. This failure occurs as a result of excessive energy dissipation which raises the temperature of the device to a critical breaking level. To predict such a physical failure at circuit level, a compact model compatible with circuit simulators is proposed. The model is derived from the fundamental heat transfer equations and is shown to accurately predict thermal failure for arbitrary electrical stress waveforms.
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APCCAS - Electrostatic Discharge (ESD) protection of RF integrated circuits
2012 IEEE Asia Pacific Conference on Circuits and Systems, 2012Co-Authors: Juin J. Liou, Chang Jiang, Feng ChiaAbstract:Electrostatic Discharge (ESD) induced failures continue to be a major reliability concern in the semiconductor industry. Such a concern will in fact be intensified as the CMOS technology is scaling toward the 22-nm and beyond. This paper covers the issues and challenges pertinent to the design of Electrostatic Discharge (ESD) protection solutions of CMOS-based RF integrated circuits.
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Challenges of Electrostatic Discharge (ESD) protection in silicon nanowire technology
2012 28th International Conference on Microelectronics Proceedings, 2012Co-Authors: Juin J. LiouAbstract:Electrostatic Discharge (ESD) induced failures continue to be a major reliability concern in the semiconductor industry. Such a concern will in fact be intensified as the CMOS technology is scaling toward the 22-nm and beyond. This paper covers the issues and challenges pertinent to the design of Electrostatic Discharge (ESD) protection solutions of modern and future integrated circuits, including the high-voltage, low-voltage, and emerging nanowire technologies.
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ASICON - Challenges of Electrostatic Discharge (ESD) protection in emerging silicon nanowire technology
2011 9th IEEE International Conference on ASIC, 2011Co-Authors: Juin J. Liou, Chang Jiang, Cao Guang-biao, Chang Gung, Feng ChiaAbstract:Electrostatic Discharge (ESD) induced failures continue to be a major reliability concern in the semiconductor industry. Such a concern will in fact be intensified as the CMOS technology is scaling toward the 22-nm and beyond. This paper covers the issues and challenges pertinent to the design of Electrostatic Discharge (ESD) protection solutions of the emerging and increasingly important Si nanowire technology.
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Study of Organic Thin-Film Transistors Under Electrostatic Discharge Stresses
IEEE Electron Device Letters, 2011Co-Authors: Juin J. Liou, Yoon-ha Jeong, Kazunori Kuribara, Kenjiro Fukuda, Tsuyoshi Sekitani, Takao Someya, J. Chung, Zhixin WangAbstract:Low-voltage pentacene-based organic thin-film transistors (OTFTs) are characterized for the first time under the Electrostatic Discharge (ESD) stresses. The measurements are conducted using the transmission line pulsing (TLP) tester which generates the human body model equivalent pulses. The ESD behaviors and tolerances of OTFTs having different dimensions and gate biasing conditions are investigated. OTFT's failure mechanism and dc performance degradation due to the ESD stresses are also studied.
Zhixin Wang - One of the best experts on this subject based on the ideXlab platform.
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Study of Organic Thin-Film Transistors Under Electrostatic Discharge Stresses
IEEE Electron Device Letters, 2011Co-Authors: Juin J. Liou, Yoon-ha Jeong, Kazunori Kuribara, Kenjiro Fukuda, Tsuyoshi Sekitani, Takao Someya, J. Chung, Zhixin WangAbstract:Low-voltage pentacene-based organic thin-film transistors (OTFTs) are characterized for the first time under the Electrostatic Discharge (ESD) stresses. The measurements are conducted using the transmission line pulsing (TLP) tester which generates the human body model equivalent pulses. The ESD behaviors and tolerances of OTFTs having different dimensions and gate biasing conditions are investigated. OTFT's failure mechanism and dc performance degradation due to the ESD stresses are also studied.
Yoon-ha Jeong - One of the best experts on this subject based on the ideXlab platform.
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Study of Organic Thin-Film Transistors Under Electrostatic Discharge Stresses
IEEE Electron Device Letters, 2011Co-Authors: Juin J. Liou, Yoon-ha Jeong, Kazunori Kuribara, Kenjiro Fukuda, Tsuyoshi Sekitani, Takao Someya, J. Chung, Zhixin WangAbstract:Low-voltage pentacene-based organic thin-film transistors (OTFTs) are characterized for the first time under the Electrostatic Discharge (ESD) stresses. The measurements are conducted using the transmission line pulsing (TLP) tester which generates the human body model equivalent pulses. The ESD behaviors and tolerances of OTFTs having different dimensions and gate biasing conditions are investigated. OTFT's failure mechanism and dc performance degradation due to the ESD stresses are also studied.
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Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors
IEEE Electron Device Letters, 2009Co-Authors: Juin J. Liou, Andy Chung, Yoon-ha Jeong, Wei-chen ChenAbstract:Electrostatic Discharge (ESD) performance of N-type double-gated Si nanowire (NW) thin-film transistors is investigated, for the first time, using the transmission line pulsing technique. The ESD robustness of these devices depends on the NW dimension, number of channels, plasma treatment, and layout topology. The failure currents, leakage currents, and on-state resistances are characterized, and possible ESD protection applications of these devices for future NW field-effect-transistor-based integrated circuits are also discussed.
Hiraku Miyasaka - One of the best experts on this subject based on the ideXlab platform.
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IAS - The Low Voltage Electrostatic Discharge on the Contacting Point
2009 IEEE Industry Applications Society Annual Meeting, 2009Co-Authors: Hiraku MiyasakaAbstract:A very low voltage Electrostatic Discharge phenol- menon is analyzed by using a small storage capacitor of 2.2 pF and a small relay. The contact Discharge current waveform is analyzed and equivalent parameters such as contact resistance, line inductance and total capacitance, are estimated. By changing the charging voltage of the capacitor, the contact Electrostatic Discharge is identified as gas-ionization Discharge and tunnel current Discharge, experimentally. The corrosion effect of the contact electrodes on the Electrostatic Discharge current and the optical emission are also examined.
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The Low Voltage Electrostatic Discharge on the Contacting Point
2009 IEEE Industry Applications Society Annual Meeting, 2009Co-Authors: Hiraku MiyasakaAbstract:A very low voltage Electrostatic Discharge phenol-menon is analyzed by using a small storage capacitor of 2.2 pF and a small relay. The contact Discharge current waveform is analyzed and equivalent parameters such as contact resistance, line inductance and total capacitance, are estimated. By changing the charging voltage of the capacitor, the contact Electrostatic Discharge is identified as gas-ionization Discharge and tunnel current Discharge, experimentally. The corrosion effect of the contact electrodes on the Electrostatic Discharge current and the optical emission are also examined.
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Basic Research on Low Voltage Electrostatic Discharge Phenomena
2008 IEEE Industry Applications Society Annual Meeting, 2008Co-Authors: Hiraku MiyasakaAbstract:Low voltage Electrostatic Discharge phenomena are experimentally examined through wet-type and dry type relays as high speed switch. If the condenser is charged less than 10 V, the Discharge resistance is small and damping is not so large. If the gap is exposed to air, the reproducibility decreases. At higher charging voltage more than 50 V, the reproducibility is well and serial resistance is pretty high which may be caused by the Discharge.
Sanjiv Sambandan - One of the best experts on this subject based on the ideXlab platform.
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Adaptive Dielectric Thin Film Transistors-A Self-Configuring Device for Low Power Electrostatic Discharge Protection
IEEE Electron Device Letters, 2020Co-Authors: Prasenjit Bhattacharya, Rajat Sinha, Bikash Kumar Thakur, Virendra Parab, Mayank Shrivastava, Sanjiv SambandanAbstract:Large area and flexible electronic systems are widely used in applications such as displays, image sensors, wearable electronics and energy harvesting systems. A key element in many of these systems is the Electrostatic Discharge protection circuit. The conventional protection circuit uses large aspect-ratio diode connected thin film transistors that offer a low resistance path to the surge current but also does the same to signals during normal system operation resulting in power loss. Here we describe as well as demonstrate the feasibility of a novel idea for Electrostatic Discharge protection involving an adaptive dielectric thin film transistor that self-configures itself to a low resistance state during an Electrostatic Discharge event and a high resistance state during normal operation without external control. This results in 1000-10000 times the power savings compared to diode connected TFTs.
