The Experts below are selected from a list of 300 Experts worldwide ranked by ideXlab platform

Mingjer Chen - One of the best experts on this subject based on the ideXlab platform.

  • a compact high speed miller capacitance based sample and hold circuit
    IEEE Transactions on Circuits and Systems I-regular Papers, 1998
    Co-Authors: Mingjer Chen, Jenyin Huang, Weichen Shen, Pochin Hsu
    Abstract:

    The existing Miller-capacitance-based sample-and-hold circuit has been simplified into a compact one, achieved by replacing the operational amplifier in the Miller feedback circuit with a simple CMOS inverter. As a result, the area consumption is greatly reduced while maintaining the original advantages of high switching speed and high sampling precision. The on-chip test circuitry for the proposed compact sample-and-hold has been fabricated and characterized. Experimental results have shown that for a short clock transition time down to equipment limit of 1.8 ns, the sampling Error becomes independent of the input over a small input Voltage range of 1 V. This range can be substantially expanded by lowering the clock transition time, moreover, another compact Miller-capacitance-based sample-and-hold circuit with a dummy transistor included has been implemented on-chip and has experimentally exhibited a sampling Error Voltage of less than 6 mV over an input Voltage range of 2.5 V. The spectrum behaviors of the compact circuits with and without a dummy transistor have been measured, showing an improvement on the quality of the circuit by increasing the clock frequency.

  • A new quantitative model for weak inversion charge injection in MOSFET analog switches
    IEEE Transactions on Electron Devices, 1996
    Co-Authors: Mingjer Chen
    Abstract:

    This paper proposes a new model concerning the channel charges in weak inversion injected from a turn-off MOSFET into a holding capacitor. This portion of charge injection has recently been newly observed, showing a significant contribution to the switch-induced Error Voltage on the switched capacitor. Our model is derived at the critical point where the device is operated in the transition region between strong inversion and weak inversion. This point has been expressed explicitly as a function of the DC input Voltage, the threshold Voltage, and the fall time of the gate Voltage. The ability of the model in accurately determining quantitatively the impact of the weak inversion charge injection on the Error Voltage has been extensively judged experimentally and by two-dimensional mixed-mode simulation for a wide variety of design parameters such as the channel width and length, the holding capacitance, the fall time of the gate Voltage, and the DC input Voltage The assumptions utilized in the model development have also been validated.

  • Weak inversion charge injection in analog MOS switches
    IEEE Journal of Solid-State Circuits, 1995
    Co-Authors: Mingjer Chen, Pochin Hsu, Tsung-hann Liu
    Abstract:

    The on-chip test circuit for examining the charge injection in analog MOS switches has been described in detail, and has been fabricated and characterized. Mixed-mode circuit and device simulations have been performed, creating excellent agreements not only with the experimental waveforms but also with the measured switch-induced Error Voltage. Further investigation of the experimental and simulated results has separated the charge injection into three distinct components: i) the channel charges in strong inversion; ii) the channel charges in weak inversion; and iii) the charges coupled through the gate-to-diffusion overlap capacitance. Important observations concerning the weak inversion charge injection have been drawn from the waveform of the current through the switched capacitor. In this work the channel charges in weak inversion have exhibited a 20% contribution to the switch-induced Error Voltage on a switched capacitor. >

Tsung-hann Liu - One of the best experts on this subject based on the ideXlab platform.

  • Weak inversion charge injection in analog MOS switches
    IEEE Journal of Solid-State Circuits, 1995
    Co-Authors: Mingjer Chen, Pochin Hsu, Tsung-hann Liu
    Abstract:

    The on-chip test circuit for examining the charge injection in analog MOS switches has been described in detail, and has been fabricated and characterized. Mixed-mode circuit and device simulations have been performed, creating excellent agreements not only with the experimental waveforms but also with the measured switch-induced Error Voltage. Further investigation of the experimental and simulated results has separated the charge injection into three distinct components: i) the channel charges in strong inversion; ii) the channel charges in weak inversion; and iii) the charges coupled through the gate-to-diffusion overlap capacitance. Important observations concerning the weak inversion charge injection have been drawn from the waveform of the current through the switched capacitor. In this work the channel charges in weak inversion have exhibited a 20% contribution to the switch-induced Error Voltage on a switched capacitor. >

Pochin Hsu - One of the best experts on this subject based on the ideXlab platform.

  • a compact high speed miller capacitance based sample and hold circuit
    IEEE Transactions on Circuits and Systems I-regular Papers, 1998
    Co-Authors: Mingjer Chen, Jenyin Huang, Weichen Shen, Pochin Hsu
    Abstract:

    The existing Miller-capacitance-based sample-and-hold circuit has been simplified into a compact one, achieved by replacing the operational amplifier in the Miller feedback circuit with a simple CMOS inverter. As a result, the area consumption is greatly reduced while maintaining the original advantages of high switching speed and high sampling precision. The on-chip test circuitry for the proposed compact sample-and-hold has been fabricated and characterized. Experimental results have shown that for a short clock transition time down to equipment limit of 1.8 ns, the sampling Error becomes independent of the input over a small input Voltage range of 1 V. This range can be substantially expanded by lowering the clock transition time, moreover, another compact Miller-capacitance-based sample-and-hold circuit with a dummy transistor included has been implemented on-chip and has experimentally exhibited a sampling Error Voltage of less than 6 mV over an input Voltage range of 2.5 V. The spectrum behaviors of the compact circuits with and without a dummy transistor have been measured, showing an improvement on the quality of the circuit by increasing the clock frequency.

  • Weak inversion charge injection in analog MOS switches
    IEEE Journal of Solid-State Circuits, 1995
    Co-Authors: Mingjer Chen, Pochin Hsu, Tsung-hann Liu
    Abstract:

    The on-chip test circuit for examining the charge injection in analog MOS switches has been described in detail, and has been fabricated and characterized. Mixed-mode circuit and device simulations have been performed, creating excellent agreements not only with the experimental waveforms but also with the measured switch-induced Error Voltage. Further investigation of the experimental and simulated results has separated the charge injection into three distinct components: i) the channel charges in strong inversion; ii) the channel charges in weak inversion; and iii) the charges coupled through the gate-to-diffusion overlap capacitance. Important observations concerning the weak inversion charge injection have been drawn from the waveform of the current through the switched capacitor. In this work the channel charges in weak inversion have exhibited a 20% contribution to the switch-induced Error Voltage on a switched capacitor. >

Dushan Boroyevich - One of the best experts on this subject based on the ideXlab platform.

  • on zero steady state Error Voltage control of single phase pwm inverters with different load types
    IEEE Transactions on Power Electronics, 2011
    Co-Authors: Dong Dong, T. Thacker, Rolando Burgos, Fei Wang, Dushan Boroyevich
    Abstract:

    This paper comprehensively investigates and compares different multiloop linear control schemes for single-phase pulsewidth modulation inverters, both in stationary and synchronous (d -q) frames, by focusing on their steady-state Error under different loading conditions. Specifically, it is shown how proportional plus resonant (P + R) control and load current feedback (LCF) control can, respectively, improve the steady-state and transient performance of the inverter, leading to the proposal of a PID + R + LCF control scheme. Furthermore, the LCF control and capacitive current feedback control schemes are shown to be subject to stability issues under second and higher order filter loads. Additionally, the equivalence between the stationary frame and d -q frame controllers is discussed depending on the orthogonal term generation method, and a d-q frame Voltage control strategy is proposed eliminating the need for the generation of this orthogonal component. This is achieved while retaining all the advantages of operating in the synchronous d-q frame, i.e., zero steady-state Error and ease of implementation. All theoretical findings are validated experimentally using a 1.5 kW laboratory prototype.

Nobukazu Takai - One of the best experts on this subject based on the ideXlab platform.

  • Single-Inductor Dual-Output DC-DC Converter Design with Exclusive Control
    Key Engineering Materials, 2015
    Co-Authors: Yasunori Kobori, Qiulin Zhu, Feng Zhao, Zachary Nosker, S. N. Mohyar, Haruo Kobayashi, Nobukazu Takai
    Abstract:

    This paper proposes a single inductor dual output (SIDO) DC-DC converter with an exclusive control circuit. We propose two kinds of converter: a buck-buck and a boost-boost converter. Multiple Voltage outputs are controlled exclusively, using Error Voltage feedback. This approach requires a few additional components (a switch, a diode and a comparator), but requires no current sensors and does not depend on the value of output Voltage or output current. We describe circuit topologies, operation principles and simulation results.

  • Single inductor dual output switching converter using exclusive control method
    4th International Conference on Power Engineering Energy and Electrical Drives, 2013
    Co-Authors: Yasunori Kobori, Feng Zhao, Zachary Nosker, S. N. Mohyar, Haruo Kobayashi, Nobukazu Takai, Takahiro Odaguchi
    Abstract:

    This paper proposes a single inductor dual output (SIDO) DC-DC Converter with exclusive control circuit. We propose two kinds of SIDO converter: a buck-buck and a boost-boost converter. We have simulated and experimented with exclusive control method. Dual Voltage outputs are controlled exclusively, using Error Voltage feedback. This approach requires no current sensors and does not depend on the value of output Voltage or output current. We describe circuit topologies, operation principles, simulation results and experimental results. Experimental self (load) regulation and cross regulation are 20mVpp in the buck-buck converter and 5mVpp in the boost-boost converter.

  • APCCAS - Single inductor dual output DC-DC converter design with exclusive control
    2012 IEEE Asia Pacific Conference on Circuits and Systems, 2012
    Co-Authors: Yasunori Kobori, Qiulin Zhu, Feng Zhao, Zachary Nosker, S. N. Mohyar, Masanori Onozawa, Haruo Kobayashi, Nobukazu Takai
    Abstract:

    This paper proposes a single inductor dual output (SIDO) DC-DC Converter with exclusive control circuit. We propose two kinds of converter: a buck-buck and a boost-boost converter. Multiple Voltage outputs are controlled exclusively, using Error Voltage feedback. This approach requires few additional components (a switch, a diode and a comparator), requires no current sensors and does not depend on the value of output Voltage or output current. We describe circuit topologies, operation principles and simulation results.