The Experts below are selected from a list of 12 Experts worldwide ranked by ideXlab platform

Alexei N Rudakov - One of the best experts on this subject based on the ideXlab platform.

  • rigid and Exception Vector bundles and sheaves on a fano variety
    1995
    Co-Authors: Alexei N Rudakov
    Abstract:

    Enormous progress was made in the last twenty years in studying the moduli of algebraic Vector bundles and sheaves. In the last ten years a considerable understanding was gained for a particular case of the moduli problem — for Vector bundles or sheaves with “zero dimensional moduli” or so-called rigid sheaves on a Fano variety and especially on a Del Pezzo surface. Our aim is to descibe results on the construction and properties of rigid sheaves on Fano varieties.

Li Bo - One of the best experts on this subject based on the ideXlab platform.

  • The Research and Application of Boot Code on ARM-Based S3C4510B
    Journal of Electron Devices, 2004
    Co-Authors: Wu Ping, Cao Xiao-lin, Li Bo
    Abstract:

    This paper researched the Exception handling mechanism of ARM core and the boot progress of S3C4510B in the EMBEST IDE environment. Analyzed the Exception Vector configuration, memory system configuration, stack initialization, code copy, application software in initialize process, and the specification of link file writing and defining on GNU. The S3C4510B boot code design uses GNU compiler is accomplished successfully and an application example is given at last.

Nobuyuki Yamasaki - One of the best experts on this subject based on the ideXlab platform.

  • Fast Interrupt Handling Scheme by Using Interrupt Wake-Up Mechanism
    2019 Seventh International Symposium on Computing and Networking Workshops (CANDARW), 2019
    Co-Authors: Ryo Wada, Nobuyuki Yamasaki
    Abstract:

    In recent years, embedded real-time systems have grown in complexity and are required to be able to handle both periodic and aperiodic tasks. When an external interrupt occurs via an I/O peripheral, the program counter jumps to the corresponding Exception Vector. This results in large overhead due to context switching. However, embedded real-time systems are required to execute tasks in real-time with high precision. The Responsive Multithreaded Processor (RMTP), a prioritized SMT CPU, consists of eight hardware contexts treated as eight logical processing cores and has various hardware mechanisms for fine-grained real-time processing on the order of 10 μs. One hardware mechanism implemented in RMTP is an interrupt wake-up mechanism that enables interrupt-triggered thread wake ups. When a thread is designated to be an interrupt handling thread, it starts execution one clock cycle after an interrupt occurs. In this paper, we design and implement a software mechanism which reduces the interrupt response time by using this mechanism and demonstrate the effectiveness of our proposed method by RTL simulations. Evaluation results show that our proposed method achieves high real-time performance by reducing the interrupt response time by up to 82% compared to the baseline.

Wu Ping - One of the best experts on this subject based on the ideXlab platform.

  • The Research and Application of Boot Code on ARM-Based S3C4510B
    Journal of Electron Devices, 2004
    Co-Authors: Wu Ping, Cao Xiao-lin, Li Bo
    Abstract:

    This paper researched the Exception handling mechanism of ARM core and the boot progress of S3C4510B in the EMBEST IDE environment. Analyzed the Exception Vector configuration, memory system configuration, stack initialization, code copy, application software in initialize process, and the specification of link file writing and defining on GNU. The S3C4510B boot code design uses GNU compiler is accomplished successfully and an application example is given at last.

Ryo Wada - One of the best experts on this subject based on the ideXlab platform.

  • Fast Interrupt Handling Scheme by Using Interrupt Wake-Up Mechanism
    2019 Seventh International Symposium on Computing and Networking Workshops (CANDARW), 2019
    Co-Authors: Ryo Wada, Nobuyuki Yamasaki
    Abstract:

    In recent years, embedded real-time systems have grown in complexity and are required to be able to handle both periodic and aperiodic tasks. When an external interrupt occurs via an I/O peripheral, the program counter jumps to the corresponding Exception Vector. This results in large overhead due to context switching. However, embedded real-time systems are required to execute tasks in real-time with high precision. The Responsive Multithreaded Processor (RMTP), a prioritized SMT CPU, consists of eight hardware contexts treated as eight logical processing cores and has various hardware mechanisms for fine-grained real-time processing on the order of 10 μs. One hardware mechanism implemented in RMTP is an interrupt wake-up mechanism that enables interrupt-triggered thread wake ups. When a thread is designated to be an interrupt handling thread, it starts execution one clock cycle after an interrupt occurs. In this paper, we design and implement a software mechanism which reduces the interrupt response time by using this mechanism and demonstrate the effectiveness of our proposed method by RTL simulations. Evaluation results show that our proposed method achieves high real-time performance by reducing the interrupt response time by up to 82% compared to the baseline.