The Experts below are selected from a list of 138 Experts worldwide ranked by ideXlab platform
Luca Benini - One of the best experts on this subject based on the ideXlab platform.
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always on 674uw 4gop s error resilient binary neural networks with aggressive sram voltage scaling on a 22nm iot end node
arXiv: Hardware Architecture, 2020Co-Authors: Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca BeniniAbstract:Binary Neural Networks (BNNs) have been shown to be robust to random bit-level noise, making aggressive voltage scaling attractive as a power-saving technique for both logic and SRAMs. In this work, we introduce the first fully programmable IoT end-node system-on-chip (SoC) capable of Executing Software-defined, hardware-accelerated BNNs at ultra-low voltage. Our SoC exploits a hybrid memory scheme where error-vulnerable SRAMs are complemented by reliable standard-cell memories to safely store critical data under aggressive voltage scaling. On a prototype in 22nm FDX technology, we demonstrate that both the logic and SRAM voltage can be dropped to 0.5Vwithout any accuracy penalty on a BNN trained for the CIFAR-10 dataset, improving energy efficiency by 2.2X w.r.t. nominal conditions. Furthermore, we show that the supply voltage can be dropped to 0.42V (50% of nominal) while keeping more than99% of the nominal accuracy (with a bit error rate ~1/1000). In this operating point, our prototype performs 4Gop/s (15.4Inference/s on the CIFAR-10 dataset) by computing up to 13binary ops per pJ, achieving 22.8 Inference/s/mW while keeping within a peak power envelope of 674uW - low enough to enable always-on operation in ultra-low power smart cameras, long-lifetime environmental sensors, and insect-sized pico-drones.
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always on 674μ w 4gop s error resilient binary neural networks with aggressive sram voltage scaling on a 22 nm iot end node
IEEE Transactions on Circuits and Systems, 2020Co-Authors: Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca BeniniAbstract:Binary Neural Networks (BNNs) have been shown to be robust to random bit-level noise, making aggressive voltage scaling attractive as a power-saving technique for both logic and SRAMs. In this work, we introduce the first fully programmable IoT end-node system-on-chip (SoC) capable of Executing Software-defined, hardware-accelerated BNNs at ultra-low voltage. Our SoC exploits a hybrid memory scheme where error-vulnerable SRAMs are complemented by reliable standard-cell memories to safely store critical data under aggressive voltage scaling. On a prototype in 22nm FDX technology, we demonstrate that both the logic and SRAM voltage can be dropped to 0.5V without any accuracy penalty on a BNN trained for the CIFAR-10 dataset, improving energy efficiency by 2.2X w.r.t. nominal conditions. Furthermore, we show that the supply voltage can be dropped to 0.42V (50% of nominal) while keeping more than 99% of the nominal accuracy (with a bit error rate ~1/1000). In this operating point, our prototype performs 4Gop/s (15.4 Inference/s on the CIFAR-10 dataset) by computing up to 13 binary ops per pJ, achieving 22.8 Inference/s/mW while keeping within a peak power envelope of 674uW – low enough to enable always-on operation in ultra-low power smart cameras, long-lifetime environmental sensors, and insect-sized pico-drones.
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system level power optimization techniques and tools
International Symposium on Low Power Electronics and Design, 1999Co-Authors: Luca Benini, G De MicheliAbstract:This tutorial presents a cohesive view of power-conscious system-level design. We consider systems as consisting of a hardware platform Executing Software programs. We address the problems of power estimation and minimization for such systems. We consider the major constituents of systems: processors, memories and communication resources. We analyze power dissipation in these components and we survey computer-aided power reduction techniques. We also consider global system-level control schemes, such as dynamic power management. We conclude by pointing out further research problems which are still open in this domain.
Niklas Lindén - One of the best experts on this subject based on the ideXlab platform.
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Preventing Privacy-Invasive Software using Online Reputations
2008Co-Authors: Martin Boldt, Bengt Carlsson, Tobias Larsson, Niklas LindénAbstract:Privacy-invasive Software, loosely labeled spyware, is an increasingly common problem for today’s computer users, one to which there is no absolute cure. Most of the privacy-invasive Software are positioned in a legal gray zone, as the user accepts the malicious behaviour when agreeing to the End User License Agreement. This paper proposes the use of a specialized reputation system to gather and share information regarding Software behaviour between community users. A client application helps guide the user at the point of Executing Software on the local computer, displaying other users’ feedback about the expected behaviour of the Software. We discuss important aspects to consider when constructing such a system, and propose possible solutions. Based on the observations made, we implemented a client/server based proof-of-concept tool, which allowed us to demonstrate how such a system would work. We also compare this solution to other, more conventional, protection methods such as anti-virus and anti-spyware Software.
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Blocking Privacy-Invasive Software Using a Specialized Reputation System
2007Co-Authors: Tobias Larsson, Niklas LindénAbstract:Privacy-invasive Software is an increasingly common problem for today's computer users, one to which there is no absolute cure. Most of the privacy-invasive Software are positioned in a legal gray zone, as the user accepts the malicious behaviour when agreeing to the End User License Agreement. This thesis proposes the use of a specialized reputation system to gather and share information regarding Software behaviour between community users. A client application helps guide the user at the point of Executing Software on the local computer, displaying other users' feedback about the expected behaviour of the Software. We discuss important aspects to consider when constructing such a system, and propose possible solutions. Based on the observations made, we implemented a client/server based proof-of-concept tool, which helped us discover other issues such as the effect on system stability. We also compare this solution to other, more conventional, protection methods such as anti-virus and anti-spyware Software.
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Secure Data Management - Preventing privacy-invasive Software using collaborative reputation systems
Lecture Notes in Computer Science, 1Co-Authors: Martin Boldt, Bengt Carlsson, Tobias Larsson, Niklas LindénAbstract:Privacy-invasive Software, loosely labelled spyware, is an increasingly common problem for today's computer users, one to which there is no absolute cure. Most privacy-invasive Software is positioned in a legal grey zone, as the user accepts the malicious behaviour when agreeing to the End User License Agreement. This paper proposes the use of a specialized reputation system to gather and share information regarding Software behaviour between community users. A client application helps guide the user at the point of Executing Software on the local computer, displaying other users' feedback about the expected behaviour of the Software. We discuss important aspects to consider when constructing such a system, and propose possible solutions. Based on the observations made, we implemented a client/server based proof-of-concept tool, which allowed us to demonstrate how such a system would work. We also compare this solution to other, more conventional, protection methods such as anti-virus and anti-spyware Software.
Clifford A Shaffer - One of the best experts on this subject based on the ideXlab platform.
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quantifying incremental development practices and their relationship to procrastination
International Computing Education Research Workshop, 2017Co-Authors: Ayaan M Kazerouni, Stephen H Edwards, Clifford A ShafferAbstract:We present quantitative analyses performed on character-level program edit and execution data, collected in a junior-level data structures and algorithms course. The goal of this research is to determine whether proposed measures of student behaviors such as incremental development and procrastination during their program development process are significantly related to the correctness of final solutions, the time when work is completed, or the total time spent working on a solution. A dataset of 6.3 million fine-grained events collected from each student's local Eclipse environment is analyzed, including the edits made and events such as running the program or Executing Software tests. We examine four primary metrics proposed as part of previous work, and also examine variants and refinements that may be more effective. We quantify behaviors such as working early and often, frequency of program and test executions, and incremental writing of Software tests. Projects where the author had an earlier mean time of edits were more likely to submit their projects earlier and to earn higher scores for correctness. Similarly earlier median time of edits to Software tests was also associated with higher correctness scores. No significant relationships were found with incremental test writing or incremental checking of work using either interactive program launches or running of Software tests, contrary to expectations. A preliminary prediction model with 69% accuracy suggests that the underlying metrics may support early prediction of student success on projects. Such metrics also can be used to give targeted feedback to help students improve their development practices.
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ICER - Quantifying Incremental Development Practices and Their Relationship to Procrastination
Proceedings of the 2017 ACM Conference on International Computing Education Research, 2017Co-Authors: Ayaan M Kazerouni, Stephen H Edwards, Clifford A ShafferAbstract:We present quantitative analyses performed on character-level program edit and execution data, collected in a junior-level data structures and algorithms course. The goal of this research is to determine whether proposed measures of student behaviors such as incremental development and procrastination during their program development process are significantly related to the correctness of final solutions, the time when work is completed, or the total time spent working on a solution. A dataset of 6.3 million fine-grained events collected from each student's local Eclipse environment is analyzed, including the edits made and events such as running the program or Executing Software tests. We examine four primary metrics proposed as part of previous work, and also examine variants and refinements that may be more effective. We quantify behaviors such as working early and often, frequency of program and test executions, and incremental writing of Software tests. Projects where the author had an earlier mean time of edits were more likely to submit their projects earlier and to earn higher scores for correctness. Similarly earlier median time of edits to Software tests was also associated with higher correctness scores. No significant relationships were found with incremental test writing or incremental checking of work using either interactive program launches or running of Software tests, contrary to expectations. A preliminary prediction model with 69% accuracy suggests that the underlying metrics may support early prediction of student success on projects. Such metrics also can be used to give targeted feedback to help students improve their development practices.
Alfio Di Mauro - One of the best experts on this subject based on the ideXlab platform.
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always on 674μ w 4gop s error resilient binary neural networks with aggressive sram voltage scaling on a 22 nm iot end node
IEEE Transactions on Circuits and Systems, 2020Co-Authors: Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca BeniniAbstract:Binary Neural Networks (BNNs) have been shown to be robust to random bit-level noise, making aggressive voltage scaling attractive as a power-saving technique for both logic and SRAMs. In this work, we introduce the first fully programmable IoT end-node system-on-chip (SoC) capable of Executing Software-defined, hardware-accelerated BNNs at ultra-low voltage. Our SoC exploits a hybrid memory scheme where error-vulnerable SRAMs are complemented by reliable standard-cell memories to safely store critical data under aggressive voltage scaling. On a prototype in 22nm FDX technology, we demonstrate that both the logic and SRAM voltage can be dropped to 0.5V without any accuracy penalty on a BNN trained for the CIFAR-10 dataset, improving energy efficiency by 2.2X w.r.t. nominal conditions. Furthermore, we show that the supply voltage can be dropped to 0.42V (50% of nominal) while keeping more than 99% of the nominal accuracy (with a bit error rate ~1/1000). In this operating point, our prototype performs 4Gop/s (15.4 Inference/s on the CIFAR-10 dataset) by computing up to 13 binary ops per pJ, achieving 22.8 Inference/s/mW while keeping within a peak power envelope of 674uW – low enough to enable always-on operation in ultra-low power smart cameras, long-lifetime environmental sensors, and insect-sized pico-drones.
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always on 674uw 4gop s error resilient binary neural networks with aggressive sram voltage scaling on a 22nm iot end node
arXiv: Hardware Architecture, 2020Co-Authors: Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca BeniniAbstract:Binary Neural Networks (BNNs) have been shown to be robust to random bit-level noise, making aggressive voltage scaling attractive as a power-saving technique for both logic and SRAMs. In this work, we introduce the first fully programmable IoT end-node system-on-chip (SoC) capable of Executing Software-defined, hardware-accelerated BNNs at ultra-low voltage. Our SoC exploits a hybrid memory scheme where error-vulnerable SRAMs are complemented by reliable standard-cell memories to safely store critical data under aggressive voltage scaling. On a prototype in 22nm FDX technology, we demonstrate that both the logic and SRAM voltage can be dropped to 0.5Vwithout any accuracy penalty on a BNN trained for the CIFAR-10 dataset, improving energy efficiency by 2.2X w.r.t. nominal conditions. Furthermore, we show that the supply voltage can be dropped to 0.42V (50% of nominal) while keeping more than99% of the nominal accuracy (with a bit error rate ~1/1000). In this operating point, our prototype performs 4Gop/s (15.4Inference/s on the CIFAR-10 dataset) by computing up to 13binary ops per pJ, achieving 22.8 Inference/s/mW while keeping within a peak power envelope of 674uW - low enough to enable always-on operation in ultra-low power smart cameras, long-lifetime environmental sensors, and insect-sized pico-drones.
Ayaan M Kazerouni - One of the best experts on this subject based on the ideXlab platform.
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quantifying incremental development practices and their relationship to procrastination
International Computing Education Research Workshop, 2017Co-Authors: Ayaan M Kazerouni, Stephen H Edwards, Clifford A ShafferAbstract:We present quantitative analyses performed on character-level program edit and execution data, collected in a junior-level data structures and algorithms course. The goal of this research is to determine whether proposed measures of student behaviors such as incremental development and procrastination during their program development process are significantly related to the correctness of final solutions, the time when work is completed, or the total time spent working on a solution. A dataset of 6.3 million fine-grained events collected from each student's local Eclipse environment is analyzed, including the edits made and events such as running the program or Executing Software tests. We examine four primary metrics proposed as part of previous work, and also examine variants and refinements that may be more effective. We quantify behaviors such as working early and often, frequency of program and test executions, and incremental writing of Software tests. Projects where the author had an earlier mean time of edits were more likely to submit their projects earlier and to earn higher scores for correctness. Similarly earlier median time of edits to Software tests was also associated with higher correctness scores. No significant relationships were found with incremental test writing or incremental checking of work using either interactive program launches or running of Software tests, contrary to expectations. A preliminary prediction model with 69% accuracy suggests that the underlying metrics may support early prediction of student success on projects. Such metrics also can be used to give targeted feedback to help students improve their development practices.
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ICER - Quantifying Incremental Development Practices and Their Relationship to Procrastination
Proceedings of the 2017 ACM Conference on International Computing Education Research, 2017Co-Authors: Ayaan M Kazerouni, Stephen H Edwards, Clifford A ShafferAbstract:We present quantitative analyses performed on character-level program edit and execution data, collected in a junior-level data structures and algorithms course. The goal of this research is to determine whether proposed measures of student behaviors such as incremental development and procrastination during their program development process are significantly related to the correctness of final solutions, the time when work is completed, or the total time spent working on a solution. A dataset of 6.3 million fine-grained events collected from each student's local Eclipse environment is analyzed, including the edits made and events such as running the program or Executing Software tests. We examine four primary metrics proposed as part of previous work, and also examine variants and refinements that may be more effective. We quantify behaviors such as working early and often, frequency of program and test executions, and incremental writing of Software tests. Projects where the author had an earlier mean time of edits were more likely to submit their projects earlier and to earn higher scores for correctness. Similarly earlier median time of edits to Software tests was also associated with higher correctness scores. No significant relationships were found with incremental test writing or incremental checking of work using either interactive program launches or running of Software tests, contrary to expectations. A preliminary prediction model with 69% accuracy suggests that the underlying metrics may support early prediction of student success on projects. Such metrics also can be used to give targeted feedback to help students improve their development practices.