The Experts below are selected from a list of 76548 Experts worldwide ranked by ideXlab platform

Mohammed, Waleed S. - One of the best experts on this subject based on the ideXlab platform.

  • Plastic optical fibre sensor system design using the field programmable Gate Array
    InTech, 2018
    Co-Authors: Ong, Yong Sheng, Ia Grou, Lewis Elfed, Mohammed, Waleed S.
    Abstract:

    Extrinsic optical fibre sensor (OFS) systems use a fibre optic cable as the medium for signal propagation between the sensor and the sensor electronics using light rather than electrical signals. A range of different optical fibre sensors have been developed and electronic hardware system designs interfacing the sensor with external electronic systems devised. In this chapter, the use of the field programmable Gate Array (FPGA) is considered to implement the circuit functions that are required within a portable optical fibre sensor system that uses a light emitting diode (LED) as the light source, a photodiode as the light receiver and the FPGA to implement the system control, digital signal processing (DSP) and communications operations. The capabilities of the FPGA will be investiGated and a case study sensor design introduced and elaborated. The OFS system will be based on the FPGA and will provide wireless communications to an external supervisory system. The chapter will commence with an overview of OFS systems and the typical architecture of the system. Then the FPGA will be introduced and discussed as a hardware alternative to a software programmed processor that is currently widely used. A case study will then be presented with a discussion into design considerations

  • Plastic optical fibre sensor system design using the field programmable Gate Array
    InTech, 2018
    Co-Authors: Ong, Yong Sheng, Ia Grou, Lewis Elfed, Mohammed, Waleed S.
    Abstract:

    peer-reviewedExtrinsic optical fibre sensor (OFS) systems use a fibre optic cable as the medium for signal propagation between the sensor and the sensor electronics using light rather than electrical signals. A range of different optical fibre sensors have been developed and electronic hardware system designs interfacing the sensor with external electronic systems devised. In this chapter, the use of the field programmable Gate Array (FPGA) is considered to implement the circuit functions that are required within a portable optical fibre sensor system that uses a light emitting diode (LED) as the light source, a photodiode as the light receiver and the FPGA to implement the system control, digital signal processing (DSP) and communications operations. The capabilities of the FPGA will be investiGated and a case study sensor design introduced and elaborated. The OFS system will be based on the FPGA and will provide wireless communications to an external supervisory system. The chapter will commence with an overview of OFS systems and the typical architecture of the system. Then the FPGA will be introduced and discussed as a hardware alternative to a software programmed processor that is currently widely used. A case study will then be presented with a discussion into design considerations

Rene De Jesus Romerotroncoso - One of the best experts on this subject based on the ideXlab platform.

  • a field programmable Gate Array based reconfigurable smart sensor network for wireless monitoring of new generation computer numerically controlled machines
    Sensors, 2010
    Co-Authors: Sandra Veronica Morenotapia, Luis Alberto Verasalas, Roque Alfredo Osorniorios, Aurelio Dominguezgonzalez, Ion Stiharu, Rene De Jesus Romerotroncoso
    Abstract:

    Computer numerically controlled (CNC) machines have evolved to adapt to increasing technological and industrial requirements. To cover these needs, new generation machines have to perform monitoring strategies by incorporating multiple sensors. Since in most of applications the online Processing of the variables is essential, the use of smart sensors is necessary. The contribution of this work is the development of a wireless network platform of reconfigurable smart sensors for CNC machine applications complying with the measurement requirements of new generation CNC machines. Four different smart sensors are put under test in the network and their corresponding signal processing techniques are implemented in a Field Programmable Gate Array (FPGA)-based sensor node.

Jennifer L Brady - One of the best experts on this subject based on the ideXlab platform.

  • Limitations of a True Random Number Generator in a Field Programmable Gate Array
    2012
    Co-Authors: Jennifer L Brady
    Abstract:

    Abstract : Random number generators are used in many areas of engineering, computer science, most notably in simulations and cryptographic applications. Only a true random number generator is secure because the output bits are non-repeating and non-reproducible. A true random number generator on a field programmable Gate Array allows the generator on chip reducing the possibility of a breach in security. An oscillator sampling technique is an effective TRNG in a Xilinx FPGA. This research examines how the differences in period of the oscillators, the size of the jitter zone, and sampling on the rising and falling edge of the oscillator rather than just the rising edge affects the TRNG. The proportion of the size of the jitter zone compared to the period difference between the two oscillators limits the performance. As the jitter zone gets larger, the proportion of the jitter zone to the difference in periods of the oscillators must increase for the output to remain random. Sampling on the rising and falling edge instead of only the rising was not effective. The output was random for only a jitter zone of 24 ps with a period difference of 50 ps and 100 ps.

Chao Xu - One of the best experts on this subject based on the ideXlab platform.

  • theory and implementation of a very high throughput true random number generator in field programmable Gate Array
    Review of Scientific Instruments, 2016
    Co-Authors: Yonggang Wang, Chao Xu
    Abstract:

    The contribution of this paper is proposing a new entropy extraction mechanism based on sampling phase jitter in ring oscillators to make a high throughput true random number generator in a field programmable Gate Array (FPGA) practical. Starting from experimental observation and analysis of the entropy source in FPGA, a multi-phase sampling method is exploited to harvest the clock jitter with a maximum entropy and fast sampling speed. This parametrized design is implemented in a Xilinx Artix-7 FPGA, where the carry chains in the FPGA are explored to realize the precise phase shifting. The generator circuit is simple and resource-saving, so that multiple generation channels can run in parallel to scale the output throughput for specific applications. The prototype integrates 64 circuit units in the FPGA to provide a total output throughput of 7.68 Gbps, which meets the requirement of current high-speed quantum key distribution systems. The randomness evaluation, as well as its robustness to ambient temperature, confirms that the new method in a purely digital fashion can provide high-speed high-quality random bit sequences for a variety of embedded applications.

D R Martinez - One of the best experts on this subject based on the ideXlab platform.

  • field programmable Gate Array based radar front end digital signal processing
    Field-Programmable Custom Computing Machines, 1999
    Co-Authors: T J Moeller, D R Martinez
    Abstract:

    As Field programmable Gate Array (FPGA) technology has steadily improved, FPGAs are now viable alternatives to other technology implementations for high-speed classes of digital signal processing (DSP) applications. In particular, radar front-end signal processing, an application formerly dominated by custom very large scale integration (VLSI) chips, may now be a prime candidate for migration to FPCA technology. As this paper demonstrates, current FPGA devices have the power and capacity to implement a FIR filter with the performance and specifications of an existing, in-system, front-end signal processing custom VLSI chip. A 512-tap, 18-bit FIR filter was built that could achieve sample rates of 5 MHz (with a clock rate of at least 40 MHz) using Xilinx Virtex FPGA technology, and was demonstrated through simulation. Distributed arithmetic was determined to be the most optimal structure for a FPGA FIR design, although future research may show that fast FIR algorithms or filtering in the frequency domain might give better results.