Finite Field

14,000,000 Leading Edge Experts on the ideXlab platform

Scan Science and Technology

Contact Leading Edge Experts & Companies

Scan Science and Technology

Contact Leading Edge Experts & Companies

The Experts below are selected from a list of 424383 Experts worldwide ranked by ideXlab platform

Majid Ahmadi - One of the best experts on this subject based on the ideXlab platform.

  • a fully serial in parallel out digit level Finite Field multiplier in mathbb f _ 2 m using redundant representation
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2017
    Co-Authors: Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
    Abstract:

    Redundant basis (RB) is one of the appealing representation systems for Finite Field arithmetic due to its specific features in providing cost-free squaring operation in hardware implementation and because it eliminates the need for modular reduction. In this brief, a new architecture for digit-level Finite Field multiplication in $\mathbb {F}_{2^{m}}$ using redundant representation is proposed. Contrary to previously presented redundant basis multipliers, in the proposed architecture one digit of each operand is concurrently fed into the multiplier at each clock cycle which, in turn, reduces the total number of the clock cycles required in the multiplication process. To draw an accurate comparison, the proposed multiplier together with several existing digit-level RB multipliers were fully implemented in 65-nm CMOS technology.

  • an efficient Finite Field multiplier using redundant representation
    ACM Transactions in Embedded Computing Systems, 2012
    Co-Authors: Ashkan Hosseinzadeh Namin, Majid Ahmadi
    Abstract:

    An efficient word-level Finite Field multiplier using redundant representation is proposed. The proposed multiplier has a significantly higher speed, compared to previously proposed word-level architectures using either redundant representation or optimal normal basis type I, at the expense of moderately higher area complexity. Furthermore, the new design out-performs other similar proposals when considering the product of area and delay as a measure of performance. ASIC Realization of the proposed design using TSMC’s .18 um CMOS technology for the binary Field size of 163 is also presented.

  • high speed hardware implementation of a serial in parallel out Finite Field multiplier using reordered normal basis
    Iet Circuits Devices & Systems, 2010
    Co-Authors: Ashkan Hosseinzadeh Namin, Roberto Muscedere, Karl Leboeuf, Majid Ahmadi
    Abstract:

    A high-speed VLSI implementation of a 233-bit serial-in parallel-out Finite Field multiplier is presented. The proposed design performs multiplication using a reordered normal basis; a permutation of a type II optimal normal basis. The multiplier was realised in a 0.18-?m CMOS technology using multiples of a domino logic block. The multiplier was simulated, and functioned correctly up to a clock rate of 1.587 ?GHz, achieving greater performance while occupying less area compared to similar designs. The presented design methodology can also be used for other Finite Field multipliers possessing regular architectures. This multiplier?s size of 233 bits is currently recommended by the National Institute of Standards and Technology (NIST) in their elliptic curve digital signature standard (ECDSS), and is used in practice for binary Field multiplication in Elliptic Curve Cryptography (ECC).

  • high speed vlsi implementation of a Finite Field multiplier using redundant representation
    European Conference on Circuit Theory and Design, 2009
    Co-Authors: Ashkan Hosseinzadeh Namin, Roberto Muscedere, Karl Leboeuf, Majid Ahmadi
    Abstract:

    A new VLSI implementation for a 197-bit Finite Field multiplier using redundant representation is presented. The proposed design uses a simple module designed in domino logic as the main building block for the multiplier. We have used .18/Ltm CMOS technology from TSMC for our design. The final multiplier design was successfully simulated at a clock rate of 1.82 GHz. The proposed multiplier is at least 190% more efficient compared to similar designs, considering the product of area and delay as a measure of performance. Large Field size Finite Field multipliers which operate at high speeds, such as the proposed design, have applications in public key cryptography.

Sergei V Fedorenko - One of the best experts on this subject based on the ideXlab platform.

Mark Lewko - One of the best experts on this subject based on the ideXlab platform.

  • Finite Field restriction estimates for the paraboloid in high even dimensions
    Journal of Functional Analysis, 2020
    Co-Authors: Alex Iosevich, Doowon Koh, Mark Lewko
    Abstract:

    Abstract We prove that the Finite Field Fourier extension operator for the paraboloid is bounded from L 2 → L r for r ≥ 2 d + 4 d in even dimensions d ≥ 8 , which is the optimal L 2 estimate. For d = 6 we obtain the optimal range r > 2 d + 4 d = 8 / 3 , apart from the endpoint. For d = 4 we improve the prior range of r > 16 / 5 = 3.2 to r ≥ 28 / 9 = 3.111 … , compared to the conjectured range of r ≥ 3 . The key new ingredient is improved additive energy estimates for subsets of the paraboloid.

  • Finite Field restriction estimates for the paraboloid in high even dimensions
    arXiv: Classical Analysis and ODEs, 2017
    Co-Authors: Alex Iosevich, Doowon Koh, Mark Lewko
    Abstract:

    We prove that the Finite Field Fourier extension operator for the paraboloid is bounded from $L^2\to L^r$ for $r\geq \frac{2d+4}{d}$ in even dimensions $d\ge 8$, which is the optimal $L^2$ estimate. For $d=6$ we obtain the optimal range $r> \frac{2d+4}{d}=8/3$, apart from the endpoint. For $d=4$ we improve the prior range of $r>16/5=3.2$ to $r\geq 28/9=3.111\ldots$, compared to the conjectured range of $r\geq3$. The key new ingredient is improved additive energy estimates for subsets of the paraboloid.

Scott A. Vanstone - One of the best experts on this subject based on the ideXlab platform.

  • Reducing Elliptic Curve Logarithms to Logarithms in a Finite Field
    IEEE Transactions on Information Theory, 1993
    Co-Authors: Alfred J. Menezes, Tatsuaki Okamoto, Scott A. Vanstone
    Abstract:

    Elliptic curve cryptosystems have the potential to provide relatively small block size, high-security public key schemes that can be efficiently implemented. As with other known public key schemes, such as RSA and discrete exponentiation in a Finite Field, some care must be exercised when selecting the parameters involved, in this case the elliptic curve and the underlying Field. Specific classes of curves that give little or no advantage over previously known schemes are discussed. The main result of the paper is to demonstrate the reduction of the elliptic curve logarithm problem to the logarithm problem in the multiplicative group of an extension of the underlying Finite Field. For the class of supersingular elliptic curves, the reduction takes probabilistic polynomial time, thus providing a probabilistic subexponential time algorithm for the former problem

Adam Doliwa - One of the best experts on this subject based on the ideXlab platform.