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J. Chu  One of the best experts on this subject based on the ideXlab platform.

Optimal Realizations of floatingpoint implemented digital controllers with finite word length considerations
International Journal of Control, 2004CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finite word length (FWL) Realizations is investigated for digital controllers implemented in floatingpoint arithmetic. Unlike the existing methods which only address the effect of the mantissa bits in floatingpoint implementation to the sensitivity of closedloop stability, the sensitivity of closedloop stability is analysed with respect to both the mantissa and exponent bits of floatingpoint implementation. A computationally tractable FWL closedloop stability measure is then defined, and the method of computing the value of this measure is given. The optimal controller Realization problem is posed as searching for a floatingpoint Realization that maximizes the proposed FWL closedloop stability measure, and a numerical optimization technique is adopted to solve for the resulting optimization problem. Simulation results show that the proposed design procedure yields computationally efficient controller Realizations with enhanced FWL closedloop stability performance.

A unified closedloop stability measure for finiteprecision digital controller Realizations implemented in different representation schemes
IEEE Transactions on Automatic Control, 2003CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finiteprecision Realizations is investigated for digital controllers implemented in three different arithmetic formats, namely fixedpoint, floatingpoint and blockfloatingpoint schemes. It is shown that the controller coefficient perturbations resulting from using different finite word length (FWL) representation schemes possess quite different properties. A unified FWL closedloop stability measure is derived which is applicable to all the three arithmetic schemes. Unlike the existing works which only take into account the precision of a representation scheme with an assumption of an unlimited dynamic range, both the dynamic range and precision of an arithmetic scheme are considered in this new unified measure. To facilitate the design of optimal finiteprecision controller Realizations, a computationally tractable FWL closedloop stability measure is then introduced and the method of computing the value of this measure for a given controller Realization is given. For each arithmetic scheme, the optimal controller Realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach is adopted to solve for the resulting optimal Realization problem. The proposed design procedure provides a unified framework for true optimal controller implementation that requires a minimum bit length with maximum robustness to the FWL effect. Numerical examples are used to illustrate the design procedure and to compare the optimal controller Realizations in different representation schemes.
Jie Wu  One of the best experts on this subject based on the ideXlab platform.

Optimal Realizations of floatingpoint implemented digital controllers with finite word length considerations
International Journal of Control, 2004CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finite word length (FWL) Realizations is investigated for digital controllers implemented in floatingpoint arithmetic. Unlike the existing methods which only address the effect of the mantissa bits in floatingpoint implementation to the sensitivity of closedloop stability, the sensitivity of closedloop stability is analysed with respect to both the mantissa and exponent bits of floatingpoint implementation. A computationally tractable FWL closedloop stability measure is then defined, and the method of computing the value of this measure is given. The optimal controller Realization problem is posed as searching for a floatingpoint Realization that maximizes the proposed FWL closedloop stability measure, and a numerical optimization technique is adopted to solve for the resulting optimization problem. Simulation results show that the proposed design procedure yields computationally efficient controller Realizations with enhanced FWL closedloop stability performance.

A unified closedloop stability measure for finiteprecision digital controller Realizations implemented in different representation schemes
IEEE Transactions on Automatic Control, 2003CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finiteprecision Realizations is investigated for digital controllers implemented in three different arithmetic formats, namely fixedpoint, floatingpoint and blockfloatingpoint schemes. It is shown that the controller coefficient perturbations resulting from using different finite word length (FWL) representation schemes possess quite different properties. A unified FWL closedloop stability measure is derived which is applicable to all the three arithmetic schemes. Unlike the existing works which only take into account the precision of a representation scheme with an assumption of an unlimited dynamic range, both the dynamic range and precision of an arithmetic scheme are considered in this new unified measure. To facilitate the design of optimal finiteprecision controller Realizations, a computationally tractable FWL closedloop stability measure is then introduced and the method of computing the value of this measure for a given controller Realization is given. For each arithmetic scheme, the optimal controller Realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach is adopted to solve for the resulting optimal Realization problem. The proposed design procedure provides a unified framework for true optimal controller implementation that requires a minimum bit length with maximum robustness to the FWL effect. Numerical examples are used to illustrate the design procedure and to compare the optimal controller Realizations in different representation schemes.
Shunzhong Chen  One of the best experts on this subject based on the ideXlab platform.

Optimal Realizations of floatingpoint implemented digital controllers with finite word length considerations
International Journal of Control, 2004CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finite word length (FWL) Realizations is investigated for digital controllers implemented in floatingpoint arithmetic. Unlike the existing methods which only address the effect of the mantissa bits in floatingpoint implementation to the sensitivity of closedloop stability, the sensitivity of closedloop stability is analysed with respect to both the mantissa and exponent bits of floatingpoint implementation. A computationally tractable FWL closedloop stability measure is then defined, and the method of computing the value of this measure is given. The optimal controller Realization problem is posed as searching for a floatingpoint Realization that maximizes the proposed FWL closedloop stability measure, and a numerical optimization technique is adopted to solve for the resulting optimization problem. Simulation results show that the proposed design procedure yields computationally efficient controller Realizations with enhanced FWL closedloop stability performance.

A unified closedloop stability measure for finiteprecision digital controller Realizations implemented in different representation schemes
IEEE Transactions on Automatic Control, 2003CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finiteprecision Realizations is investigated for digital controllers implemented in three different arithmetic formats, namely fixedpoint, floatingpoint and blockfloatingpoint schemes. It is shown that the controller coefficient perturbations resulting from using different finite word length (FWL) representation schemes possess quite different properties. A unified FWL closedloop stability measure is derived which is applicable to all the three arithmetic schemes. Unlike the existing works which only take into account the precision of a representation scheme with an assumption of an unlimited dynamic range, both the dynamic range and precision of an arithmetic scheme are considered in this new unified measure. To facilitate the design of optimal finiteprecision controller Realizations, a computationally tractable FWL closedloop stability measure is then introduced and the method of computing the value of this measure for a given controller Realization is given. For each arithmetic scheme, the optimal controller Realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach is adopted to solve for the resulting optimal Realization problem. The proposed design procedure provides a unified framework for true optimal controller implementation that requires a minimum bit length with maximum robustness to the FWL effect. Numerical examples are used to illustrate the design procedure and to compare the optimal controller Realizations in different representation schemes.
James F. Whidborne  One of the best experts on this subject based on the ideXlab platform.

Optimal Realizations of floatingpoint implemented digital controllers with finite word length considerations
International Journal of Control, 2004CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finite word length (FWL) Realizations is investigated for digital controllers implemented in floatingpoint arithmetic. Unlike the existing methods which only address the effect of the mantissa bits in floatingpoint implementation to the sensitivity of closedloop stability, the sensitivity of closedloop stability is analysed with respect to both the mantissa and exponent bits of floatingpoint implementation. A computationally tractable FWL closedloop stability measure is then defined, and the method of computing the value of this measure is given. The optimal controller Realization problem is posed as searching for a floatingpoint Realization that maximizes the proposed FWL closedloop stability measure, and a numerical optimization technique is adopted to solve for the resulting optimization problem. Simulation results show that the proposed design procedure yields computationally efficient controller Realizations with enhanced FWL closedloop stability performance.

A unified closedloop stability measure for finiteprecision digital controller Realizations implemented in different representation schemes
IEEE Transactions on Automatic Control, 2003CoAuthors: Jie Wu, Shunzhong Chen, James F. Whidborne, J. ChuAbstract:The closedloop stability issue of finiteprecision Realizations is investigated for digital controllers implemented in three different arithmetic formats, namely fixedpoint, floatingpoint and blockfloatingpoint schemes. It is shown that the controller coefficient perturbations resulting from using different finite word length (FWL) representation schemes possess quite different properties. A unified FWL closedloop stability measure is derived which is applicable to all the three arithmetic schemes. Unlike the existing works which only take into account the precision of a representation scheme with an assumption of an unlimited dynamic range, both the dynamic range and precision of an arithmetic scheme are considered in this new unified measure. To facilitate the design of optimal finiteprecision controller Realizations, a computationally tractable FWL closedloop stability measure is then introduced and the method of computing the value of this measure for a given controller Realization is given. For each arithmetic scheme, the optimal controller Realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach is adopted to solve for the resulting optimal Realization problem. The proposed design procedure provides a unified framework for true optimal controller implementation that requires a minimum bit length with maximum robustness to the FWL effect. Numerical examples are used to illustrate the design procedure and to compare the optimal controller Realizations in different representation schemes.
G.d. Forney  One of the best experts on this subject based on the ideXlab platform.

Codes on graphs: normal Realizations
2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060), 2000CoAuthors: G.d. ForneyAbstract:Wiberg et al. (see European Transactions on Telelecommunications, vol.6, p.51325, Sept./Oct. 1995) proposed graphical code Realizations using three kinds of elements: symbol variables, state variables and local constraints. We focus on normal Realizations, namely Wibergtype Realizations in which all symbol variables have degree 1 and state variables have degree 2. A natural graphical model of a normal Realization represents states by leaf edges, states by ordinary edges, and local constraints by vertices. Any such graph may be decoded by messagepassing (the sumproduct algorithm). We show that any Wibergtype Realization may be put into normal form without essential change in its graph or its decoding complexity. Group or linear codes are realized by group or linear Realizations. We show that an appropriately defined dual of a group or linear normal Realization realizes the dual group or linear code. The symbol variables, state variables and graph topology of the dual Realization are unchanged, while local constraints are replaced by their duals.

Codes on graphs: normal Realizations
IEEE Transactions on Information Theory, 2000CoAuthors: G.d. ForneyAbstract:A generalized state Realization of the Wiberg (1996) type is called normal if symbol variables have degree 1 and state variables have degree 2. A natural graphical model of such a Realization has leaf edges representing symbols, ordinary edges representing states, and vertices representing local constraints. Such a graph can be decoded by any version of the sumproduct algorithm. Any state Realization of a code can be put into normal form without essential change in the corresponding graph or in its decoding complexity. Group or linear codes are generated by group or linear state Realizations. On a cyclefree graph, there exists a welldefined minimal canonical Realization, and the sumproduct algorithm is exact. However, the cutset bound shows that graphs with cycles may have a superior performancecomplexity tradeoff, although the sumproduct algorithm is then inexact and iterative, and minimal Realizations are not welldefined. Efficient cyclic and cyclefree Realizations of ReedMuller (RM) codes are given as examples. The dual of a normal group Realization, appropriately defined, generates the dual group code. The dual Realization has the same graph topology as the primal Realization, replaces symbol and state variables by their character groups, and replaces primal local constraints by their duals. This fundamental result has many applications, including to dual state spaces, dual minimal trellises, duals to Tanner (1981) graphs, dual input/output (I/O) systems, and dual kernel and image representations. Finally a group code may be decoded using the dual graph, with appropriate Fourier transforms of the inputs and outputs; this can simplify decoding of highrate codes.