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Sandor M. Veres - One of the best experts on this subject based on the ideXlab platform.
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Formal Verification of autonomous vehicle platooning
Science of Computer Programming, 2017Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the behaviours of the vehicles in these platoons must be certified. This is non-trivial and goes beyond current certification requirements, for human-controlled vehicles, in that these vehicles can act autonomously. In this paper, we show how Formal Verification can contribute to the analysis of these new, and increasingly autonomous, systems. An appropriate overall representation for vehicle platooning is as a multi-agent system in which each agent captures the “autonomous decisions” carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the individual agent's code does not scale to the full system, and as the global system Verification technique does not capture the essential Verification of autonomous behaviour, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
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Formal Verification of Autonomous Vehicle Platooning
arXiv: Artificial Intelligence, 2016Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the new autonomous behaviors of the vehicles in these platoons must be certified. An appropriate representation for vehicle platooning is as a multi-agent system in which each agent captures the "autonomous decisions" carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the agent code does not scale to the full system and as the global Verification technique does not capture the essential Verification of autonomous behavior, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
Erik Reeber - One of the best experts on this subject based on the ideXlab platform.
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replacing testing with Formal Verification in intel scriptsize circledr coretm i7 processor execution engine validation
Computer Aided Verification, 2009Co-Authors: Roope Kaivola, Anna Slobodova, Rajnish Ghughal, Naren Narasimhan, Amber Telfer, Jesse Whittemore, Sudhindra Pandav, Christopher Taylor, Vladimir Frolov, Erik ReeberAbstract:Formal Verification of arithmetic datapaths has been part of the established methodology for most Intel processor designs over the last years, usually in the role of supplementing more traditional coverage oriented testing activities. For the recent Intel$^{\tiny\circledR}$ CoreTM i7 design we took a step further and used Formal Verification as the primary validation vehicle for the core execution cluster, the component responsible for the functional behaviour of all microinstructions. We applied symbolic simulation based Formal Verification techniques for full datapath, control and state validation for the cluster, and dropped coverage driven testing entirely. The project, involving some twenty person years of Verification work, is one of the most ambitious Formal Verification efforts in the hardware industry to date. Our experiences show that under the right circumstances, full Formal Verification of a design component is a feasible, industrially viable and competitive validation approach.
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replacing testing with Formal Verification in intel coretm i7 processor execution engine validation
Computer Aided Verification, 2009Co-Authors: Roope Kaivola, Anna Slobodova, Rajnish Ghughal, Naren Narasimhan, Amber Telfer, Jesse Whittemore, Sudhindra Pandav, Christopher Taylor, Vladimir Frolov, Erik ReeberAbstract:Formal Verification of arithmetic datapaths has been part of the estab- lished methodology for most Intel processor designs over the last years, usually in the role of supplementing more traditional coverage oriented testing activities. For the recent Intel Core TM i7 design we took a step further and used Formal Verification as the primary validation vehicle for the core execution cluster, the component responsible for the functional behaviour of all microinstructions. We applied symbolic simulation based Formal Verification techniques for full data- path, control and state validation for the cluster, and dropped coverage driven testing entirely. The project, involving some twenty person years of Verification work, is one of the most ambitious Formal Verification efforts in the hardware industry to date. Our experiences show that under the right circumstances, full Formal Verification of a design component is a feasible, industrially viable and competitive validation approach.
Rolf Drechsler - One of the best experts on this subject based on the ideXlab platform.
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wolfram a word level framework for Formal Verification
Rapid System Prototyping, 2009Co-Authors: Andre Sulflow, Ulrich Kuhne, Daniel Grose, Rolf DrechslerAbstract:Due to high computational costs of Formal Verification on pure Boolean level, proof techniques on the word level, like Satisfiability Modulo Theories (SMT), were proposed. Verification methods originally based on Boolean satisfiability (SAT) can directly benefit from this progress. In this work we present the word level framework WoLFram that enables the development of applications for Formal Verification of systems independent of the underlying proof technique. The framework is partitioned into an application layer, a core engine and a back-end layer. A wide range of applications is implemented, e.g.~equivalence and property checking including algorithms for coverage/property analysis, debugging and robustness checking. The back-end supports Boolean as well as word level techniques, like SMT and Constraint Solving (CSP). This makes WoLFram a stable backbone for the development and quick evaluation of emerging Verification techniques.
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modeling and proving functional completeness in Formal Verification of counting heads
International Journal on Software Tools for Technology Transfer, 2008Co-Authors: S Kinder, Rolf DrechslerAbstract:The demand for safety of electronic devices is high. Especially in safety-critical systems, e.g. electronic railway interlocking systems, safety is an important issue. Nowadays these systems are tested and simulated with a manually created set of test cases. But testing is a very cost-intensive procedure and can never reach a complete coverage for large designs. Hence, an efficient way to Formally verify these systems is required. In this paper we present a Formal Verification flow, including the modeling, for counting heads (CHs) for railways, a real-time system that is used in most electronic railway interlocking systems from SIEMENS.1 The approach shown here is based on SystemC, a powerful system description language. In this way efficient modeling and simulation-based Verification of railway components and systems becomes possible. For the Formal Verification part bounded model checking algorithms are applied, i.e. a set of properties is Formally proven to be correct. Additionally the completeness of this set is Formally and efficiently determined.
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advanced Formal Verification
2004Co-Authors: Rolf DrechslerAbstract:Preface. Contributing Authors. Introduction R. Drechsler. 1. Formal Verification. 2. Challenges. 3. Contributions to this Book. 1: What SAT-Solvers Can and Cannot Do E. Goldberg. 1. Introduction. 2. Hard Equivalence Checking CNF Formulas. 3. Stable Sets of Points. 2: Advancements in Mixed BDD and SAT Techniques G. Cabodi, S. Quer. 1. Introduction. 2. Background. 3. Comparing SAT and BDD Approaches: Are they Different? 4. Decision Diagrams as a Slave Engine in General SAT: Clause Compression by Means of ZBDDs. 5. Decision Diagram Preprocessing and Circuit-Based SAT. 6. Using SAT in Symbolic Reachability Analysis. 7. Conclusion, Remarks and Future Works. 3: Equivalence Checking of Arithmetic Circuits D. Stoffel, E. Karibaev, I. Kufareva, W. Kunz. 1. Introduction. 2. Verification Using Functional Properties. 3. Bit-Level Decision Diagrams. 4. Word-Level Decision Diagrams. 5. Arithmetic Bit-Level Verification. 6. Conclusion. 7. Future Perspectives. 4: Application of Property Checking R. Brinkmann, P. Johannsen, K. Winkelmann. 1. Circuit Verification Environment: User's View. 2. Circuit Verification Environment: Underlying Techniques. 3. Exploiting Symmetries. 4. Automated Data Path Scaling to Speed Up Property Checking. 5. Property Checking Use Cases. 6. Summary. 5: Assertion-Based Verification C.N. Coelho Jr, H.D. Foster. 1. Introduction. 2. Assertion Specification. 3. Assertion Libraries. 4. Assertion Simulation. 5. Assertions and Formal Verification. 6. Assertions and Synthesis. 7. PCI Property Specification Example. 8. Summary. 6: Formal Verification for Nonlinear Analog Systems W. Hartong, R. Klausen, L. Hedrich. 1. Introduction. 2. System Description. 3. Equivalence Checking. 4. Model Checking. 5. Summary. 6. Acknowledgement. Appendix: Mathematical Symbols. Index.
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Formal Verification of ltl formulas for systemc designs
International Symposium on Circuits and Systems, 2003Co-Authors: D Grosse, Rolf DrechslerAbstract:To handle today's complexity, modern circuits and systems have to be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast simulation on a high level of abstraction and an efficient realization on RTL. To guarantee the correct behavior of a design, a concise Verification methodology has to be developed. We present the first Formal Verification approach for SystemC that allows to prove the correctness of properties specified in linear temporal logic (LTL). In contrast to simulation-based techniques, completeness can be ensured. Our proof engine is based on symbolic manipulation, and a case study of a scalable bus arbiter shows the efficiency of the approach.
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reachability analysis for Formal Verification of systemc
Digital Systems Design, 2002Co-Authors: Rolf Drechsler, D GrosseAbstract:With ever increasing design sizes, Verification becomes the bottleneck in modem design flows. Up to 80% of the overall costs are due to the Verification task. Formal methods have been proposed to overcome the limitations of simulation approaches. But these techniques have mainly been applied to lower levels of abstraction. With more and more design complexity the need for hardware description languages with a high level of abstraction becomes obvious. We present a Formal Verification approach for circuits described in SystemC, an extension of C that allows the modeling of hardware. An algorithm for reachability analysis is proposed and a case study of a scalable bus arbiter cell is given.
Michael Fisher - One of the best experts on this subject based on the ideXlab platform.
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Formal Verification of autonomous vehicle platooning
Science of Computer Programming, 2017Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the behaviours of the vehicles in these platoons must be certified. This is non-trivial and goes beyond current certification requirements, for human-controlled vehicles, in that these vehicles can act autonomously. In this paper, we show how Formal Verification can contribute to the analysis of these new, and increasingly autonomous, systems. An appropriate overall representation for vehicle platooning is as a multi-agent system in which each agent captures the “autonomous decisions” carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the individual agent's code does not scale to the full system, and as the global system Verification technique does not capture the essential Verification of autonomous behaviour, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
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toward reliable autonomous robotic assistants through Formal Verification a case study
IEEE Transactions on Human-Machine Systems, 2016Co-Authors: Matt Webster, Michael Fisher, Clare Dixon, Maha Salem, Joe Saunders, Kheng Lee Koay, Kerstin Dautenhahn, Joan SaezponsAbstract:It is essential for robots working in close proximity to people to be both safe and trustworthy. We present a case study on Formal Verification for a high-level planner/scheduler for the Care-O-bot, an autonomous personal robotic assistant. We describe how a model of the Care-O-bot and its environment was developed using Brahms, a multiagent workflow language. Formal Verification was then carried out by automatically translating this model to the input language of an existing model checker. Four sample properties based on system requirements were verified. We then refined the environment model three times to increase its accuracy and the persuasiveness of the Formal Verification results. The first refinement uses a user activity log based on real-life experiments, but is deterministic. The second refinement uses the activities from the user activity log nondeterministically. The third refinement uses “conjoined activities” based on an observation that many user activities can overlap. The four samples properties were verified for each refinement of the environment model. Finally, we discuss the approach of environment model refinement with respect to this case study.
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Formal Verification of Autonomous Vehicle Platooning
arXiv: Artificial Intelligence, 2016Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the new autonomous behaviors of the vehicles in these platoons must be certified. An appropriate representation for vehicle platooning is as a multi-agent system in which each agent captures the "autonomous decisions" carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the agent code does not scale to the full system and as the global Verification technique does not capture the essential Verification of autonomous behavior, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
Maryam Kamali - One of the best experts on this subject based on the ideXlab platform.
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Formal Verification of autonomous vehicle platooning
Science of Computer Programming, 2017Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the behaviours of the vehicles in these platoons must be certified. This is non-trivial and goes beyond current certification requirements, for human-controlled vehicles, in that these vehicles can act autonomously. In this paper, we show how Formal Verification can contribute to the analysis of these new, and increasingly autonomous, systems. An appropriate overall representation for vehicle platooning is as a multi-agent system in which each agent captures the “autonomous decisions” carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the individual agent's code does not scale to the full system, and as the global system Verification technique does not capture the essential Verification of autonomous behaviour, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
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Formal Verification of Autonomous Vehicle Platooning
arXiv: Artificial Intelligence, 2016Co-Authors: Maryam Kamali, Louise A. Dennis, Owen Mcaree, Michael Fisher, Sandor M. VeresAbstract:The coordination of multiple autonomous vehicles into convoys or platoons is expected on our highways in the near future. However, before such platoons can be deployed, the new autonomous behaviors of the vehicles in these platoons must be certified. An appropriate representation for vehicle platooning is as a multi-agent system in which each agent captures the "autonomous decisions" carried out by each vehicle. In order to ensure that these autonomous decision-making agents in vehicle platoons never violate safety requirements, we use Formal Verification. However, as the Formal Verification technique used to verify the agent code does not scale to the full system and as the global Verification technique does not capture the essential Verification of autonomous behavior, we use a combination of the two approaches. This mixed strategy allows us to verify safety requirements not only of a model of the system, but of the actual agent code used to program the autonomous vehicles.
