The Experts below are selected from a list of 666 Experts worldwide ranked by ideXlab platform
Paul Pettersson - One of the best experts on this subject based on the ideXlab platform.
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Automated test generation using model checking: an industrial evaluation
International Journal on Software Tools for Technology Transfer, 2016Co-Authors: Eduard Paul Enoiu, Adnan Čaušević, Thomas J. Ostrand, Daniel Sundmark, Elaine J. Weyuker, Paul PetterssonAbstract:In software development, testers often focus on Functional testing to validate implemented programs against their specifications. In safety-critical software development, testers are also required to show that tests exercise, or cover, the structure and logic of the implementation. To achieve different types of logic coverage, various program artifacts such as decisions and conditions are required to be exercised during testing. Use of model checking for structural test generation has been proposed by several researchers. The limited application to models used in practice and the state space explosion can, however, impact model checking and hence the process of deriving tests for logic coverage. Thus, there is a need to validate these approaches against relevant industrial systems such that more knowledge is built on how to efficiently use them in practice. In this paper, we present a tool-supported approach to handle software written in the Function Block Diagram language such that logic coverage criteria can be formalized and used by a model checker to automatically generate tests. To this end, we conducted a study based on industrial use-case scenarios from Bombardier Transportation AB, showing how our toolbox CompleteTest can be applied to generate tests in software systems used in the safety-critical domain. To evaluate the approach, we applied the toolbox to 157 programs and found that it is efficient in terms of time required to generate tests that satisfy logic coverage and scales well for most of the programs.
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ICTSS - Using Logic Coverage to Improve Testing Function Block Diagrams
Testing Software and Systems, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:In model-driven development, testers are often focusing on Functional model-level testing, enabling verification of design models against their specifications. In addition, in safety-critical software development, testers are required to show that tests cover the structure of the implementation. Testing cost and time savings could be achieved if the process of deriving test cases for logic coverage is automated and provided test cases are ready to be executed. The logic coverage artifacts, i.e., predicates and clauses, are required for different logic coverage, e.g., MC/DC. One way of dealing with test case generation for ensuring logic coverage is to approach it as a model-checking problem, such that model-checking tools automatically create test cases. We show how logic coverage criteria can be formalized and used by a model-checker to provide test cases for ensuring coverage on safety-critical software described in the Function Block Diagram programming language. Based on our experiments, this approach, supported by a tool chain, is an applicable and useful way of generating test cases for covering Function Block Diagrams.
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MOS: An integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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CMSBSE@ICSE - MOS: an integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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Model-Based Test Suite Generation for Function Block Diagrams Using the UPPAAL Model Checker
2013 IEEE Sixth International Conference on Software Testing Verification and Validation Workshops, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:A method for model-based test generation of safety-critical embedded applications using Programmable Logic Controllers and implemented in a programming language such as Function Block Diagram (FBD) is described. The FBD component model is based on the IEC 1131 standard and it is used primarily for embedded systems, in which timeliness is an important property to be tested. Our method involves the transformation of FBD programs with timed annotations into timed automata models which are used to automatically generate test suites. Specifically we demonstrate how to use model transformation for formalization and model-checking of FBD programs using the UPPAAL tool. Many benefits emerge from this method, including the ability to automatically generate test suites from a formal model in order to ensure compliance to strict quality requirements including unit testing and specific coverage measurements. The approach is experimentally assessed on a train control system in terms of consumed resources.
Eduard Paul Enoiu - One of the best experts on this subject based on the ideXlab platform.
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Automated test generation using model checking: an industrial evaluation
International Journal on Software Tools for Technology Transfer, 2016Co-Authors: Eduard Paul Enoiu, Adnan Čaušević, Thomas J. Ostrand, Daniel Sundmark, Elaine J. Weyuker, Paul PetterssonAbstract:In software development, testers often focus on Functional testing to validate implemented programs against their specifications. In safety-critical software development, testers are also required to show that tests exercise, or cover, the structure and logic of the implementation. To achieve different types of logic coverage, various program artifacts such as decisions and conditions are required to be exercised during testing. Use of model checking for structural test generation has been proposed by several researchers. The limited application to models used in practice and the state space explosion can, however, impact model checking and hence the process of deriving tests for logic coverage. Thus, there is a need to validate these approaches against relevant industrial systems such that more knowledge is built on how to efficiently use them in practice. In this paper, we present a tool-supported approach to handle software written in the Function Block Diagram language such that logic coverage criteria can be formalized and used by a model checker to automatically generate tests. To this end, we conducted a study based on industrial use-case scenarios from Bombardier Transportation AB, showing how our toolbox CompleteTest can be applied to generate tests in software systems used in the safety-critical domain. To evaluate the approach, we applied the toolbox to 157 programs and found that it is efficient in terms of time required to generate tests that satisfy logic coverage and scales well for most of the programs.
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ICTSS - Using Logic Coverage to Improve Testing Function Block Diagrams
Testing Software and Systems, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:In model-driven development, testers are often focusing on Functional model-level testing, enabling verification of design models against their specifications. In addition, in safety-critical software development, testers are required to show that tests cover the structure of the implementation. Testing cost and time savings could be achieved if the process of deriving test cases for logic coverage is automated and provided test cases are ready to be executed. The logic coverage artifacts, i.e., predicates and clauses, are required for different logic coverage, e.g., MC/DC. One way of dealing with test case generation for ensuring logic coverage is to approach it as a model-checking problem, such that model-checking tools automatically create test cases. We show how logic coverage criteria can be formalized and used by a model-checker to provide test cases for ensuring coverage on safety-critical software described in the Function Block Diagram programming language. Based on our experiments, this approach, supported by a tool chain, is an applicable and useful way of generating test cases for covering Function Block Diagrams.
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MOS: An integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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CMSBSE@ICSE - MOS: an integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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Model-Based Test Suite Generation for Function Block Diagrams Using the UPPAAL Model Checker
2013 IEEE Sixth International Conference on Software Testing Verification and Validation Workshops, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:A method for model-based test generation of safety-critical embedded applications using Programmable Logic Controllers and implemented in a programming language such as Function Block Diagram (FBD) is described. The FBD component model is based on the IEC 1131 standard and it is used primarily for embedded systems, in which timeliness is an important property to be tested. Our method involves the transformation of FBD programs with timed annotations into timed automata models which are used to automatically generate test suites. Specifically we demonstrate how to use model transformation for formalization and model-checking of FBD programs using the UPPAAL tool. Many benefits emerge from this method, including the ability to automatically generate test suites from a formal model in order to ensure compliance to strict quality requirements including unit testing and specific coverage measurements. The approach is experimentally assessed on a train control system in terms of consumed resources.
Daniel Sundmark - One of the best experts on this subject based on the ideXlab platform.
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Automated test generation using model checking: an industrial evaluation
International Journal on Software Tools for Technology Transfer, 2016Co-Authors: Eduard Paul Enoiu, Adnan Čaušević, Thomas J. Ostrand, Daniel Sundmark, Elaine J. Weyuker, Paul PetterssonAbstract:In software development, testers often focus on Functional testing to validate implemented programs against their specifications. In safety-critical software development, testers are also required to show that tests exercise, or cover, the structure and logic of the implementation. To achieve different types of logic coverage, various program artifacts such as decisions and conditions are required to be exercised during testing. Use of model checking for structural test generation has been proposed by several researchers. The limited application to models used in practice and the state space explosion can, however, impact model checking and hence the process of deriving tests for logic coverage. Thus, there is a need to validate these approaches against relevant industrial systems such that more knowledge is built on how to efficiently use them in practice. In this paper, we present a tool-supported approach to handle software written in the Function Block Diagram language such that logic coverage criteria can be formalized and used by a model checker to automatically generate tests. To this end, we conducted a study based on industrial use-case scenarios from Bombardier Transportation AB, showing how our toolbox CompleteTest can be applied to generate tests in software systems used in the safety-critical domain. To evaluate the approach, we applied the toolbox to 157 programs and found that it is efficient in terms of time required to generate tests that satisfy logic coverage and scales well for most of the programs.
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ICTSS - Using Logic Coverage to Improve Testing Function Block Diagrams
Testing Software and Systems, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:In model-driven development, testers are often focusing on Functional model-level testing, enabling verification of design models against their specifications. In addition, in safety-critical software development, testers are required to show that tests cover the structure of the implementation. Testing cost and time savings could be achieved if the process of deriving test cases for logic coverage is automated and provided test cases are ready to be executed. The logic coverage artifacts, i.e., predicates and clauses, are required for different logic coverage, e.g., MC/DC. One way of dealing with test case generation for ensuring logic coverage is to approach it as a model-checking problem, such that model-checking tools automatically create test cases. We show how logic coverage criteria can be formalized and used by a model-checker to provide test cases for ensuring coverage on safety-critical software described in the Function Block Diagram programming language. Based on our experiments, this approach, supported by a tool chain, is an applicable and useful way of generating test cases for covering Function Block Diagrams.
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MOS: An integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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CMSBSE@ICSE - MOS: an integrated model-based and search-based testing tool for Function Block Diagrams
2013 1st International Workshop on Combining Modelling and Search-Based Software Engineering (CMSBSE), 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Kivanc Doganay, Markus Bohlin, Paul PetterssonAbstract:In this paper we present a new testing tool for safety critical applications described in Function Block Diagram (FBD) language aimed to support both a model and a search-based approach. Many benefits emerge from this tool, including the ability to automatically generate test suites from an FBD program in order to comply to quality requirements such as component testing and specific coverage measurements. Search-based testing methods are used to generate test data based on executable code rather than the FBD program, alleviating any problems that may arise from the ambiguities that occur while creating FBD programs. Test cases generated by both approaches are executed and used as a way of cross validation. In the current work, we describe the architecture of the tool, its workflow process, and a case study in which the tool has been applied in a real industrial setting to test a train control management system.
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Model-Based Test Suite Generation for Function Block Diagrams Using the UPPAAL Model Checker
2013 IEEE Sixth International Conference on Software Testing Verification and Validation Workshops, 2013Co-Authors: Eduard Paul Enoiu, Daniel Sundmark, Paul PetterssonAbstract:A method for model-based test generation of safety-critical embedded applications using Programmable Logic Controllers and implemented in a programming language such as Function Block Diagram (FBD) is described. The FBD component model is based on the IEC 1131 standard and it is used primarily for embedded systems, in which timeliness is an important property to be tested. Our method involves the transformation of FBD programs with timed annotations into timed automata models which are used to automatically generate test suites. Specifically we demonstrate how to use model transformation for formalization and model-checking of FBD programs using the UPPAAL tool. Many benefits emerge from this method, including the ability to automatically generate test suites from a formal model in order to ensure compliance to strict quality requirements including unit testing and specific coverage measurements. The approach is experimentally assessed on a train control system in terms of consumed resources.
Gee-Yong Park - One of the best experts on this subject based on the ideXlab platform.
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Software FMEA analysis for safety-related application software
Annals of Nuclear Energy, 2014Co-Authors: Gee-Yong ParkAbstract:Abstract A method of a software safety analysis is described in this paper for safety-related application software. The target software system is a software code installed at an Automatic Test and Interface Processor (ATIP) in a digital reactor protection system (DRPS). For the ATIP software safety analysis, at first, an overall safety or hazard analysis is performed over the software architecture and modules, and then a detailed safety analysis based on the software FMEA (Failure Modes and Effect Analysis) method is applied to the ATIP program. For an efficient analysis, the software FMEA analysis is carried out based on the so-called failure-mode template extracted from the Function Blocks used in the Function Block Diagram (FBD) for the ATIP software. The software safety analysis by the software FMEA analysis, being applied to the ATIP software code, which has been integrated and passed through a very rigorous system test procedure, is proven to be able to provide very valuable results (i.e., software defects) that could not be identified during various system tests.
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Software FMEA analysis for safety-related application software
Annals of Nuclear Energy, 2014Co-Authors: Gee-Yong Park, Do Nyeon Kim, Dong-young LeeAbstract:A method of a software safety analysis is described in this paper for safety-related application software. The target software system is a software code installed at an Automatic Test and Interface Processor (ATIP) in a digital reactor protection system (DRPS). For the ATIP software safety analysis, at first, an overall safety or hazard analysis is performed over the software architecture and modules, and then a detailed safety analysis based on the software FMEA (Failure Modes and Effect Analysis) method is applied to the ATIP program. For an efficient analysis, the software FMEA analysis is carried out based on the so-called failure-mode template extracted from the Function Blocks used in the Function Block Diagram (FBD) for the ATIP software. The software safety analysis by the software FMEA analysis, being applied to the ATIP software code, which has been integrated and passed through a very rigorous system test procedure, is proven to be able to provide very valuable results (i.e., software defects) that could not be identified during various system tests. © 2014 Elsevier Ltd. All rights reserved.
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fbdverifier interactive and visual analysis of counter example in formal verification of Function Block Diagram
Journal of Research and Practice in Information Technology, 2010Co-Authors: Seungjae Jeon, Gee-Yong Park, Poong Hyun SeongAbstract:Model checking is often applied to verify safety-critical software implemented in programmable logic controller (PLC) language such as a Function Block Diagram (FBD). Counter-examples generated by a model checker are often too lengthy and complex to analyze. This paper describes the FBDVerifier which allows domain experts to perform automated model checking and intuitive visual analysis of counter-examples without having to know technical details on temporal logic or the model checker. Once the FBD program is automatically translated into a semantically equivalent Verilog model and model checking is performed using SMV, users can enter various expressions to investigate why verification of certain properties failed. When applied to FBD programs implementing a shutdown system for a nuclear power plant, domain engineers were able to perform effective FBD verification and detect logical errors in the FBD design.
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Software FMEA Analysis for Safety Software
Volume 5: Fuel Cycle and High and Low Level Waste Management and Decommissioning; Computational Fluid Dynamics (CFD) Neutronics Methods and Coupled Co, 2009Co-Authors: Gee-Yong Park, Dong-young Lee, Sup Hur, Dong H. Kim, Kee C. KwonAbstract:This paper describes a software safety analysis for a software code that is installed at an Automatic Test and Interface Processor (ATIP) in a digital reactor protection system. For the ATIP software safety analysis, an overall safety analysis is at first performed over the ATIP software architecture and modules, and then a detailed safety analysis based on the software FMEA (Failure Modes and Effect Analysis) method is applied to the ATIP program. For an efficient analysis, the software FMEA is carried out based on the so-called failure-mode template extracted from the Function Blocks used in the Function Block Diagram (FBD) for the ATIP software. The software safety analysis by the software FMEA, being applied to the ATIP software code which has been integrated and passed through a very rigorous system test procedure, is proven to be able to provide very valuable results (i.e., software defects) which could not be identified during various system tests.Copyright © 2009 by ASME
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a formal verification method of Function Block Diagram
한국원자력학회 2007 춘계학술발표대회, 2007Co-Authors: Poong Hyun Seong, Gee-Yong Park, Seungjae Jeon, Keechoon KwonAbstract:1 Department of Nuclear and Quantum Engineering, KAIST 2 Division of Computer Science, Department of Electrical Engineering and Computer Science, KAIST 373-1 Guseong-dong, Yuseong-gu, Daejeon, 305-701, Korea 3 Korea Atomic Energy Research Institute 150 Deokjin-dong Yuseong-gu, Daejeon, 305-353, Korea goeric1@kaist.ac.kr, phseong@kaist.ac.kr, ekjee@dependable.kaist.ac.kr, sjjeon@dependable.kaist.ac.kr, gypark@kaeri.re.kr, kckwon@kaeri.re.kr
Poong Hyun Seong - One of the best experts on this subject based on the ideXlab platform.
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fbdverifier interactive and visual analysis of counter example in formal verification of Function Block Diagram
Journal of Research and Practice in Information Technology, 2010Co-Authors: Seungjae Jeon, Gee-Yong Park, Poong Hyun SeongAbstract:Model checking is often applied to verify safety-critical software implemented in programmable logic controller (PLC) language such as a Function Block Diagram (FBD). Counter-examples generated by a model checker are often too lengthy and complex to analyze. This paper describes the FBDVerifier which allows domain experts to perform automated model checking and intuitive visual analysis of counter-examples without having to know technical details on temporal logic or the model checker. Once the FBD program is automatically translated into a semantically equivalent Verilog model and model checking is performed using SMV, users can enter various expressions to investigate why verification of certain properties failed. When applied to FBD programs implementing a shutdown system for a nuclear power plant, domain engineers were able to perform effective FBD verification and detect logical errors in the FBD design.
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a formal verification method of Function Block Diagram
한국원자력학회 2007 춘계학술발표대회, 2007Co-Authors: Poong Hyun Seong, Gee-Yong Park, Seungjae Jeon, Keechoon KwonAbstract:1 Department of Nuclear and Quantum Engineering, KAIST 2 Division of Computer Science, Department of Electrical Engineering and Computer Science, KAIST 373-1 Guseong-dong, Yuseong-gu, Daejeon, 305-701, Korea 3 Korea Atomic Energy Research Institute 150 Deokjin-dong Yuseong-gu, Daejeon, 305-353, Korea goeric1@kaist.ac.kr, phseong@kaist.ac.kr, ekjee@dependable.kaist.ac.kr, sjjeon@dependable.kaist.ac.kr, gypark@kaeri.re.kr, kckwon@kaeri.re.kr
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Development of a verification method for timed Function Blocks using ESDT and SMV
Eighth IEEE International Symposium on High Assurance Systems Engineering 2004. Proceedings., 2004Co-Authors: Myung Jun Song, Poong Hyun SeongAbstract:As programmable logic controllers (PLCs) are widely used in the digital instrumentation and control (I&C) systems of nuclear power plants (NPPs), the safety of PLC software has become the most important consideration. In this work, we propose a method to perform effective verification activities on the traceability analysis and the software design evaluation in the software design phase. In order to perform the traceability analysis between software requirement specification (SRS) written in a natural language and software design specification (SDS) written in Function Block Diagram (FBD), this method uses extended- structured decision table (ESDT). ESDTs include information related to the traceability analysis from SRS and SDS, respectively. Through comparing with two ESDTs, an effective traceability analysis can be achieved. For the software design evaluation, we use model checking as a formal verification method. FBD-style design specification is translated into symbolic model verifier (SMV) input language and then the FBD-style design specification can be formally analyzed using SMV model checker.
