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Keshab K. Parhi - One of the best experts on this subject based on the ideXlab platform.

  • Fast VLSI binary addition
    1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing, 1997
    Co-Authors: Keshab K. Parhi
    Abstract:

    This paper presents novel architectures for fast binary addition which can be implemented using multiplexers only. Binary addition is carried out using a fast redundant-to-binary converter. It is shown that appropriate encoding of the redundant digits and recasting the binary addition as a redundant-to-binary conversion reduces the latency of addition from Wt/sub fa/ to Wt/sub mux/ where t/sub fa/ and t/sub mux/, respectively, represent binary full adder and multiplexer delays, and W is the word-length. A family of fast converter architectures is developed based on tree-type (obtained using look-ahead techniques) and carry-select approaches. The carry-Generation Component is the critical Component in redundant-to-binary conversion and binary addition. It is shown that, if the word-length, W, is a power of two, then all carry signals can be generated in log/sub 2/Wt/sub max/ time using W(log/sub 2/W-1)+1 multiplexers using a tree-type converter. It is shown that fastest binary addition can be performed using (Wlog/sub 2/W+1) multiplexers in time (log/sub 2/W+1)t/sub max/. If the specified converter latency is greater than log/sub 2/W/sub mux/, then a family of converters using fewest multiplexers can be designed based on carry-select approach. It is shown that the power consumption in carry-select adders is minimized by increasing the number of segments in the adder.

  • fast low energy vlsi binary addition
    International Conference on Computer Design, 1997
    Co-Authors: Keshab K. Parhi
    Abstract:

    This paper presents novel architectures for fast binary addition which can be implemented using multiplexers only. Binary addition as carried out using a fast redundant-to-binary converter. It is shown that appropriate encoding of the redundant digits and recasting the binary addition as a redundant-to-binary conversion reduces the latency of addition from Wt/sub fa/, to Wt/sub mux/ where t/sub fa/ and t/sub mux/ respectively, represent binary full adder and multiplexer delays, and W is the word-length. A family of fast converter architectures is developed based on tree-type (obtained using lookahead techniques) and carry-select approaches. The carry-Generation Component is the critical Component in redundant-to-binary conversion and binary addition. It is shown that fastest binary addition can be performed using (Wlog/sub 2/+W+1) multiplexers in time (log/sub 2/W+2)t/sub mux/. If the specified adder latency is greater than (log/sub 2/W+2)t/sub mux/, then a family of converters using fewest multiplexers can be designed based on carry-select approach. Finally a class of hybrid adders are designed by using a carry-select configuration and by substituting tree-based blocks in place of some carry-select blocks. It is shown that this approach can lead to adder designs which consume the least energy.

  • ICCD - Fast low-energy VLSI binary addition
    Proceedings International Conference on Computer Design VLSI in Computers and Processors, 1997
    Co-Authors: Keshab K. Parhi
    Abstract:

    This paper presents novel architectures for fast binary addition which can be implemented using multiplexers only. Binary addition as carried out using a fast redundant-to-binary converter. It is shown that appropriate encoding of the redundant digits and recasting the binary addition as a redundant-to-binary conversion reduces the latency of addition from Wt/sub fa/, to Wt/sub mux/ where t/sub fa/ and t/sub mux/ respectively, represent binary full adder and multiplexer delays, and W is the word-length. A family of fast converter architectures is developed based on tree-type (obtained using lookahead techniques) and carry-select approaches. The carry-Generation Component is the critical Component in redundant-to-binary conversion and binary addition. It is shown that fastest binary addition can be performed using (Wlog/sub 2/+W+1) multiplexers in time (log/sub 2/W+2)t/sub mux/. If the specified adder latency is greater than (log/sub 2/W+2)t/sub mux/, then a family of converters using fewest multiplexers can be designed based on carry-select approach. Finally a class of hybrid adders are designed by using a carry-select configuration and by substituting tree-based blocks in place of some carry-select blocks. It is shown that this approach can lead to adder designs which consume the least energy.

Mohsen A. Jafari - One of the best experts on this subject based on the ideXlab platform.

  • ISGT - Sizing methodology for combined renewable energy systems
    2017 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference (ISGT), 2017
    Co-Authors: Jaimie Swartz, Ali Ghofrani, Mohsen A. Jafari
    Abstract:

    In this work we develop a process to size the renewable energy system that can power a microgrid community. We begin by collecting the community's varying load, location dependent data, and commercially available Generation types. According to rules of thumb and relevant physics equations, we then recommended the quantity and configuration of each Generation Component. Finally, we combine the design suggestions into a hybrid energy system that is simulated and analyzed in TRNSYS. Hence we have created a sizing methodology that determines the best configuration and type of Generation Components for a microgrid to achieve net-zero energy.

Jaimie Swartz - One of the best experts on this subject based on the ideXlab platform.

  • ISGT - Sizing methodology for combined renewable energy systems
    2017 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference (ISGT), 2017
    Co-Authors: Jaimie Swartz, Ali Ghofrani, Mohsen A. Jafari
    Abstract:

    In this work we develop a process to size the renewable energy system that can power a microgrid community. We begin by collecting the community's varying load, location dependent data, and commercially available Generation types. According to rules of thumb and relevant physics equations, we then recommended the quantity and configuration of each Generation Component. Finally, we combine the design suggestions into a hybrid energy system that is simulated and analyzed in TRNSYS. Hence we have created a sizing methodology that determines the best configuration and type of Generation Components for a microgrid to achieve net-zero energy.

Paul I Barton - One of the best experts on this subject based on the ideXlab platform.

  • energy conversion with solid oxide fuel cell systems a review of concepts and outlooks for the short and long term
    Industrial & Engineering Chemistry, 2013
    Co-Authors: Thomas A Adams, Jake Nease, David Tucker, Paul I Barton
    Abstract:

    A review of energy conversion systems which use solid oxide fuel cells (SOFCs) as their primary electricity Generation Component is presented. The systems reviewed are largely geared for development and use in the short- and long-term future. These include systems for bulk power Generation, distributed power Generation, and systems integrated with other forms of energy conversion such as fuel production. The potential incorporation of CO2 capture and sequestration technologies and the influences of potential government policies are also discussed.

Norbert Reithinger - One of the best experts on this subject based on the ideXlab platform.

  • NLG - The Performance of an Incremental Generation Component for Multi-Modal Dialog Contributions
    Lecture Notes in Computer Science, 1992
    Co-Authors: Norbert Reithinger
    Abstract:

    In this paper, the performance of POPEL is demonstrated, an incremental and parallel natural language Generation Component for written German dialog contributions. The system's architectural approach is based on a cascaded model with feedback. It provides the flexibility essential for the integration into a dialog system. Furthermore, this architecture enables the seamless addition of the Generation of multi-modal output to the decision flow of the generator. The rule-based gesture generator follows the simulation-oriented approach that mimics natural pointing gestures on a graphic. The analysis of the Generation of a short text consisting of two sentences in different discourse contexts demonstrates POPEL's contextdependent mode of Generation.