Immediate Operand

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The Experts below are selected from a list of 12 Experts worldwide ranked by ideXlab platform

Naehyuck Chang - One of the best experts on this subject based on the ideXlab platform.

  • Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI [microprocessors]
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2002
    Co-Authors: Naehyuck Chang
    Abstract:

    Energy characterization is the basis for high-level energy reduction. Measurement-based characterization is accurate and independent of model availability and is thus suitable for commercial off-the-shelf (COTS) components, but conventional measurement equipment has serious limitations in this context. We introduce a new technique for the energy characterization of a microprocessor using a cycle-accurate energy measurement system based on charge transfer which is robust to spiky noise and is able to collect a range of energy consumption profiles in real time. It measures the energy variation of the CPU core by changing the instruction-level energy-sensitive factors such as opcodes (operations), instruction fetch addresses, register numbers, register values, data fetch addresses and Immediate Operand values at each pipeline stage. Using the ARM7TDMI RISC processor as a case study, we observe that the energy contributions of most instruction-level energy-sensitive factors are orthogonal to the operations. We are able to characterize the energy variation, preserving all the effects of the energy-sensitive factors for various software methods of energy reduction. We also demonstrate applications of our measurement and characterization techniques.

  • Cycle-accurate energy consumption measurement and analysis: Case study of arm7tdmi
    2000
    Co-Authors: Naehyuck Chang, Kwanho Kim, Hyung Gyu Lee
    Abstract:

    We introduce an energy consumption analysis of complex digital systems through a case study of ARM7TDMI RISC processor by using a new energy measurement technique. We developed a cycle-accurate energy consumption measurement system based on charge transfer which is robust to spiky noise and is capable of collecting a range of power consumption profiles in real time. The relative energy variation of the RISC core is measured by changing the op-code, the instruction fetch address, the register number, the register value, the data fetch address, and the Immediate Operand value in each pipeline stage, respectively. We demonstrated energy charac-terization of a pipelined RISC processor for high-level power re-duction. 1

Hyung Gyu Lee - One of the best experts on this subject based on the ideXlab platform.

  • Cycle-accurate energy consumption measurement and analysis: Case study of arm7tdmi
    2000
    Co-Authors: Naehyuck Chang, Kwanho Kim, Hyung Gyu Lee
    Abstract:

    We introduce an energy consumption analysis of complex digital systems through a case study of ARM7TDMI RISC processor by using a new energy measurement technique. We developed a cycle-accurate energy consumption measurement system based on charge transfer which is robust to spiky noise and is capable of collecting a range of power consumption profiles in real time. The relative energy variation of the RISC core is measured by changing the op-code, the instruction fetch address, the register number, the register value, the data fetch address, and the Immediate Operand value in each pipeline stage, respectively. We demonstrated energy charac-terization of a pipelined RISC processor for high-level power re-duction. 1

Jyh-jiun J. Shann - One of the best experts on this subject based on the ideXlab platform.

  • Compressing MIPS code by multiple Operand dependencies
    ACM Transactions in Embedded Computing Systems, 2003
    Co-Authors: C.-p. Chung, Jyh-jiun J. Shann
    Abstract:

    Intuitively, destination registers of some instructions have great possibilities to be used as the source registers of the Immediately subsequent instructions. Such destination register/source register pairs have been exploited previously to improve code compression ratio [compression ratio = (Dictionary Size + Encoded Program Size)/Original Program Size]. This paper further examines the exploitation of both register and Immediate Operand dependencies to improve the compression ratio. A mapping tag is used to flag dependency relationships so that dependent Operands can be omitted during compression. The compression ratio is enhanced by both the removal of dependent Operands and the sharing of mapping tags between different types of dependencies and between different instructions. Simulation results show that the proposed method results in the best compression ratio achieved so far, giving average compression ratios of 33.8p for MediaBench benchmarks and 33.6p for SPEC95 benchmarks, both compiled for a MIPS R2000 processor.

Kwanho Kim - One of the best experts on this subject based on the ideXlab platform.

  • Cycle-accurate energy consumption measurement and analysis: Case study of arm7tdmi
    2000
    Co-Authors: Naehyuck Chang, Kwanho Kim, Hyung Gyu Lee
    Abstract:

    We introduce an energy consumption analysis of complex digital systems through a case study of ARM7TDMI RISC processor by using a new energy measurement technique. We developed a cycle-accurate energy consumption measurement system based on charge transfer which is robust to spiky noise and is capable of collecting a range of power consumption profiles in real time. The relative energy variation of the RISC core is measured by changing the op-code, the instruction fetch address, the register number, the register value, the data fetch address, and the Immediate Operand value in each pipeline stage, respectively. We demonstrated energy charac-terization of a pipelined RISC processor for high-level power re-duction. 1

C.-p. Chung - One of the best experts on this subject based on the ideXlab platform.

  • Compressing MIPS code by multiple Operand dependencies
    ACM Transactions in Embedded Computing Systems, 2003
    Co-Authors: C.-p. Chung, Jyh-jiun J. Shann
    Abstract:

    Intuitively, destination registers of some instructions have great possibilities to be used as the source registers of the Immediately subsequent instructions. Such destination register/source register pairs have been exploited previously to improve code compression ratio [compression ratio = (Dictionary Size + Encoded Program Size)/Original Program Size]. This paper further examines the exploitation of both register and Immediate Operand dependencies to improve the compression ratio. A mapping tag is used to flag dependency relationships so that dependent Operands can be omitted during compression. The compression ratio is enhanced by both the removal of dependent Operands and the sharing of mapping tags between different types of dependencies and between different instructions. Simulation results show that the proposed method results in the best compression ratio achieved so far, giving average compression ratios of 33.8p for MediaBench benchmarks and 33.6p for SPEC95 benchmarks, both compiled for a MIPS R2000 processor.