The Experts below are selected from a list of 22347 Experts worldwide ranked by ideXlab platform
Wiącek Urszula - One of the best experts on this subject based on the ideXlab platform.
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Feasibility of Monte Carlo modelling for the neutron-neutron logging tool response in specific geological models
AGH University of Science and Technology, 2017Co-Authors: Wiącek UrszulaAbstract:Neutron well logging is one of the basic methods for the determination of the characteristic parameters of rock samples. The neutron Source and neutron detectors are elements of Neutron-Neutron Thermal-Epithermal logging tool (NNTE) of significant importance. A neutron Source creates the neutron field in the nearest environment. Detectors placed at specified distances from the Source Register neutrons from this space. A signal of a Neutron-Neutron Thermal-Epithermal tool in specific geological conditions was numerically calculated by means of the Monte Carlo (MC) codes. The main aim of this paper is to show the potential for using the Monte Carlo N-Particle Transport Code (MCNP) software in nuclear well logging prospection methods. The results of this MC modelling are presented in this paper
C.-p. Chung - One of the best experts on this subject based on the ideXlab platform.
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Code compression by Register operand dependency
Journal of Systems and Software, 2004Co-Authors: Jyh-jiun J. Shann, C.-p. ChungAbstract:This paper proposes a dictionary-based code compression technique that maps the Source Register operands to the nearest occurrence of a destination Register in the predecessor instructions. The key idea is that most destination Registers have a great possibility to be used as Source Registers in the following instructions. The dependent Registers can be removed from the dictionary if this information can be specified otherwise. Such destination Source relationships are so common that making use of them can result in much better code compression. After removing the dependent Register operands, the original dictionary size can be reduced significantly. As a result, the compression ratio can benefit from: (a) the reduction of dictionary size due to the removal of dependent Registers, and (b) the reduction of program encoding due to the reduced number of dictionary entries. A set of programs has been compressed using this feature. The compression results show that the average compression ratio is reduced to 38.41% on average for MediaBench benchmarks compiled for MIPS R2000 processor, as opposed to 45% using operand factorization.
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Compressing MIPS code by multiple operand dependencies
ACM Transactions in Embedded Computing Systems, 2003Co-Authors: C.-p. Chung, Jyh-jiun J. ShannAbstract:Intuitively, destination Registers of some instructions have great possibilities to be used as the Source Registers of the immediately subsequent instructions. Such destination Register/Source Register pairs have been exploited previously to improve code compression ratio [compression ratio = (Dictionary Size + Encoded Program Size)/Original Program Size]. This paper further examines the exploitation of both Register and immediate operand dependencies to improve the compression ratio. A mapping tag is used to flag dependency relationships so that dependent operands can be omitted during compression. The compression ratio is enhanced by both the removal of dependent operands and the sharing of mapping tags between different types of dependencies and between different instructions. Simulation results show that the proposed method results in the best compression ratio achieved so far, giving average compression ratios of 33.8p for MediaBench benchmarks and 33.6p for SPEC95 benchmarks, both compiled for a MIPS R2000 processor.
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Code compression by Register operand dependency
Proceedings Sixth Annual Workshop on Interaction between Compilers and Computer Architectures, 2002Co-Authors: Jyh-jiun J. Shann, C.-p. ChungAbstract:This paper proposes a dictionary-based code compression technique that maps the Source Register operands to the nearest occurrence of a destination Register in the predecessor instructions. The key idea is that most destination Registers have great potential to be used as Source Registers in the following instructions. The dependent Registers can be removed from the dictionary if this information can be specified otherwise. As a result, the compression ratio benefits from the decreased dictionary size. A set of programs has been compressed using this feature. The compression results show that the average compression ratio is reduced to 38.6% on average for MediaBench benchmarks compiled for MIPS R2000 processor.
Jyh-jiun J. Shann - One of the best experts on this subject based on the ideXlab platform.
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Code compression by Register operand dependency
Journal of Systems and Software, 2004Co-Authors: Jyh-jiun J. Shann, C.-p. ChungAbstract:This paper proposes a dictionary-based code compression technique that maps the Source Register operands to the nearest occurrence of a destination Register in the predecessor instructions. The key idea is that most destination Registers have a great possibility to be used as Source Registers in the following instructions. The dependent Registers can be removed from the dictionary if this information can be specified otherwise. Such destination Source relationships are so common that making use of them can result in much better code compression. After removing the dependent Register operands, the original dictionary size can be reduced significantly. As a result, the compression ratio can benefit from: (a) the reduction of dictionary size due to the removal of dependent Registers, and (b) the reduction of program encoding due to the reduced number of dictionary entries. A set of programs has been compressed using this feature. The compression results show that the average compression ratio is reduced to 38.41% on average for MediaBench benchmarks compiled for MIPS R2000 processor, as opposed to 45% using operand factorization.
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Compressing MIPS code by multiple operand dependencies
ACM Transactions in Embedded Computing Systems, 2003Co-Authors: C.-p. Chung, Jyh-jiun J. ShannAbstract:Intuitively, destination Registers of some instructions have great possibilities to be used as the Source Registers of the immediately subsequent instructions. Such destination Register/Source Register pairs have been exploited previously to improve code compression ratio [compression ratio = (Dictionary Size + Encoded Program Size)/Original Program Size]. This paper further examines the exploitation of both Register and immediate operand dependencies to improve the compression ratio. A mapping tag is used to flag dependency relationships so that dependent operands can be omitted during compression. The compression ratio is enhanced by both the removal of dependent operands and the sharing of mapping tags between different types of dependencies and between different instructions. Simulation results show that the proposed method results in the best compression ratio achieved so far, giving average compression ratios of 33.8p for MediaBench benchmarks and 33.6p for SPEC95 benchmarks, both compiled for a MIPS R2000 processor.
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Code compression by Register operand dependency
Proceedings Sixth Annual Workshop on Interaction between Compilers and Computer Architectures, 2002Co-Authors: Jyh-jiun J. Shann, C.-p. ChungAbstract:This paper proposes a dictionary-based code compression technique that maps the Source Register operands to the nearest occurrence of a destination Register in the predecessor instructions. The key idea is that most destination Registers have great potential to be used as Source Registers in the following instructions. The dependent Registers can be removed from the dictionary if this information can be specified otherwise. As a result, the compression ratio benefits from the decreased dictionary size. A set of programs has been compressed using this feature. The compression results show that the average compression ratio is reduced to 38.6% on average for MediaBench benchmarks compiled for MIPS R2000 processor.
Urszula Woźnicka - One of the best experts on this subject based on the ideXlab platform.
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feasibility of monte carlo modelling for the neutron neutron logging tool response in specific geological models
Geology Geophysics and Environment, 2016Co-Authors: Urszula Wiącek, Urszula WoźnickaAbstract:The neutron well logging is one of the basic methods for determinations of characteristic parameters of the rock samples. The neutron Source and neutron detectors are elements of NNTE logging tool of significant importance. A neutron Source creates the neutron field in the nearest environment. Detectors placed at specified distances from the Source Register neutrons from this space. A signal of NNTE density tool in specific geological conditions was numerically calculated by means of the Monte Carlo (MC) codes. The main aim of this paper is to show the potential of using the MCNP software in nuclear well logging prospection methods. Results of this MC modelling are presented in this paper.
Seon Wook Kim - One of the best experts on this subject based on the ideXlab platform.
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Reducing the Delay for Decoding Instructions by Predicting Their Source Register Operands
Electronics, 2020Co-Authors: Sang-hyun Park, Jaeyung Jun, Chang-hyun Kim, Gyeong Il Min, Hun Jae Lee, Seon Wook KimAbstract:The fetched instructions would have data dependency with in-flight ones in the pipeline execution of a processor, so the dependency prevents the processor from executing the incoming instructions for guaranteeing the program’s correctness. The Register and memory dependencies are detected in the decode and memory stages, respectively. In a small embedded processor that supports as many ISAsas possible to reduce code size, the instruction decoding to identify Register usage with the dependence check generally results in long delay and sometimes a critical path in its implementation. For reducing the delay, this paper proposes two methods—One method assumes the widely used Source Register operand bit-fields without fully decoding the instructions. However, this assumption would cause additional stalls due to the incorrect prediction; thus, it would degrade the performance. To solve this problem, as the other method, we adopt a table-based way to store the dependence history and later use this information for more precisely predicting the dependency. We applied our methods to the commercial EISC embedded processor with the Samsung 65nm process; thus, we reduced the critical path delay and increased its maximum operating frequency by 12.5% and achieved an average 11.4% speed-up in the execution time of the EEMBC applications. We also improved the static, dynamic power consumption, and EDP by 7.2%, 8.5%, and 13.6%, respectively, despite the implementation area overhead of 2.5%.
