The Experts below are selected from a list of 39 Experts worldwide ranked by ideXlab platform

Shaojun Wei - One of the best experts on this subject based on the ideXlab platform.

  • An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
    IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

  • ISCAS - An inductive-coupling Interconnected Application-specific 3D NoC design
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

Zhen Zhang - One of the best experts on this subject based on the ideXlab platform.

  • An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
    IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

  • ISCAS - An inductive-coupling Interconnected Application-specific 3D NoC design
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

Shouyi Yin - One of the best experts on this subject based on the ideXlab platform.

  • An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
    IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

  • ISCAS - An inductive-coupling Interconnected Application-specific 3D NoC design
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

Leibo Liu - One of the best experts on this subject based on the ideXlab platform.

  • An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
    IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

  • ISCAS - An inductive-coupling Interconnected Application-specific 3D NoC design
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei
    Abstract:

    To deal with interconnect delay problem, through-silicon-via (TSV) based 3D interconnect is widely used. However, TSV-Interconnected 3D chips face problems such as high cost, low yield and large power dissipation. In this paper, we propose a wireless 3D on-chip-network architecture for Application-specific SoC design, using inductive-coupling interconnect instead of TSV for inter-layer communication, which cuts down manufacture cost, improves interconnect performance, reduces power consumption and provides larger design space. The key to this design is allocating wireless links in the 3D on-chip network effectively while maintaining signal integrity. We develop a design flow which can fully exploit the design space brought by wireless links and provide flexible tradeoff for user's choice. Experimental results show that our architecture brings great improvement on both performance and power consumption.

Anne Le Calvé - One of the best experts on this subject based on the ideXlab platform.

  • Linked Data Integration and Consumption: A Case of Open-Interconnected Application in Swiss Administration
    International Conference on Semantic Web Business and Innovation (SWBI2015), 2015
    Co-Authors: Fabian Cretton, Zhan Liu, Anne Le Calvé
    Abstract:

    Building government services with an Interconnected administration approach is a worldwide trend aimed to solve the complexity of government-related processes. The connection between people and services relies on technical tools that could benefit from improvements at the data level, by more easily sharing and having a better interlinking of data from different sources. Linked data technologies have been developed to fulfill this universal need at the World Wide Web scale, and evolve it into a web of data. In this study, we move along the data lifecycle from linked data access onto its consumption and up to the design of end-users Applications. As technologies for linked data publication are already at an advanced stage, we focus on the features needed for linked data consumption and present the framework we implemented in the “OverLOD Surfer” project. We apply the solution to our former work in eGovernment and semantic business process management to strengthen our assertion that the web of data approach is effective in supporting the realization of Applications for an Interconnected administration.