The Experts below are selected from a list of 339 Experts worldwide ranked by ideXlab platform
. Muralidhara - One of the best experts on this subject based on the ideXlab platform.
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SIMULATION AND DESIGN OF VOLTAGE DRIVER FOR PIEZO ELECTRIC ACTUATOR
International Journal of Innovative Technology and Research, 2016Co-Authors: S.k Bharath, Rehaman Md.abdul, . MuralidharaAbstract:This paper deals with design and simulation of a voltage driver for piezoelectric actuator. A 200V DC unregulated power supply is considered and simulated for the operational amplifier. The driver circuit comprises of an amplifier having an Inverting Terminal for setting a control input voltage signal with non-Inverting Terminal grounded and output Terminal for the connection of the actuator load. Single stack of MLA 10*10*20 has capacitance of 4.4 micro farad which is observed as a load in this paper and analysis is done for single stack as well as multi stacks also. Voltage driven actuators are widely used as they are less complicated, cost effective for position control application
Kehorng Chen - One of the best experts on this subject based on the ideXlab platform.
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17 10 0 65v input voltage 0 6v output voltage 30ppm c low dropout regulator with embedded voltage reference for low power biomedical systems
International Solid-State Circuits Conference, 2014Co-Authors: Weichung Chen, Yuhuei Lee, Chinlong Wey, Kehorng ChenAbstract:Supplying a regulated 0.6V to biomedical systems requires a low dropout (LDO) regulator with a maximum driving current capability of 10mA. One sub-1V voltage reference circuit is commonly used in the conventional LDO design to generate the reference voltage VREF with a low temperature coefficient (TC), as shown in Fig. 17.10.1. VREF is sent to the Inverting Terminal of the error amplifier (EA) to regulate the output voltage VOUT. The critical path of the voltage headroom exists between VREF and VIN through the Inverting Terminal and the tail current of the EA. That is, VIN>VSG+VOV+VREF ≈|Vtp|+2VOV+VREF, where VIN is the input supply voltage, Vtp is the threshold voltage of the p-type MOSFET and VOV is the overdrive voltage. If the minimum value of VIN is reduced to 0.65V, the derived VREF should be smaller than 50mV when |Vtp| is 0.4V and |VOV| is 0.1V. Such a sub-1V voltage reference circuit is difficult to design [1]-[4]. Even if VREF can be derived, the offset voltage in the EA will seriously affect the exact value of VREF (≤50mV). In addition, the low noise immunity is another disadvantage that severely affects the performance of the biomedical system.
S.k Bharath - One of the best experts on this subject based on the ideXlab platform.
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SIMULATION AND DESIGN OF VOLTAGE DRIVER FOR PIEZO ELECTRIC ACTUATOR
International Journal of Innovative Technology and Research, 2016Co-Authors: S.k Bharath, Rehaman Md.abdul, . MuralidharaAbstract:This paper deals with design and simulation of a voltage driver for piezoelectric actuator. A 200V DC unregulated power supply is considered and simulated for the operational amplifier. The driver circuit comprises of an amplifier having an Inverting Terminal for setting a control input voltage signal with non-Inverting Terminal grounded and output Terminal for the connection of the actuator load. Single stack of MLA 10*10*20 has capacitance of 4.4 micro farad which is observed as a load in this paper and analysis is done for single stack as well as multi stacks also. Voltage driven actuators are widely used as they are less complicated, cost effective for position control application
Weichung Chen - One of the best experts on this subject based on the ideXlab platform.
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17 10 0 65v input voltage 0 6v output voltage 30ppm c low dropout regulator with embedded voltage reference for low power biomedical systems
International Solid-State Circuits Conference, 2014Co-Authors: Weichung Chen, Yuhuei Lee, Chinlong Wey, Kehorng ChenAbstract:Supplying a regulated 0.6V to biomedical systems requires a low dropout (LDO) regulator with a maximum driving current capability of 10mA. One sub-1V voltage reference circuit is commonly used in the conventional LDO design to generate the reference voltage VREF with a low temperature coefficient (TC), as shown in Fig. 17.10.1. VREF is sent to the Inverting Terminal of the error amplifier (EA) to regulate the output voltage VOUT. The critical path of the voltage headroom exists between VREF and VIN through the Inverting Terminal and the tail current of the EA. That is, VIN>VSG+VOV+VREF ≈|Vtp|+2VOV+VREF, where VIN is the input supply voltage, Vtp is the threshold voltage of the p-type MOSFET and VOV is the overdrive voltage. If the minimum value of VIN is reduced to 0.65V, the derived VREF should be smaller than 50mV when |Vtp| is 0.4V and |VOV| is 0.1V. Such a sub-1V voltage reference circuit is difficult to design [1]-[4]. Even if VREF can be derived, the offset voltage in the EA will seriously affect the exact value of VREF (≤50mV). In addition, the low noise immunity is another disadvantage that severely affects the performance of the biomedical system.
Rehaman Md.abdul - One of the best experts on this subject based on the ideXlab platform.
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SIMULATION AND DESIGN OF VOLTAGE DRIVER FOR PIEZO ELECTRIC ACTUATOR
International Journal of Innovative Technology and Research, 2016Co-Authors: S.k Bharath, Rehaman Md.abdul, . MuralidharaAbstract:This paper deals with design and simulation of a voltage driver for piezoelectric actuator. A 200V DC unregulated power supply is considered and simulated for the operational amplifier. The driver circuit comprises of an amplifier having an Inverting Terminal for setting a control input voltage signal with non-Inverting Terminal grounded and output Terminal for the connection of the actuator load. Single stack of MLA 10*10*20 has capacitance of 4.4 micro farad which is observed as a load in this paper and analysis is done for single stack as well as multi stacks also. Voltage driven actuators are widely used as they are less complicated, cost effective for position control application
