Voltage Reference

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Bo Zhang - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - A Resistorless Low-Power Voltage Reference with Novel Curvature-Compensation Technique
    2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019
    Co-Authors: Zekun Zhou, Yu Hongming, Qian Junlin, Shi Yue, Bo Zhang
    Abstract:

    In this paper, a MOSFET-only Voltage Reference with novel curvature-compensation is proposed. In order to reduce the temperature coefficient in the proposed Voltage Reference, two proportional to absolute temperature Voltages with opposite second-order order TC are added on a threshold Voltage, which is achieved by a resistorless threshold Voltage extractor. Besides, self-biased current source with feedback is realized at the same time, which can provide bias current for the whole Voltage Reference and enhance the performance of generated Voltage Reference without additional power consumption. Verification results of the proposed Voltage Reference implemented with 0.35µm technology process show that the temperature coefficient is 2.4 ppm/□ with a temperature range of −20□ to 80□ is obtained, and a 62.9 dB power supply rejection ratio is achieved with a 68nA maximum supply current.

  • A Nanoscale Low-Power Resistorless Voltage Reference with High PSRR
    SpringerOpen, 2019
    Co-Authors: Zekun Zhou, Yue Shi, Zhuo Wang, Jianwen Cao, Yunkun Wang, Bo Zhang
    Abstract:

    Abstract In this paper, a nano-watt resistorless subthreshold Voltage Reference with high-power supply rejection ratio (PSRR) is presented. A self-biased MOS Voltage divider is proposed to provide bias current for whole Voltage Reference, which is a positive temperature coefficient (TC) current containing threshold Voltage characteristics. By injecting the generated current into a transistor with a different threshold Voltage, a delta threshold Voltage with a greatly reduced negative TC is realized and temperature-compensated by a generated positive TC item at the same time. Therefore, a temperature-stable Voltage Reference is achieved in the proposed compacted method with low power consumption and high PSRR. Verification results with 65-nm CMOS technology demonstrate that the minimum supply Voltage can be as low as 0.35 V with a 0.00182-mm2 active area. The generated Reference Voltage is 148 mV, with a TC of 28 ppm/°C for the − 30 to 80 °C temperature range. The line sensitivity is 1.8 mV/V, and the PSRR without any filtering capacitor at 100 Hz is 53 dB with a 2.28-nW power consumption

  • a resistorless low power Voltage Reference
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2016
    Co-Authors: Zekun Zhou, Yue Shi, Chao Gou, Xia Wang, Jiefei Feng, Zhuo Wang, Bo Zhang
    Abstract:

    A novel low-power temperature-stable Voltage Reference without resistors is presented in this brief, which is compatible with standard CMOS technology. In order to reduce the temperature nonlinearity in the proposed Voltage Reference, threshold Voltage and a proportional-to-absolute-temperature Voltage form the basic linear-temperature components, which are achieved by resistorless threshold Voltage extractor and asymmetric differential difference amplifier. Moreover, a self-biased current source with feedback is used to provide stable bias currents for the whole Voltage Reference, which can improve the power-supply noise attenuation (PSNA) with reduced current mirror errors. Verification results of the proposed Voltage Reference implemented with 0.18- $\mu\text{m}$ CMOS technology demonstrate that the temperature coefficient of 14.1 ppm/°C with a temperature range of −20 °C to 80 °C is obtained at 1.35-V power supply, and a PSNA of 75.7 dB is achieved without any filtering capacitor while dissipating a maximum supply current of 880 nA. The active area is $115\ \mu\text{m}\times 130\ \mu\text{m}$ .

  • a cmos Voltage Reference based on mutual compensation of vtn and vtp
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Zekun Zhou, Huiying Wang, Xiangzhu Xu, Xin Ming, Bo Zhang
    Abstract:

    A novel temperature-stable nonbandgap Voltage Reference, which is compatible with standard CMOS technology, is presented in this brief. No diodes or parasitic bipolar transistors are used. Based on mutual temperature compensation of the threshold Voltages of nMOS and pMOS transistors, a temperature-insensitive Voltage Reference with significant reduction in temperature dependence of mobility is achieved without using subthreshold characteristics. The problem of a fixed Voltage Reference value is also avoided by different parameter design. Experimental results of the proposed Voltage Reference implemented with a 0.35-μm CMOS process demonstrate that the output of the Voltage Reference is 847.5 mV, a temperature coefficient of 11.8 ppm/°C with a temperature range from 0 °C to 130 °C is obtained at 3-V power supply, a power-supply noise attenuation of 72 dB is achieved without any filtering capacitor, and the line regulation is better than 0.185 mV/V from 1.8-V to 4.5-V supply Voltage dissipating a maximum supply current of 8 μA. The active area of the presented Voltage Reference is 90 μm ×120 μm.

Zekun Zhou - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - A Resistorless Low-Power Voltage Reference with Novel Curvature-Compensation Technique
    2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019
    Co-Authors: Zekun Zhou, Yu Hongming, Qian Junlin, Shi Yue, Bo Zhang
    Abstract:

    In this paper, a MOSFET-only Voltage Reference with novel curvature-compensation is proposed. In order to reduce the temperature coefficient in the proposed Voltage Reference, two proportional to absolute temperature Voltages with opposite second-order order TC are added on a threshold Voltage, which is achieved by a resistorless threshold Voltage extractor. Besides, self-biased current source with feedback is realized at the same time, which can provide bias current for the whole Voltage Reference and enhance the performance of generated Voltage Reference without additional power consumption. Verification results of the proposed Voltage Reference implemented with 0.35µm technology process show that the temperature coefficient is 2.4 ppm/□ with a temperature range of −20□ to 80□ is obtained, and a 62.9 dB power supply rejection ratio is achieved with a 68nA maximum supply current.

  • A Nanoscale Low-Power Resistorless Voltage Reference with High PSRR
    SpringerOpen, 2019
    Co-Authors: Zekun Zhou, Yue Shi, Zhuo Wang, Jianwen Cao, Yunkun Wang, Bo Zhang
    Abstract:

    Abstract In this paper, a nano-watt resistorless subthreshold Voltage Reference with high-power supply rejection ratio (PSRR) is presented. A self-biased MOS Voltage divider is proposed to provide bias current for whole Voltage Reference, which is a positive temperature coefficient (TC) current containing threshold Voltage characteristics. By injecting the generated current into a transistor with a different threshold Voltage, a delta threshold Voltage with a greatly reduced negative TC is realized and temperature-compensated by a generated positive TC item at the same time. Therefore, a temperature-stable Voltage Reference is achieved in the proposed compacted method with low power consumption and high PSRR. Verification results with 65-nm CMOS technology demonstrate that the minimum supply Voltage can be as low as 0.35 V with a 0.00182-mm2 active area. The generated Reference Voltage is 148 mV, with a TC of 28 ppm/°C for the − 30 to 80 °C temperature range. The line sensitivity is 1.8 mV/V, and the PSRR without any filtering capacitor at 100 Hz is 53 dB with a 2.28-nW power consumption

  • a resistorless low power Voltage Reference
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2016
    Co-Authors: Zekun Zhou, Yue Shi, Chao Gou, Xia Wang, Jiefei Feng, Zhuo Wang, Bo Zhang
    Abstract:

    A novel low-power temperature-stable Voltage Reference without resistors is presented in this brief, which is compatible with standard CMOS technology. In order to reduce the temperature nonlinearity in the proposed Voltage Reference, threshold Voltage and a proportional-to-absolute-temperature Voltage form the basic linear-temperature components, which are achieved by resistorless threshold Voltage extractor and asymmetric differential difference amplifier. Moreover, a self-biased current source with feedback is used to provide stable bias currents for the whole Voltage Reference, which can improve the power-supply noise attenuation (PSNA) with reduced current mirror errors. Verification results of the proposed Voltage Reference implemented with 0.18- $\mu\text{m}$ CMOS technology demonstrate that the temperature coefficient of 14.1 ppm/°C with a temperature range of −20 °C to 80 °C is obtained at 1.35-V power supply, and a PSNA of 75.7 dB is achieved without any filtering capacitor while dissipating a maximum supply current of 880 nA. The active area is $115\ \mu\text{m}\times 130\ \mu\text{m}$ .

  • a cmos Voltage Reference based on mutual compensation of vtn and vtp
    IEEE Transactions on Circuits and Systems Ii-express Briefs, 2012
    Co-Authors: Zekun Zhou, Huiying Wang, Xiangzhu Xu, Xin Ming, Bo Zhang
    Abstract:

    A novel temperature-stable nonbandgap Voltage Reference, which is compatible with standard CMOS technology, is presented in this brief. No diodes or parasitic bipolar transistors are used. Based on mutual temperature compensation of the threshold Voltages of nMOS and pMOS transistors, a temperature-insensitive Voltage Reference with significant reduction in temperature dependence of mobility is achieved without using subthreshold characteristics. The problem of a fixed Voltage Reference value is also avoided by different parameter design. Experimental results of the proposed Voltage Reference implemented with a 0.35-μm CMOS process demonstrate that the output of the Voltage Reference is 847.5 mV, a temperature coefficient of 11.8 ppm/°C with a temperature range from 0 °C to 130 °C is obtained at 3-V power supply, a power-supply noise attenuation of 72 dB is achieved without any filtering capacitor, and the line regulation is better than 0.185 mV/V from 1.8-V to 4.5-V supply Voltage dissipating a maximum supply current of 8 μA. The active area of the presented Voltage Reference is 90 μm ×120 μm.

Tales Cleber Pimenta - One of the best experts on this subject based on the ideXlab platform.

  • A programmable Voltage Reference optimized for power management applications
    Analog Integrated Circuits and Signal Processing, 2008
    Co-Authors: Filipe Guimarães Russo Ramos, Luís Henrique Carvalho Ferreira, Tales Cleber Pimenta
    Abstract:

    A 3-bits programmable, low drift, high PSRR and high precision Voltage Reference, optimized for Power Management (PM) applications, is presented. The topology is based on a high-performance bandgap Voltage Reference that presents a PSRR of up to 80 dB, which is required in PM applications, because they employ mixed-signal circuits, where high frequency switching noise is present. The proposed approach was successfully verified in a standard 0.35 μm CMOS process. The experimental results confirmed that, for power supply between 3.0 and 3.3 V, and temperatures in −20°C to 80°C range, the programmable output Voltage V _REF exhibits a worst case precision of ±3%.

  • A Multi-Voltage Reference Source
    2007
    Co-Authors: Filipe Guimarães Russo Ramos, L. Caldeira, Tales Cleber Pimenta
    Abstract:

    A 3 bits programmable, low drift, high PSRR and high precision Voltage Reference, optimized to power management (PM) applications, is presented. The topology is based on a high performance bandgap Voltage Reference applied to a non-inverting amplifier stage, which generates an internal Voltage Reference of 2.4V, isolated by a buffer and derived by resistor dividers, generating eight selectable output Voltages from 0 to 2.1V, chosen by an analog multiplexer. It has been successfully verified in a standard 0.35m CMOS process. The experimental results have confirmed that, for power supply of 3.0V to 3.3V, and -20oC to 80oC temperature range, the programmable output Voltage VREF has a worst case precision of plusmn3%.

  • SBCCI - A programmable Voltage Reference optimized for power management applications
    Proceedings of the 20th annual conference on Integrated circuits and systems design - SBCCI '07, 2007
    Co-Authors: Filipe Guimarães Russo Ramos, L. Caldeira, Tales Cleber Pimenta
    Abstract:

    A 3 bits programmable, low drift, high PSRR and high precision Voltage Reference, optimized to Power Management (PM) applications, is presented. The topology is based on a high performance bandgap Voltage Reference applied to a non-inverting amplifier stage, which generates an internal Voltage Reference of 2.4V, isolated by a buffer and derived by resistor dividers, generating eight selectable output Voltages from 0 to 2.1V, chosen by an analog multiplexer. It has been successfully verified in a standard 0.35µm CMOS process. The experimental results have confirmed that, for power supply of 3.0V to 3.3V, and -20oC to 80oC temperature range, the programmable output Voltage VREF has a worst case precision of ±3%.

Shi Yue - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - A Resistorless Low-Power Voltage Reference with Novel Curvature-Compensation Technique
    2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019
    Co-Authors: Zekun Zhou, Yu Hongming, Qian Junlin, Shi Yue, Bo Zhang
    Abstract:

    In this paper, a MOSFET-only Voltage Reference with novel curvature-compensation is proposed. In order to reduce the temperature coefficient in the proposed Voltage Reference, two proportional to absolute temperature Voltages with opposite second-order order TC are added on a threshold Voltage, which is achieved by a resistorless threshold Voltage extractor. Besides, self-biased current source with feedback is realized at the same time, which can provide bias current for the whole Voltage Reference and enhance the performance of generated Voltage Reference without additional power consumption. Verification results of the proposed Voltage Reference implemented with 0.35µm technology process show that the temperature coefficient is 2.4 ppm/□ with a temperature range of −20□ to 80□ is obtained, and a 62.9 dB power supply rejection ratio is achieved with a 68nA maximum supply current.

Qian Junlin - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - A Resistorless Low-Power Voltage Reference with Novel Curvature-Compensation Technique
    2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019
    Co-Authors: Zekun Zhou, Yu Hongming, Qian Junlin, Shi Yue, Bo Zhang
    Abstract:

    In this paper, a MOSFET-only Voltage Reference with novel curvature-compensation is proposed. In order to reduce the temperature coefficient in the proposed Voltage Reference, two proportional to absolute temperature Voltages with opposite second-order order TC are added on a threshold Voltage, which is achieved by a resistorless threshold Voltage extractor. Besides, self-biased current source with feedback is realized at the same time, which can provide bias current for the whole Voltage Reference and enhance the performance of generated Voltage Reference without additional power consumption. Verification results of the proposed Voltage Reference implemented with 0.35µm technology process show that the temperature coefficient is 2.4 ppm/□ with a temperature range of −20□ to 80□ is obtained, and a 62.9 dB power supply rejection ratio is achieved with a 68nA maximum supply current.