The Experts below are selected from a list of 240 Experts worldwide ranked by ideXlab platform
Mikael Ostling - One of the best experts on this subject based on the ideXlab platform.
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low temperature annealing of radiation induced degradation in 4h sic bipolar Junction Transistors
IEEE Electron Device Letters, 2010Co-Authors: Anders Hallen, Muhammad Nawaz, Carina Zaring, Muhammad Usman, Martin Domeij, Mikael OstlingAbstract:Radiation hardness is tested for 4H-SiC n-p-n bipolar Junction Transistors designed for 1200-V breakdown voltage by implanting MeV protons and carbon ions at different doses and energies. The current gain is found to be a very sensitive parameter, and a fluence as low as 1 × 107 cm-2 of 10 MeV 12C can be clearly detected in the forward-output characteristics, IC(VCE) . At this low dose, no influence of ion radiation is seen in the open-collector characteristics, IB(VEB), or the reverse bias leakage and breakdown properties. Moreover, by annealing the implanted devices at 420°C for 30 min, a complete recovery of the electrical characteristics is accomplished.
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surface passivation oxide effects on the current gain of 4h sic bipolar Junction Transistors
Applied Physics Letters, 2008Co-Authors: Hyung-seok Lee, Martin Domeij, Mikael Ostling, Carlmikael Zetterling, Fredrik Allerstam, Einar O SveinbjornssonAbstract:Effects of surface recombination on the common emitter current gain have been studied in 4H-silicon carbide (SiC) bipolar Junction Transistors (BJTs) with passivation formed by conventional dry oxidation and with passivation formed by dry oxidation in nitrous oxide (N2O) ambient. A gradual reduction of the current gain was found after removal of the passivation oxide followed by air exposure. Comparison of the measurement results for two different passivated BJTs indicates that the BJTs with passivation by dry oxidation in nitrous oxide (N2O) ambient show a half order of magnitude reduction of base current, resulting in a half order of magnitude increase of current gain at low currents. This improvement of current gain is attributed to reduced surface recombination caused by reduced interface trap densities at the base-emitter Junction sidewall.
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Electro-Thermal Simulations and Measurement of Silicon Carbide Bipolar Transistors
Materials Science Forum, 2003Co-Authors: W. Liu, Carlmikael Zetterling, Erik Danielsson, Mikael OstlingAbstract:Silicon carbide bipolar Junction Transistors were fabricated in the study reported here. Three-dimensional thermal simulations were conducted for the SiC BJTs using FEMLAB. Thermal images of a devi ...
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modeling the variation of the low frequency noise in polysilicon emitter bipolar Junction Transistors
IEEE Electron Device Letters, 2001Co-Authors: M Sanden, Jamal M Deen, O Marinov, Mikael OstlingAbstract:The variation of the low-frequency noise in polysilicon emitter bipolar Junction Transistors (BJTs) was investigated as a function of emitter area (A/sub E/). For individual BJTs with submicron-sized A/sub E/, the low-frequency noise strongly deviated from a 1/f-dependence. The averaged noise varied as 1/f, with a magnitude proportional to A/sub E//sup -1/, while the variation in the noise level was found to vary as A/sub E//sup -1.5/. A new expression that takes into account this deviation is proposed for SPICE modeling of the low-frequency noise. The traps responsible for the noise were located at the thin SiO/sub 2/ interface between the polysilicon and monosilicon emitter. The traps' energy level, areal concentration and capture cross-section were estimated to 0.31 eV, 6/spl times/10/sup 8/ cm/sup -2/ and 2/spl times/10/sup -19/ cm/sup 2/, respectively.
J A Chroboczek - One of the best experts on this subject based on the ideXlab platform.
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on noise sources in hot electron degraded bipolar Junction Transistors
Journal of Applied Physics, 1997Co-Authors: P Llinares, G Ghibaudo, J A ChroboczekAbstract:The effects of electrical stress on static characteristics and power spectral density, SIb, of base current, Ib, fluctuations at low frequencies, f<1 kHz, have been studied in quasiself-aligned bipolar n-p-n Junction. In as-fabricated devices SIb∝1/AE, where AE is the transistor emitter area, whereas in strongly degraded Transistors Sib∝1/PE, where PE is the transistor perimeter. The latter demonstrates directly that hot carrier-induced noise sources are generated at the periphery of the Transistors, in agreement with former work on hot electron-induced aging of bipolar Junction Transistors.The effects of electrical stress on static characteristics and power spectral density, SIb, of base current, Ib, fluctuations at low frequencies, f<1 kHz, have been studied in quasiself-aligned bipolar n-p-n Junction. In as-fabricated devices SIb∝1/AE, where AE is the transistor emitter area, whereas in strongly degraded Transistors Sib∝1/PE, where PE is the transistor perimeter. The latter demonstrates directly that hot carrier-induced noise sources are generated at the periphery of the Transistors, in agreement with former work on hot electron-induced aging of bipolar Junction Transistors.
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dimension scaling of 1 f noise in the base current of quasiself aligned polysilicon emitter bipolar Junction Transistors
Journal of Applied Physics, 1997Co-Authors: P Llinares, G Ghibaudo, D Celi, O Rouxditbuisson, J A ChroboczekAbstract:Experimental results on low frequency noise in quasiself-aligned bipolar n-p-n Junction Transistors, with widely varying emitter/base Junction dimensions are presented and compared with former results obtained on devices of the same type. The power spectral density of base current fluctuations was found to depend linearly on the inverse of the area of the emitter/base interface Junction, implying localization of the low frequency noise sources on the interface, rather than on the transistor perimeter. An application of current-to-voltage converters for studies of current fluctuations is also discussed and compared with a more conventional technique.
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low frequency 1 f noise model for the base current in polysilicon emitter bipolar Junction Transistors
Journal of Applied Physics, 1996Co-Authors: A Mounib, G Ghibaudo, D Pogany, A Chantre, F Balestra, J A ChroboczekAbstract:A new model for the low frequency (LF) noise in the base current of polysilicon emitter bipolar Junction Transistors (BJTs) is proposed. This model is based on the carrier number fluctuation approach and satisfactorily accounts for the base current noise characteristics. The base current fluctuations are ascribed to surface and volume noise sources. The surface noise arises from the low frequency fluctuations of the surface generation–recombination base current component due to the dynamic trapping–detrapping of carriers into/from slow states located in the spacer oxide at the periphery of the emitter/base Junction. The volume noise results from the intrinsic fluctuations of the diffusion base current due to the carrier number fluctuations in the emitter or at the emitter–base Junction. This LF noise model has been applied to BJTs subjected to hot carrier stress after reverse biasing of the base–emitter Junction. The evolution of the base current noise characteristics after stress clearly demonstrates tha...
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origin of large amplitude random telegraph signal in silicon bipolar Junction Transistors after hot carrier degradation
Applied Physics Letters, 1996Co-Authors: D Pogany, J A Chroboczek, A Chantre, G GhibaudoAbstract:The random telegraph signal (RTS) with a relative amplitude of up to 100% has been observed in the forward and reverse base current in polycrystalline emitter bipolar Junction Transistors after hot carrier degradation. The RTS is explained by modulations in the surface generation‐recombination rate due to fluctuations in the capture cross section of two‐state interface centers. Carrier trapping/emission on slow oxide traps and/or defect reconfiguration are assumed to be responsible for the cross‐section fluctuations
Anant K. Agarwal - One of the best experts on this subject based on the ideXlab platform.
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Transient processes in high-voltage silicon carbide bipolar-Junction Transistors
Semiconductors, 2013Co-Authors: V. S. Yuferev, Qing Chun Jon Zhang, Anant K. Agarwal, Michael E. Levinshtein, Pavel Ivanov, John W. PalmourAbstract:The specific features of transient processes in high-voltage silicon carbide bipolar-Junction Transistors are studied theoretically and experimentally. It is shown that, in good agreement with the experimental results, the switch-off from the active mode can be described in a wide temperature range by the simple analytical expression derived in the study. The process in which a transistor is switched on to pass into the active mode is well described by a simple exponential dependence. The time constant of the switch-on process is determined by the average value of the collector capacitance before and after switch-on. A numerical model is suggested, based on a simple and physically transparent equivalent circuit describing, in good agreement with the experiment, both the transient processes of switch-on and switch-off in a SiC bipolar Junction transistor, in both the active and saturation modes.
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10 kV, 10 A Bipolar Junction Transistors and Darlington Transistors on 4H-SiC
Materials Science Forum, 2010Co-Authors: Qing Chun Jon Zhang, Robert Callanan, Anant K. Agarwal, Albert A. Burk, Michael J. O'loughlin, John W. Palmour, Charles ScozzieAbstract:4H-SiC Bipolar Junction Transistors (BJTs) and hybrid Darlington Transistors with 10 kV/10 A capability have been demonstrated for the first time. The SiC BJT (chip size: 0.75 cm2 with an active area of 0.336 cm2) conducts a collector current of 10 A (~ 30 A/cm2) with a forward voltage drop of 4.0 V (forced current gain βforced: 20) corresponding to a specific on-resistance of ~ 130 mΩ•cm2 at 25°C. The DC current gain, β, at a collector voltage of 15 V is measured to be 28 at a base current of 1 A. Both open emitter breakdown voltage (BVCBO) and open base breakdown voltage (BVCEO) of ~10 kV have been achieved. The 10 kV SiC Darlington transistor pair consists of a 10 A SiC BJT as the output device and a 1 A SiC BJT as the driver. The forward voltage drop of 4.5 V is measured at 10 A of collector current. The DC forced current gain at the collector voltage of 5.0 V was measured to be 440 at room temperature.
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Comparison of High Temperature Operation of Silicon Carbide MOSFETs and Bipolar Junction Transistors
2010Co-Authors: Jim Richmond, Anant K. Agarwal, Albert A. Burk, Qingchun Zhang, Sei-hyung Ryu, Brett Hull, Mrinal K. Das, John W. PalmourAbstract:Power devices based on Silicon Carbide (SiC) have unmatched potential for extending the operational temperature range of power electronics well past what is possible with silicon devices. SiC JBS diodes are already demonstrating part of that potential but the full benefit will not be realized until a SiC power switch is available. Recently, normally off SiC unipolar and bipolar switching devices have become available with the manufacture of 1200V, 20A MOSFETs and 1200V, 20A bipolar Junction Transistors (BJT). While both of these device types have undergone considerable study, most of this characterization has been conducted in the normal commercial temperature range which has an upper limit of 150 – 175°C. The SiC BJT is considered to be a superior device for high temperature operation due to its lower on-state voltage and increased reliability due to it not having a gate oxide. As presented, the advantages of the SiC BJT over the SiC MOSFET are not as great as expected and may not warrant the increased c...
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1200 v 4h sic bipolar Junction Transistors with a record β of 70
Journal of Electronic Materials, 2008Co-Authors: C. Jonas, Robert Callanan, Anant K. Agarwal, Qingchun Zhang, Bruce Geil, Craig Capell, Al Burk, Charles ScozzieAbstract:A common current gain of 70 has been achieved in 4H-SiC bipolar Junction Transistors (BJTs) at room temperature, which is the highest among those reported. BJTs having an active area of 4 mm × 4 mm exhibit a specific on-resistance of 6.3 mΩ cm2 at 25°C, which increases to 17.4 mΩ cm2 at 250°C. BVCEO (the breakdown voltage from collector to emitter with open base) and BVCBO (the breakdown voltage from collector to base with open emitter) of 1200 V were observed at <5 μA leakage currents at all temperatures up to 250°C. Dynamic characteristics were measured using the IXYS RF/Directed Energy IXDD415 gate driver evaluation board to drive the BJT. A collector current (I C) rise time at turn-on of 32 ns was measured with a 1.6 A gate current provided to support the collector current of 63 A. An I C fall time at turn-off of 16 ns was achieved.
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Degradation Mechanisms in SiC Bipolar Junction Transistors
2008 Device Research Conference, 2008Co-Authors: Qingchun Zhang, Anant K. Agarwal, C. Jonas, Peter G. Muzykov, Tangali S. Sudarshan, Bruce Geil, Charles ScozzieAbstract:SiC power bipolar Junction Transistors (BJTs) are believed to have the potential of operating reliably at much higher Junction temperatures as compared to SiC MOSFETs. The obstacle for commercialization of SiC BJTs is the presence of degradation in both on-resistance and current gain, first detected by Agarwal et al. The recombination-induced stacking faults (SFs) were a prime suspect but no clear experimental proof was provided. In this paper, for the first time, we provide an experimental evidence of the recombination- induced SFs in SiC BJTs, and correlation with device characteristics.
G Ghibaudo - One of the best experts on this subject based on the ideXlab platform.
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on noise sources in hot electron degraded bipolar Junction Transistors
Journal of Applied Physics, 1997Co-Authors: P Llinares, G Ghibaudo, J A ChroboczekAbstract:The effects of electrical stress on static characteristics and power spectral density, SIb, of base current, Ib, fluctuations at low frequencies, f<1 kHz, have been studied in quasiself-aligned bipolar n-p-n Junction. In as-fabricated devices SIb∝1/AE, where AE is the transistor emitter area, whereas in strongly degraded Transistors Sib∝1/PE, where PE is the transistor perimeter. The latter demonstrates directly that hot carrier-induced noise sources are generated at the periphery of the Transistors, in agreement with former work on hot electron-induced aging of bipolar Junction Transistors.The effects of electrical stress on static characteristics and power spectral density, SIb, of base current, Ib, fluctuations at low frequencies, f<1 kHz, have been studied in quasiself-aligned bipolar n-p-n Junction. In as-fabricated devices SIb∝1/AE, where AE is the transistor emitter area, whereas in strongly degraded Transistors Sib∝1/PE, where PE is the transistor perimeter. The latter demonstrates directly that hot carrier-induced noise sources are generated at the periphery of the Transistors, in agreement with former work on hot electron-induced aging of bipolar Junction Transistors.
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dimension scaling of 1 f noise in the base current of quasiself aligned polysilicon emitter bipolar Junction Transistors
Journal of Applied Physics, 1997Co-Authors: P Llinares, G Ghibaudo, D Celi, O Rouxditbuisson, J A ChroboczekAbstract:Experimental results on low frequency noise in quasiself-aligned bipolar n-p-n Junction Transistors, with widely varying emitter/base Junction dimensions are presented and compared with former results obtained on devices of the same type. The power spectral density of base current fluctuations was found to depend linearly on the inverse of the area of the emitter/base interface Junction, implying localization of the low frequency noise sources on the interface, rather than on the transistor perimeter. An application of current-to-voltage converters for studies of current fluctuations is also discussed and compared with a more conventional technique.
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low frequency 1 f noise model for the base current in polysilicon emitter bipolar Junction Transistors
Journal of Applied Physics, 1996Co-Authors: A Mounib, G Ghibaudo, D Pogany, A Chantre, F Balestra, J A ChroboczekAbstract:A new model for the low frequency (LF) noise in the base current of polysilicon emitter bipolar Junction Transistors (BJTs) is proposed. This model is based on the carrier number fluctuation approach and satisfactorily accounts for the base current noise characteristics. The base current fluctuations are ascribed to surface and volume noise sources. The surface noise arises from the low frequency fluctuations of the surface generation–recombination base current component due to the dynamic trapping–detrapping of carriers into/from slow states located in the spacer oxide at the periphery of the emitter/base Junction. The volume noise results from the intrinsic fluctuations of the diffusion base current due to the carrier number fluctuations in the emitter or at the emitter–base Junction. This LF noise model has been applied to BJTs subjected to hot carrier stress after reverse biasing of the base–emitter Junction. The evolution of the base current noise characteristics after stress clearly demonstrates tha...
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origin of large amplitude random telegraph signal in silicon bipolar Junction Transistors after hot carrier degradation
Applied Physics Letters, 1996Co-Authors: D Pogany, J A Chroboczek, A Chantre, G GhibaudoAbstract:The random telegraph signal (RTS) with a relative amplitude of up to 100% has been observed in the forward and reverse base current in polycrystalline emitter bipolar Junction Transistors after hot carrier degradation. The RTS is explained by modulations in the surface generation‐recombination rate due to fluctuations in the capture cross section of two‐state interface centers. Carrier trapping/emission on slow oxide traps and/or defect reconfiguration are assumed to be responsible for the cross‐section fluctuations
Ranbir Singh - One of the best experts on this subject based on the ideXlab platform.
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improvement of the current gain stability of sic Junction Transistors
Materials Science Forum, 2015Co-Authors: Siddarth Sundaresan, Brian Grummel, Dean P Hamilton, Ranbir SinghAbstract:SiC Junction Transistors (SJTs) with 1900 V Drain-Source breakdown voltages, current gain (hFE) higher than 120 and low on-resistance of 22 mΩ (3.5 mΩ-cm2) are reported in this paper. SJTs with a pre-stress hFE of 90 suffer only a 10% reduction of the hFE after 190 hours under a 200 A/cm2 DC current stress at a TJ of 125°C, while a similar stress on earlier generation SJTs resulted in over 25% hFE reduction in only 25 hours. SJT die with pre-stress hFE in the range of 120-125 show absolutely no current gain degradation even after a 300°C/ 2 hour stress at 60 A/cm2 DC drain current.
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Silicon Carbide Junction Transistors and Schottky Rectifiers optimized for 250°C operation
MRS Online Proceedings Library, 2014Co-Authors: Siddarth Sundaresan, Brian Grummel, Ranbir SinghAbstract:Electrical performance and reliability of SiC Junction Transistors (SJTs) and Schottky rectifiers are presented. The 650 V/50 A-rated SiC SJTs feature current gains (β) up to 110 at room-temperature, 70 at 250°C, and stable breakdown characteristics. Single current pulse measurements indicate an almost invariant β up to 800 A/cm^2 at 175°C–a measure of the SOA boundary for pulsed current SJT operation. Lower than 5 mA/cm^2 leakage currents are measured on the SJTs at the rated blocking voltage and at 250°C. 1200 V Schottky rectifiers designed for high-temperature operation display < 3 mA/cm^2 leakage currents up to 250°C. A 10x reduction in leakage current and 23% reduction in Junction capacitance are observed when compared to the nearest competitor. The high-temperature Schottky rectifiers and SJTs display stable breakdown voltages and on-state characteristics after long-term HTRB stressing. A significant improvement in current gain stability is achieved by fine-tuning the fabrication process.
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rapidly maturing sic Junction Transistors featuring current gain β 130 blocking voltages up to 2700 v and stable long term operation
Materials Science Forum, 2014Co-Authors: Siddarth Sundaresan, Brian Grummel, Stoyan Jeliazkov, Ranbir SinghAbstract:SiC npn Junction Transistors (SJTs) with current gains as high as 132, low on-resistance of 4 mΩ-cm2, and minimal emitter-size effect are demonstrated with blocking voltages > 600 V. 2400 V-class SJTs feature blocking voltages as high as 2700 V combined with on-resistance as low as 5.5 mΩ-cm2. A significant improvement in the current gain stability under long-term high current stress is achieved for the SJTs fabricated by the high gain process.
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Stability of Electrical Characteristics of SiC “Super” Junction Transistors under Long-Term DC and Pulsed Operation at various Temperatures
MRS Online Proceedings Library, 2012Co-Authors: Siddarth G. Sundaresan, Aye-mya Soe, Ranbir SinghAbstract:The reliability of the electrical characteristics of SiC “Super” Junction Transistors (SJTs) is investigated under long-term avalanche-mode, DC and pulsed-current operation. There is absolutely no change in the blocking I-V characteristics after a 934 hour repetitive avalanche stress test. Long-term operation of the Gate-Source diode (open-Drain mode) alone does not result in any degradation of the on-state voltage drop (V_F) or current gain (β). Long-term operation in common-Source mode results in negligible V_F or β degradation, if the base-plate is maintained at 25 °C. A greater degradation of β results with increasing base-plate temperature. The same total electrical charge, if passed through the SJT as a pulsed current instead of a DC current results in a smaller β reduction. It is also shown that this β degradation can be reversed by annealing at ≥ 200 °C, suggesting the possibility of degradation-free operation of SiC SJTs, when operating in pulsed current mode at ≥ 200 °C temperatures.
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1800 v npn bipolar Junction Transistors in 4h sic
IEEE Electron Device Letters, 2001Co-Authors: Sei-hyung Ryu, Anant K. Agarwal, Ranbir Singh, J W PalmourAbstract:The first high voltage npn bipolar Junction Transistors (BJTs) in 4H-SiC have been demonstrated. The BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 m/spl Omega//spl middot/cm/sup 2/ at room temperature (I/sub C/=2.7 A @ V/sub CE/=2 V for a 1 mm/spl times/1.4 mm active area), which outperforms all SiC power switching devices reported to date. Temperature-stable current gain was observed for these devices. This is due to the higher percent ionization of the deep level acceptor atoms in the base region at elevated temperatures, which offsets the effects of increased minority carrier lifetime at high temperatures. These Transistors show a positive temperature coefficient in the on-resistance characteristics, which will enable easy paralleling of the devices.
