The Experts below are selected from a list of 6315 Experts worldwide ranked by ideXlab platform
D.e. Culler - One of the best experts on this subject based on the ideXlab platform.
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ICCAD - System software techniques for Low-Power Operation in wireless sensor networks
ICCAD-2005. IEEE ACM International Conference on Computer-Aided Design 2005., 2005Co-Authors: Prabal Dutta, D.e. CullerAbstract:The Operation of wireless sensor networks is fundamentally constrained by available energy sources. The underlying hardware determines the Power draw of each possible mode of Operation. System software attempts maximize the use of the Lowest possible modes of each of the subsystems. This tutorial paper describes the system software techniques used at several levels. At the application sensing level, this includes duty-cycling, sensor hierarchy, and aggregation. At the communication level, it includes Low-Power listening, communication scheduling, piggybacking, post-hoc synchronization, and Power-aware routing. At the node OS level, it includes event driven execution with split-phase Operation and cooperative Power management interfaces. At the Lowest level, it includes management of primary and secondary energy storage devices coupled with intelligent charge transfer scheduling. All of these aspects must be integrated in a systematic software framework.
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System software techniques for Low-Power Operation in wireless sensor networks
ICCAD-2005. IEEE ACM International Conference on Computer-Aided Design 2005., 2005Co-Authors: P.k. Dutta, D.e. CullerAbstract:The Operation of wireless sensor networks is fundamentally constrained by available energy sources. The underlying hardware determines the Power draw of each possible mode of Operation. System software attempts maximize the use of the Lowest possible modes of each of the subsystems. This tutorial paper describes the system software techniques used at several levels. At the application sensing level, this includes duty-cycling, sensor hierarchy, and aggregation. At the communication level, it includes Low-Power listening, communication scheduling, piggybacking, post-hoc synchronization, and Power-aware routing. At the node OS level, it includes event driven execution with split-phase Operation and cooperative Power management interfaces. At the Lowest level, it includes management of primary and secondary energy storage devices coupled with intelligent charge transfer scheduling. All of these aspects must be integrated in a systematic software framework.
Ali Afzali-kusha - One of the best experts on this subject based on the ideXlab platform.
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Subthreshold Pass Transistor Logic for Ultra-Low Power Operation
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007Co-Authors: Vahid Moalemi, Ali Afzali-kushaAbstract:In this paper, we investigate subthreshold pass-transistor logics for ultra-Low-Power applications. The performance characteristics of different pass-transistor XOR structures operating in the subthreshold region have been compared in 65nm and 90nm technologies. The results of the simulations show that the subthreshold logics have some advantages compared to their strong inversion counterparts. The study includes both normal subthreshold pass-transistor logic (sub-PT) and dynamic threshold pass-transistor logic (sub-DTPT). When compared to the former, the latter logic reveals Lower sensitivities to temperature and process variations.
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ISVLSI - Subthreshold Pass Transistor Logic for Ultra-Low Power Operation
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007Co-Authors: Vahid Moalemi, Ali Afzali-kushaAbstract:In this paper, we investigate subthreshold pass-transistor logics for ultra-Low-Power applications. The performance characteristics of different pass-transistor XOR structures operating in the subthreshold region have been compared in 65nm and 90nm technologies. The results of the simulations show that the subthreshold logics have some advantages compared to their strong inversion counterparts. The study includes both normal subthreshold pass-transistor logic (sub-PT) and dynamic threshold pass-transistor logic (sub-DTPT). When compared to the former, the latter logic reveals Lower sensitivities to temperature and process variations.
P.k. Dutta - One of the best experts on this subject based on the ideXlab platform.
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System software techniques for Low-Power Operation in wireless sensor networks
ICCAD-2005. IEEE ACM International Conference on Computer-Aided Design 2005., 2005Co-Authors: P.k. Dutta, D.e. CullerAbstract:The Operation of wireless sensor networks is fundamentally constrained by available energy sources. The underlying hardware determines the Power draw of each possible mode of Operation. System software attempts maximize the use of the Lowest possible modes of each of the subsystems. This tutorial paper describes the system software techniques used at several levels. At the application sensing level, this includes duty-cycling, sensor hierarchy, and aggregation. At the communication level, it includes Low-Power listening, communication scheduling, piggybacking, post-hoc synchronization, and Power-aware routing. At the node OS level, it includes event driven execution with split-phase Operation and cooperative Power management interfaces. At the Lowest level, it includes management of primary and secondary energy storage devices coupled with intelligent charge transfer scheduling. All of these aspects must be integrated in a systematic software framework.
N.g. Durdle - One of the best experts on this subject based on the ideXlab platform.
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Noncomplementary BiCMOS logic and CMOS logic for Low-voltage, Low-Power Operation-a comparative study
IEEE Journal of Solid-State Circuits, 1998Co-Authors: M. Margala, N.g. DurdleAbstract:This paper presents results of a comprehensive comparative study of six bipolar complementary metal-oxide-semiconductor (BiCMOS) noncomplementary logic design styles and two CMOS logic styles for Low-voltage, Low-Power Operation. These logic styles have been compared for switching Power consumption and Power efficiency (Power-delay product). The examination offers two alternative approaches never used in other comparative studies. First, all BiCMOS-based styles are compared to Low-Power CMOS styles as opposed to a single conventional static CMOS style. Second, a Low-Power methodology has been used as opposed to performance methodology referred to in the previous logic comparisons. The styles examined are bootstrapped BiCMOS, bootstrapped full-swing BiCMOS, bootstrapped bipolar CMOS, Seng-Rofail's bootstrapped BiCMOS, modified full-swing BiCMOS, dynamic full-swing BiCMOS, double pass-transistor CMOS, and inverter-based CMOS. These design styles have been compared at various Power supply voltages (0.9-3 V), with various output load capacitances (0.1-1 pF) at the frequency 50 MHz and temperature 27/spl deg/C. The results clearly show which logic style is the most beneficial for which specific conditions.
Vahid Moalemi - One of the best experts on this subject based on the ideXlab platform.
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Subthreshold Pass Transistor Logic for Ultra-Low Power Operation
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007Co-Authors: Vahid Moalemi, Ali Afzali-kushaAbstract:In this paper, we investigate subthreshold pass-transistor logics for ultra-Low-Power applications. The performance characteristics of different pass-transistor XOR structures operating in the subthreshold region have been compared in 65nm and 90nm technologies. The results of the simulations show that the subthreshold logics have some advantages compared to their strong inversion counterparts. The study includes both normal subthreshold pass-transistor logic (sub-PT) and dynamic threshold pass-transistor logic (sub-DTPT). When compared to the former, the latter logic reveals Lower sensitivities to temperature and process variations.
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ISVLSI - Subthreshold Pass Transistor Logic for Ultra-Low Power Operation
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007Co-Authors: Vahid Moalemi, Ali Afzali-kushaAbstract:In this paper, we investigate subthreshold pass-transistor logics for ultra-Low-Power applications. The performance characteristics of different pass-transistor XOR structures operating in the subthreshold region have been compared in 65nm and 90nm technologies. The results of the simulations show that the subthreshold logics have some advantages compared to their strong inversion counterparts. The study includes both normal subthreshold pass-transistor logic (sub-PT) and dynamic threshold pass-transistor logic (sub-DTPT). When compared to the former, the latter logic reveals Lower sensitivities to temperature and process variations.
