The Experts below are selected from a list of 474 Experts worldwide ranked by ideXlab platform

J.m. Slaughter - One of the best experts on this subject based on the ideXlab platform.

  • Magnetoresistive random access Memory
    Proceedings of the IEEE, 2016
    Co-Authors: Dmytro Apalkov, B Dieny, J.m. Slaughter
    Abstract:

    In this paper, a review of the developments in MRAM technology over the past 20 years is presented. The various MRAM generations are described with a particular focus on spin-transfer torque MRAM (STT-MRAM) which is currently receiving the greatest attention. The working principles of these various MRAM generations, the status of their developments, and demonstrations of working circuits, including already commercialized MRAM products, are discussed.

  • Magnetoresistive Random Access Memory
    2010
    Co-Authors: M. Durlam, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, B. Butcher, P. Naji, B. Engel, N. Rizzo, C. Tracy
    Abstract:

    A low power 1Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25mm 2 1Mb MRAM circuit operates with address access times of less than 50ns, consuming 24mW at 3.0V and 20MHz. The circuit is fabricated in a 0.6µm CMOS process utilizing five layers of metal and two layers of poly

  • low power switching in Magnetoresistive random access Memory bits using enhanced permeability dielectric films
    Applied Physics Letters, 2007
    Co-Authors: Srinivas V Pietambaram, J.m. Slaughter, Nicholas D Rizzo, R W Dave, J Goggin, K Smith, S Tehrani
    Abstract:

    We reduced the switching field (Hsw) in arrays of single-layer Magnetoresistive random access Memory elements using enhanced permeability dielectric (EPD) films. This reduction is due to an increased magnetic flux density produced at the bit by increasing the permeability μ of the surrounding dielectric. The authors produced EPD films by embedding superparamagnetic nanoparticles of various sizes in oxides of Al, Mg, or Si. For bits surrounded by EPD, Hsw decreased linearly as μ increased. Using this approach, we reduced Hsw by ≈40% for μ=3.5, without changing the energy barrier to magnetization reversal.

  • MgO-based tunnel junction material for high-speed toggle magnetic random access Memory
    IEEE Transactions on Magnetics, 2006
    Co-Authors: R W Dave, M. Deherrera, J.m. Slaughter, G. Grynkewich, Srinivas V Pietambaram, K Smith, J. Åkerman, G. Steiner, B. Craigo, S Tehrani
    Abstract:

    We report the first demonstration of a Magnetoresistive random access Memory (MRAM) circuit incorporating MgO-based magnetic tunnel junction (MTJ) material for higher performance. We compare our results to those of AlOx-based devices, and we discuss the MTJ process optimization and material changes that made the demonstration possible.We present data on key MTJ material attributes for different oxidation processes and free-layer alloys, including resistance distributions, bias dependence, free-layer magnetic properties, interlayer coupling, breakdown voltage, and thermal endurance. A tunneling magnetoresistance (TMR) greater than 230% was achieved with CoFeB free layers and greater than 85% with NiFe free layers. Although the TMR with NiFe is at the low end of our MgO comparison, even this MTJ material enables faster access times, since its TMR is almost double that of a similar structure with an AlOx barrier. Bit-to-bit resistance distributions are somewhat wider for MgO barriers, with sigma about 1.5% compared to about 0.9% for AlOx. The read access time of our 4 Mb toggle MRAM circuit was reduced from 21 ns with AlOx to a circuit-limited 17 ns with MgO.

  • Magnetoresistive random access Memory using magnetic tunnel junctions
    Proceedings of the IEEE, 2003
    Co-Authors: S Tehrani, M. Durlam, M. Deherrera, J.m. Slaughter, B.n. Engel, Nicholas D Rizzo, J Janesky, J Salter, R W Dave, Brian R Butcher
    Abstract:

    Magnetoresistive random access Memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other Memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other Magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the Memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit Memory chip. Important Memory attributes are compared between MRAM and other Memory technologies.

S Tehrani - One of the best experts on this subject based on the ideXlab platform.

  • low power switching in Magnetoresistive random access Memory bits using enhanced permeability dielectric films
    Applied Physics Letters, 2007
    Co-Authors: Srinivas V Pietambaram, J.m. Slaughter, Nicholas D Rizzo, R W Dave, J Goggin, K Smith, S Tehrani
    Abstract:

    We reduced the switching field (Hsw) in arrays of single-layer Magnetoresistive random access Memory elements using enhanced permeability dielectric (EPD) films. This reduction is due to an increased magnetic flux density produced at the bit by increasing the permeability μ of the surrounding dielectric. The authors produced EPD films by embedding superparamagnetic nanoparticles of various sizes in oxides of Al, Mg, or Si. For bits surrounded by EPD, Hsw decreased linearly as μ increased. Using this approach, we reduced Hsw by ≈40% for μ=3.5, without changing the energy barrier to magnetization reversal.

  • MgO-based tunnel junction material for high-speed toggle magnetic random access Memory
    IEEE Transactions on Magnetics, 2006
    Co-Authors: R W Dave, M. Deherrera, J.m. Slaughter, G. Grynkewich, Srinivas V Pietambaram, K Smith, J. Åkerman, G. Steiner, B. Craigo, S Tehrani
    Abstract:

    We report the first demonstration of a Magnetoresistive random access Memory (MRAM) circuit incorporating MgO-based magnetic tunnel junction (MTJ) material for higher performance. We compare our results to those of AlOx-based devices, and we discuss the MTJ process optimization and material changes that made the demonstration possible.We present data on key MTJ material attributes for different oxidation processes and free-layer alloys, including resistance distributions, bias dependence, free-layer magnetic properties, interlayer coupling, breakdown voltage, and thermal endurance. A tunneling magnetoresistance (TMR) greater than 230% was achieved with CoFeB free layers and greater than 85% with NiFe free layers. Although the TMR with NiFe is at the low end of our MgO comparison, even this MTJ material enables faster access times, since its TMR is almost double that of a similar structure with an AlOx barrier. Bit-to-bit resistance distributions are somewhat wider for MgO barriers, with sigma about 1.5% compared to about 0.9% for AlOx. The read access time of our 4 Mb toggle MRAM circuit was reduced from 21 ns with AlOx to a circuit-limited 17 ns with MgO.

  • Magnetoresistive random access Memory using magnetic tunnel junctions
    Proceedings of the IEEE, 2003
    Co-Authors: S Tehrani, M. Durlam, M. Deherrera, J.m. Slaughter, B.n. Engel, Nicholas D Rizzo, J Janesky, J Salter, R W Dave, Brian R Butcher
    Abstract:

    Magnetoresistive random access Memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other Memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other Magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the Memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit Memory chip. Important Memory attributes are compared between MRAM and other Memory technologies.

  • thermally activated magnetization reversal in submicron magnetic tunnel junctions for Magnetoresistive random access Memory
    Applied Physics Letters, 2002
    Co-Authors: Nicholas D Rizzo, M. Deherrera, J.m. Slaughter, B.n. Engel, J Janesky, S Tehrani
    Abstract:

    We have measured thermally activated magnetization reversal of the free layers in submicron magnetic tunnel junctions to be used for Magnetoresistive random access Memory. We applied magnetic field pulses to the bits with a pulse duration tp ranging from nanoseconds to 0.1 ms. We have measured the switching probability as a function of tp with a fixed field amplitude H, and as a function of H for fixed tp. For both cases, we find good agreement with the switching probability predicted by the Arrhenius–Neel theory for thermal activation over a single energy barrier.

  • recent developments in magnetic tunnel junction mram
    IEEE International Magnetics Conference, 2000
    Co-Authors: S Tehrani, M. Deherrera, J.m. Slaughter, Peter K Naji, Eugene Youjun Chen, J Janesky, M. Durlam, Bradley N Engel, Renu Whig, J. Calder
    Abstract:

    We summarize our progress on Magnetoresistive Random Access Memory (MRAM) based on Magnetic Tunnel Junctions (MTJ). We have demonstrated MTJ material in the 1-1000 k/spl Omega/-/spl mu/m/sup 2/ range with MR values above 40%. The switching characteristics are mainly governed by the magnetic shape anisotropy that arises from the element boundaries. The switching repeatability, as well as hard axis selectability, are shown to be dependent on both shape and aspect ratio. MTJ Memory elements were successfully integrated with 0.6 /spl mu/m CMOS technology, achieving read and program address access times of 14 ns in a 256/spl times/2 MRAM.

Shinji Yuasa - One of the best experts on this subject based on the ideXlab platform.

  • giant magnetoresistance in perpendicularly magnetized synthetic antiferromagnetic coupling with ir spacer
    AIP Advances, 2018
    Co-Authors: Akio Fukushima, Hitoshi Kubota, Atsushi Sugihara, Kay Yakushiji, Tomohiro Taniguchi, Shinji Yuasa
    Abstract:

    Perpendicularly magnetized magnetic tunnel junction (p-MTJ) is a key element for developing high-density spin-transfer torque switching Magnetoresistive random access Memory. Recently, a large exchange coupling (IEC) in the synthetic antiferromagnetic reference layer with Ir interlayer was observed in p-MTJs. The evaluation of the IEC is, however, difficult due to the electrostatic breakdown of MTJs. This study demonstrates the evaluation of the IEC with Ir interlayer in giant Magnetoresistive (GMR) nanopillar. We fabricated three kinds of perpendicularly magnetized GMR elements; bottom-free structures with Cu or Ir spacer, and top-free structure with Ir spacer. The magnetoresistance (RH) loops of all samples show sharp changes of the magnetoresistance at the magnetic fields over ±10 kOe, indicating the existence of the large IECs. In particular, a sharp change of the magnetoresistance at the field over ±20 kOe was found for the element with Cu of 2 nm thickness.

  • reduction in write error rate of voltage driven dynamic magnetization switching by improving thermal stability factor
    Applied Physics Letters, 2017
    Co-Authors: Yoichi Shiota, Akio Fukushima, Hitoshi Kubota, Shinji Yuasa, Yoshishige Suzuki, Takayuki Nozaki, Shingo Tamaru, Kay Yakushiji
    Abstract:

    In this study, we demonstrate voltage-driven dynamic magnetization switching for the write error rate (WER) of the order of 10−5. The largest voltage effect on the perpendicular magnetic anisotropy in Ta/(CoxFe100–x)80B20/MgO structure (x = 0, 10, 31, 51) is obtained for x = 31 after annealing at 250 °C. Based on investigations using perpendicularly magnetized magnetic tunnel junctions that have different (Co31Fe69)80B20 free layer thicknesses, we demonstrate that the improvement in the thermal stability factor is important to reduce the WER. Our results will facilitate the design of highly reliable, voltage–torque, Magnetoresistive random access Memory.

  • very strong antiferromagnetic interlayer exchange coupling with iridium spacer layer for perpendicular magnetic tunnel junctions
    Applied Physics Letters, 2017
    Co-Authors: Kay Yakushiji, Akio Fukushima, Hitoshi Kubota, Atsushi Sugihara, Shinji Yuasa
    Abstract:

    We systematically studied the interlayer exchange coupling (IEC) in a perpendicular synthetic antiferromagnetically coupled structure having an Ir spacer layer for perpendicular magnetic tunnel junctions (p-MTJs). We found a broader peak in IEC energy density (Jex) versus spacer thickness (tIr) compared with the case of using a Ru spacer. The highest IEC energy density was 2.6 erg/cm2 at a tIr of about 5 nm. The p-MTJ nanopillars had a high magnetoresistance ratio (131%) as well as a high spin-transfer torque (STT) switching efficiency (about 2). An Ir spacer can be used to make a stable reference layer for STT Magnetoresistive random access Memory.

  • ultralow voltage spin transfer switching in perpendicularly magnetized magnetic tunnel junctions with synthetic antiferromagnetic reference layer
    Applied Physics Express, 2013
    Co-Authors: Kay Yakushiji, Akio Fukushima, Hitoshi Kubota, Makoto Konoto, Shinji Yuasa
    Abstract:

    We developed top-free-type perpendicularly magnetized magnetic tunnel junctions (p-MTJs) with a synthetic antiferromagnetic (SAF) bottom reference layer consisting of [Co/Pt] superlattice and Ru spacer layers. We successfully demonstrated practical properties such as a low resistance–area (RA) product (<3 Ω µm2), ultralow writing voltage (<200 mV) for spin-transfer-torque (STT) switching, and high annealing stability (up to 350 °C) in the same p-MTJ cells. Moreover, the p-MTJs showed clear bi-stable states even at zero external magnetic fields, thanks to the low stray field from the SAF structure. The results are promising for both high integration and ultralow-voltage operation of STT Magnetoresistive random access Memory (MRAM).

  • evaluation of spin transfer switching in cofeb mgo cofeb magnetic tunnel junctions
    Japanese Journal of Applied Physics, 2005
    Co-Authors: Hitoshi Kubota, Akio Fukushima, K Ando, Shinji Yuasa, Y Ootani, Hiroki Maehara, Koji Tsunekawa, David D Djayaprawira, Naoki Watanabe
    Abstract:

    Current-induced magnetization switching was demonstrated on Co–Fe–B/MgO/Co–Fe–B magnetic tunnel junctions (MTJs), which exhibited giant tunnel magnetoresistance ratios of about 100%. Switching current density at a pulse duration of 100 ms was about 6×106 A/cm2 at room temperature. The switching current density was reduced to one-third of the smallest value for the MgO-based MTJs reported to date. Dependence of the switching current on pulse duration and on the external magnetic field was discussed based on a theoretical model incorporating thermally activated spin-transfer switching. The spin-transfer switching in the MgO-based MTJs realizes low writing power consumption and a high read-out signal in high-density Magnetoresistive random access Memory.

M. Durlam - One of the best experts on this subject based on the ideXlab platform.

  • Magnetoresistive Random Access Memory
    2010
    Co-Authors: M. Durlam, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, B. Butcher, P. Naji, B. Engel, N. Rizzo, C. Tracy
    Abstract:

    A low power 1Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25mm 2 1Mb MRAM circuit operates with address access times of less than 50ns, consuming 24mW at 3.0V and 20MHz. The circuit is fabricated in a 0.6µm CMOS process utilizing five layers of metal and two layers of poly

  • A 4-mb toggle MRAM based on a novel bit and switching method
    2005
    Co-Authors: B.n. Engel, M. Durlam, M. Deherrera, G. Grynkewich, B. Butcher, J Janesky, R W Dave, Srinivas V Pietambaram, J. Åkerman, N.d. Rizzo
    Abstract:

    Abstract—A 4-Mb Magnetoresistive random access Memory (MRAM) with a novel magnetic bit cell and toggle switching mode is presented. The circuit was designed in a five level metal, 0.18- m complementary metal–oxide–semiconductor process with a bit cell size of 1.55 m2. The new bit cell uses a balanced synthetic antiferromagnetic free layer and a phased write pulse sequence to provide robust switching performance with immunity from half-select disturbs. This switching mode greatly improves the operational performance of the MRAM as compared to conven-tional MRAM. A detailed description of this 4-Mb toggle MRAM is presented. Index Terms—Magnetic film memories, magnetic tunnel junc-tion, Magnetoresistive device, Magnetoresistive random access Memory (MRAM), micromagnetic switching, MRAM integration, random access memories (RAMs). I

  • Magnetoresistive random access Memory using magnetic tunnel junctions
    Proceedings of the IEEE, 2003
    Co-Authors: S Tehrani, M. Durlam, M. Deherrera, J.m. Slaughter, B.n. Engel, Nicholas D Rizzo, J Janesky, J Salter, R W Dave, Brian R Butcher
    Abstract:

    Magnetoresistive random access Memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other Memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other Magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the Memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit Memory chip. Important Memory attributes are compared between MRAM and other Memory technologies.

  • A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
    IEEE Journal of Solid-State Circuits, 2003
    Co-Authors: M. Durlam, P.j. Naji, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, B.n. Engel, N.d. Rizzo, G. Grynkewich, B. Butcher
    Abstract:

    A low-power 1-Mb Magnetoresistive random access Memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm2 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-μm CMOS process utilizing five layers of metal and two layers of poly.

  • A low power 1 Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
    2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302), 2002
    Co-Authors: M. Durlam, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, G. Grynkewich, P. Naji, B. Engel, N. Rizzo, B. Butcher
    Abstract:

    A low power 1 Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25 mm/sup 2/ 1 Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The circuit is fabricated in a 0.6 /spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

M. Deherrera - One of the best experts on this subject based on the ideXlab platform.

  • Magnetoresistive Random Access Memory
    2010
    Co-Authors: M. Durlam, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, B. Butcher, P. Naji, B. Engel, N. Rizzo, C. Tracy
    Abstract:

    A low power 1Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25mm 2 1Mb MRAM circuit operates with address access times of less than 50ns, consuming 24mW at 3.0V and 20MHz. The circuit is fabricated in a 0.6µm CMOS process utilizing five layers of metal and two layers of poly

  • MgO-based tunnel junction material for high-speed toggle magnetic random access Memory
    IEEE Transactions on Magnetics, 2006
    Co-Authors: R W Dave, M. Deherrera, J.m. Slaughter, G. Grynkewich, Srinivas V Pietambaram, K Smith, J. Åkerman, G. Steiner, B. Craigo, S Tehrani
    Abstract:

    We report the first demonstration of a Magnetoresistive random access Memory (MRAM) circuit incorporating MgO-based magnetic tunnel junction (MTJ) material for higher performance. We compare our results to those of AlOx-based devices, and we discuss the MTJ process optimization and material changes that made the demonstration possible.We present data on key MTJ material attributes for different oxidation processes and free-layer alloys, including resistance distributions, bias dependence, free-layer magnetic properties, interlayer coupling, breakdown voltage, and thermal endurance. A tunneling magnetoresistance (TMR) greater than 230% was achieved with CoFeB free layers and greater than 85% with NiFe free layers. Although the TMR with NiFe is at the low end of our MgO comparison, even this MTJ material enables faster access times, since its TMR is almost double that of a similar structure with an AlOx barrier. Bit-to-bit resistance distributions are somewhat wider for MgO barriers, with sigma about 1.5% compared to about 0.9% for AlOx. The read access time of our 4 Mb toggle MRAM circuit was reduced from 21 ns with AlOx to a circuit-limited 17 ns with MgO.

  • A 4-mb toggle MRAM based on a novel bit and switching method
    2005
    Co-Authors: B.n. Engel, M. Durlam, M. Deherrera, G. Grynkewich, B. Butcher, J Janesky, R W Dave, Srinivas V Pietambaram, J. Åkerman, N.d. Rizzo
    Abstract:

    Abstract—A 4-Mb Magnetoresistive random access Memory (MRAM) with a novel magnetic bit cell and toggle switching mode is presented. The circuit was designed in a five level metal, 0.18- m complementary metal–oxide–semiconductor process with a bit cell size of 1.55 m2. The new bit cell uses a balanced synthetic antiferromagnetic free layer and a phased write pulse sequence to provide robust switching performance with immunity from half-select disturbs. This switching mode greatly improves the operational performance of the MRAM as compared to conven-tional MRAM. A detailed description of this 4-Mb toggle MRAM is presented. Index Terms—Magnetic film memories, magnetic tunnel junc-tion, Magnetoresistive device, Magnetoresistive random access Memory (MRAM), micromagnetic switching, MRAM integration, random access memories (RAMs). I

  • Magnetoresistive random access Memory using magnetic tunnel junctions
    Proceedings of the IEEE, 2003
    Co-Authors: S Tehrani, M. Durlam, M. Deherrera, J.m. Slaughter, B.n. Engel, Nicholas D Rizzo, J Janesky, J Salter, R W Dave, Brian R Butcher
    Abstract:

    Magnetoresistive random access Memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other Memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other Magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the Memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit Memory chip. Important Memory attributes are compared between MRAM and other Memory technologies.

  • A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
    IEEE Journal of Solid-State Circuits, 2003
    Co-Authors: M. Durlam, P.j. Naji, A. Omair, M. Deherrera, J. Calder, J.m. Slaughter, B.n. Engel, N.d. Rizzo, G. Grynkewich, B. Butcher
    Abstract:

    A low-power 1-Mb Magnetoresistive random access Memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM Memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm2 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-μm CMOS process utilizing five layers of metal and two layers of poly.