The Experts below are selected from a list of 3453 Experts worldwide ranked by ideXlab platform
Nadia Nedjah - One of the best experts on this subject based on the ideXlab platform.
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High-throughput cryptographic system using window-based Modular Exponentiation for secure communications
Telecommunication Systems, 2013Co-Authors: Nadia Nedjah, Luiza De Macedo MourelleAbstract:Modular Exponentiation is an essential arithmetic operation for various applications, such as cryptography. The performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementations for that operation. One of these methods is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions. Zero partitions allow for a reduction of the number of Modular multiplications required in the Exponentiation process. In this paper, we devise two novel hardware designs for computing Modular Exponentiation using the sliding-window method: one uses the constant-length non-zero partitions strategy (CLNZ) and the other uses the variable-length non-zero partitions strategy (VLNZ). The implementations are compared to existing hardware implementations of the Modular Exponentiation in terms of hardware area, time and throughput requirements.
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parallel Modular Exponentiation using load balancing without precomputation
Journal of Computer and System Sciences, 2012Co-Authors: Pedro Lara, Fábio Borges, Renato Portugal, Nadia NedjahAbstract:The Modular Exponentiation operation of the current algorithms for asymmetric cryptography is the most expensive part in terms of computational cost. The RSA algorithm, for example, uses the Modular Exponentiation algorithm in encryption and decryption procedure. Thus, the overall performance of those asymmetric cryptosystems depends heavily on the performance of the specific algorithm used for Modular Exponentiation. This work proposes new parallel algorithms to perform this arithmetical operation and determines the optimal number of processors that yields the greatest speedup. The optimal number is obtained by balancing the processing load evenly among the processors. Practical implementations are also performed to evaluate the theoretical proposals.
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M-ary parallel Modular Exponentiation: Software vs. hardware
2010 15th CSI International Symposium on Computer Architecture and Digital Systems, 2010Co-Authors: Sérgio De Souza Raposo, Nadia Nedjah, Marcos Santana, Luiza De Macedo MourelleAbstract:Most of cryptographic systems are based on Modular Exponentiation. It is performed using successive Modular multiplications. One way of improving the throughput of a cryptographic system implementation is reducing the number of the required Modular multiplications. Existing methods attempt to reduce this number by partitioning the exponent in constant or variable size windows. In this paper, in the purpose of further accelerating the computation of Modular Exponentiation, a concurrent novel approach is proposed along with the corresponding software and hardware implementations.
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Efficient hardware for Modular Exponentiation using the sliding-window method
International Journal of High Performance Systems Architecture, 2008Co-Authors: Rodrigo Martins Da Silva, Nadia Nedjah, Luiza De Macedo MourelleAbstract:Modular Exponentiation is an essential operations for various applications, such as cryptography. The performance of this operations has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementation for Modular Exponentiation. One these methods is the sliding-window method, which preprocesses the exponent into zero and non-zero partitions so that the number of Modular multiplications required to compute the Modular power is reduced. In this paper, we devise a novel harwdare for computing Modular Exponentiation using the sliding-window method. The implementation is efficient when compared against existing hardware implementations of the Modular Exponentiation.
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efficient hardware for Modular Exponentiation using the sliding window method
International Conference on Information Technology, 2007Co-Authors: Nadia Nedjah, Ld M Mourelle, Rodrigo Martins Da SilvaAbstract:Modular Exponentiation is an essential operation for various applications, such as cryptography. The performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementation for Modular Exponentiation. One this method is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions so that the number of Modular multiplications required computing the Modular power is reduced. In this paper, we devise a novel hardware for computing Modular Exponentiation using the sliding-window method. The implementation is efficient when compared against existing hardware implementations of the Modular Exponentiation
Luiza De Macedo Mourelle - One of the best experts on this subject based on the ideXlab platform.
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High-throughput cryptographic system using window-based Modular Exponentiation for secure communications
Telecommunication Systems, 2013Co-Authors: Nadia Nedjah, Luiza De Macedo MourelleAbstract:Modular Exponentiation is an essential arithmetic operation for various applications, such as cryptography. The performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementations for that operation. One of these methods is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions. Zero partitions allow for a reduction of the number of Modular multiplications required in the Exponentiation process. In this paper, we devise two novel hardware designs for computing Modular Exponentiation using the sliding-window method: one uses the constant-length non-zero partitions strategy (CLNZ) and the other uses the variable-length non-zero partitions strategy (VLNZ). The implementations are compared to existing hardware implementations of the Modular Exponentiation in terms of hardware area, time and throughput requirements.
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M-ary parallel Modular Exponentiation: Software vs. hardware
2010 15th CSI International Symposium on Computer Architecture and Digital Systems, 2010Co-Authors: Sérgio De Souza Raposo, Nadia Nedjah, Marcos Santana, Luiza De Macedo MourelleAbstract:Most of cryptographic systems are based on Modular Exponentiation. It is performed using successive Modular multiplications. One way of improving the throughput of a cryptographic system implementation is reducing the number of the required Modular multiplications. Existing methods attempt to reduce this number by partitioning the exponent in constant or variable size windows. In this paper, in the purpose of further accelerating the computation of Modular Exponentiation, a concurrent novel approach is proposed along with the corresponding software and hardware implementations.
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Efficient hardware for Modular Exponentiation using the sliding-window method
International Journal of High Performance Systems Architecture, 2008Co-Authors: Rodrigo Martins Da Silva, Nadia Nedjah, Luiza De Macedo MourelleAbstract:Modular Exponentiation is an essential operations for various applications, such as cryptography. The performance of this operations has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementation for Modular Exponentiation. One these methods is the sliding-window method, which preprocesses the exponent into zero and non-zero partitions so that the number of Modular multiplications required to compute the Modular power is reduced. In this paper, we devise a novel harwdare for computing Modular Exponentiation using the sliding-window method. The implementation is efficient when compared against existing hardware implementations of the Modular Exponentiation.
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Parallel computation of Modular Exponentiation for fast cryptography
International Journal of High Performance Systems Architecture, 2007Co-Authors: Nadia Nedjah, Luiza De Macedo MourelleAbstract:Modular Exponentiation is fundamental to several public-key cryptography systems such as the RSA encryption system, as well as the most dominant part of the computation performed. The operation is time consuming for large operands. This paper analyses and compares the complexity of a variety of algorithms proposed to compute the Modular Exponentiation of a relatively large binary number and proposes a new parallel Modular Exponentiation method.
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reconfigurable hardware for addition chains based Modular Exponentiation
International Conference on Information Technology: Coding and Computing, 2005Co-Authors: Luiza De Macedo Mourelle, Nadia NedjahAbstract:In several public-key cryptosystems, the main operation consists of the Modular Exponentiation, which is performed using successive Modular multiplications. The size of the operands that are used in these cryptosystems is considerably large (1024 bits), consuming a considerable amount of time. This impacts on the performance of the cryptosystem, especially in real time applications. In order to reduce the execution time in these cryptosystems, the total number of Modular multiplications must be reduced. There are several methods that attempt to reduce this number either by partitioning the exponent in windows or by reducing the number of elements to be multiplied. In this paper, we propose a fast and compact reconfigurable hardware for computing Modular Exponentiation using the addition-chain methods.
Ld M Mourelle - One of the best experts on this subject based on the ideXlab platform.
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efficient hardware for Modular Exponentiation using the sliding window method
International Conference on Information Technology, 2007Co-Authors: Nadia Nedjah, Ld M Mourelle, Rodrigo Martins Da SilvaAbstract:Modular Exponentiation is an essential operation for various applications, such as cryptography. The performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementation for Modular Exponentiation. One this method is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions so that the number of Modular multiplications required computing the Modular power is reduced. In this paper, we devise a novel hardware for computing Modular Exponentiation using the sliding-window method. The implementation is efficient when compared against existing hardware implementations of the Modular Exponentiation
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ITNG - Efficient Hardware for Modular Exponentiation Using the Sliding-Window Method
Fourth International Conference on Information Technology (ITNG'07), 2007Co-Authors: Nadia Nedjah, Ld M Mourelle, Rodrigo Martins Da SilvaAbstract:Modular Exponentiation is an essential operation for various applications, such as cryptography. The performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementation for Modular Exponentiation. One this method is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions so that the number of Modular multiplications required computing the Modular power is reduced. In this paper, we devise a novel hardware for computing Modular Exponentiation using the sliding-window method. The implementation is efficient when compared against existing hardware implementations of the Modular Exponentiation
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three hardware architectures for the binary Modular Exponentiation sequential parallel and systolic
IEEE Transactions on Circuits and Systems, 2006Co-Authors: Nadia Nedjah, Ld M MourelleAbstract:Modular Exponentiation is the cornerstone computation in public-key cryptography systems such as RSA cryptosystems. The operation is time consuming for large operands. This paper describes the characteristics of three architectures designed to implement Modular Exponentiation using the fast binary method: the first field-programmable gate array (FPGA) prototype has a sequential architecture, the second has a parallel architecture, and the third has a systolic array-based architecture. The paper compares the three prototypes as well as Blum and Paar's implementation using the time times area classic factor. All three prototypes implement the Modular multiplication using the popular Montgomery algorithm
Srdjan Capkun - One of the best experts on this subject based on the ideXlab platform.
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low cost client puzzles based on Modular Exponentiation
European Symposium on Research in Computer Security, 2010Co-Authors: Ghassan O Karame, Srdjan CapkunAbstract:Client puzzles have been proposed as a useful mechanism for mitigating Denial of Service attacks on network protocols. While several puzzles have been proposed in recent years, most existing non-parallelizable puzzles are based on Modular Exponentiations. The main drawback of these puzzles is in the high cost that they incur on the puzzle generator (the verifier). In this paper, we propose cryptographic puzzles based on Modular Exponentiation that reduce this overhead. Our constructions are based on a reasonable intractability assumption in RSA: essentially the difficulty of computing a small private exponent when the public key is larger by several orders of magnitude than the semi-prime modulus. We also discuss puzzle constructions based on CRT-RSA [11]. Given a semi-prime modulus N, the costs incurred on the verifier in our puzzle are decreased by a factor of |N|/k when compared to existing Modular Exponentiation puzzles, where k is a security parameter. We further show how our puzzle can be integrated in a number of protocols, including those used for the remote verification of computing performance of devices and for the protection against Denial of Service attacks. We validate the performance of our puzzle on PlanetLab nodes.
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ESORICS - Low-cost client puzzles based on Modular Exponentiation
Computer Security – ESORICS 2010, 2010Co-Authors: Ghassan O Karame, Srdjan CapkunAbstract:Client puzzles have been proposed as a useful mechanism for mitigating Denial of Service attacks on network protocols. While several puzzles have been proposed in recent years, most existing non-parallelizable puzzles are based on Modular Exponentiations. The main drawback of these puzzles is in the high cost that they incur on the puzzle generator (the verifier). In this paper, we propose cryptographic puzzles based on Modular Exponentiation that reduce this overhead. Our constructions are based on a reasonable intractability assumption in RSA: essentially the difficulty of computing a small private exponent when the public key is larger by several orders of magnitude than the semi-prime modulus. We also discuss puzzle constructions based on CRT-RSA [11]. Given a semi-prime modulus N, the costs incurred on the verifier in our puzzle are decreased by a factor of |N|/k when compared to existing Modular Exponentiation puzzles, where k is a security parameter. We further show how our puzzle can be integrated in a number of protocols, including those used for the remote verification of computing performance of devices and for the protection against Denial of Service attacks. We validate the performance of our puzzle on PlanetLab nodes.
Shay Gueron - One of the best experts on this subject based on the ideXlab platform.
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software implementation of Modular Exponentiation using advanced vector instructions architectures
International conference on Arithmetic of finite fields, 2012Co-Authors: Shay Gueron, Vlad KrasnovAbstract:This paper describes an algorithm for computing Modular Exponentiation using vector (SIMD) instructions. It demonstrates, for the first time, how such a software approach can outperform the classical scalar (ALU) implementations, on the high end x86_64 platforms, if they have a wide SIMD architecture. Here, we target speeding up RSA2048 on Intel's soon-to-arrive platforms that support the AVX2 instruction set. To this end, we applied our algorithm and generated an optimized AVX2-based software implementation of 1024-bit Modular Exponentiation. This implementation is seamlessly integrated into OpenSSL, by patching over OpenSSL 1.0.1. Our results show that our implementation requires 51% less instructions than the current OpenSSL 1.0.1 implementation. This illustrates the potential significant speedup in the RSA2048 performance, which is expected in the coming (2013) Intel processors. The impact of such speedup on servers is noticeable, especially since migration to RSA2048 is recommended by NIST, starting from 2013.
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Efficient software implementations of Modular Exponentiation
Journal of Cryptographic Engineering, 2012Co-Authors: Shay GueronAbstract:The significant cost of RSA computations affects the efficiency and responsiveness of SSL/TLS servers, and therefore software implementations of RSA are an important target for optimization. To this end, we study here efficient software implementations of Modular Exponentiation, which are also protected against software side channel analyses. We target superior performance for the ubiquitous ×86_64 architectures, used in most server platforms. The paper proposes optimizations in several directions: the Montgomery multiplications primitives, the w-ary Modular Exponentiation flow, and reduced cost of side channel mitigation. For a comparison baseline, we use the current OpenSSL version, 1.0.0e. Our implementation—called “RSAZ”—is more than 1.6 times faster than OpenSSL for both 1,024 and 2,048-bit keys, on the previous generation 2010 Intel^® Core^™ processors and on the 2nd generation Intel^® Core^™ processors. The RSAZ code was contributed to OpenSSL as a patch, and improvements proposed in an earlier version of this paper have already been incorporated into the future OpenSSL version.
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Efficient Software Implementations of Modular Exponentiation.
IACR Cryptology ePrint Archive, 2011Co-Authors: Shay GueronAbstract:RSA computations have a significant effect on the workloads of SSL/TLS servers, and therefore their software implementations on general purpose processors are an important target for optimization. We concentrate here on 512-bit Modular Exponentiation, used for 1024-bit RSA. We propose optimizations in two directions. At the primitives’ level, we study and improve the performance of an “Almost” Montgomery Multiplication. At the Exponentiation level, we propose a method to reduce the cost of protecting the w-ary Exponentiation algorithm against cache/timing side channel attacks. Together, these lead to an efficient software implementation of 512-bit Modular Exponentiation, which outperforms the currently fastest publicly available alternative. When measured on the latest x86-64 architecture, the 2 Generation Intel CoreTM processor, our implementation is 43% faster than that of the current version of OpenSSL (1.0.0d).
