Multistage Amplifier

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J. Jacob Wikner - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - Frequency compensation of high-speed, low-voltage CMOS Multistage Amplifiers
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Syed Ahmed Aamir, Prakash Harikumar, J. Jacob Wikner
    Abstract:

    This paper presents the frequency compensation of high-speed, low-voltage Multistage Amplifiers. Two frequency compensation techniques, the Nested Miller Compensation with Nulling Resistors (NMCNR) and Reversed Nested Indirect Compensation (RNIC), are discussed and employed on two Multistage Amplifier architectures. A four-stage pseudo-differential Amplifier with CMFF and CMFB is designed in a 1.2 V, 65-nm CMOS process. With NMCNR, it achieves a phase margin (PM) of 59° with a DC gain of 75 dB and unity-gain frequency (fug) of 712 MHz. With RNIC, the same four-stage Amplifier achieves a phase margin of 84°, DC gain of 76 dB and fug of 2 GHz. Further, a three-stage single-ended Amplifier is designed in a 1.1-V, 40-nm CMOS process. The three-stage OTA with RNIC achieves PM of 81°, DC gain of 80 dB and fug of 770 MHz. The same OTA achieves PM of 59° with NMCNR, while maintaining a DC gain of 75 dB and fug of 262 MHz. Pole-splitting, to achieve increased stability, is illustrated for both compensation schemes. Simulations illustrate that the RNIC scheme achieves much higher PM and fug for lower values of compensation capacitance compared to NMCNR, despite the growing number of low voltage Amplifier stages.

Fan You - One of the best experts on this subject based on the ideXlab platform.

  • Multistage Amplifier topologies with nested g sub m c compensation
    IEEE Journal of Solid-state Circuits, 1997
    Co-Authors: Fan You, S.h.k. Embabi, E Sanchezsinencio
    Abstract:

    This paper presents a Multistage Amplifier for low-voltage applications (<2 V). The Amplifier consists of simple (noncascode) low gain stages and is stabilized using a nested transconductance-capacitance compensation (NGCC) scheme. The resulting topology is similar to the well known nested Miller compensation (NMC) Multistage Amplifier, except that the proposed topology contains extra G/sub m/ feedforward stages which are used to enhance the Amplifier performance. The NGCC simplifies the transfer function of the proposed Multistage Amplifier which, in turn, simplifies its stability conditions. A comparison between the NGCC and NMC shows that the NGCC has wider bandwidth and is easier to stabilize. A four-stage NGCC Amplifier has been fabricated using a 2-/spl mu/m CMOS process and is tested using a /spl plusmn/1.0 V power supply. A dc gain of 100 dB has been measured. A gain bandwidth product of 1 MHz with 58/spl deg/ of phase margin and power of 1.4 mW can be achieved. The op amp occupies an active area of 0.22 mm/sup 2/. Step response shows that the op amp is stable.

  • Multistage Amplifier topologies with nested G/sub m/-C compensation
    IEEE Journal of Solid-State Circuits, 1997
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    This paper presents a Multistage Amplifier for low-voltage applications (

  • A Multistage Amplifier topology with nested Gm-C compensation for low-voltage application
    1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, 1
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    To design an operational Amplifier for low-voltage applications, cascoding is no longer a suitable technique for achieving high DC gain. Instead, multiple cascaded stages must he used, with each stage a simple (noncascode) inverting or noninverting Amplifier. In designing a Multistage opamp with multiple feedback loops, special care must be taken to ensure stability. A well-known compensation technique is nested Miller compensation. The complexity of the transfer function of the NMC based Multistage Amplifiers is reflected on its stability conditions. This makes it difficult to devise a systematic design procedure that yields stable NMC-based Amplifiers. A topology using nested transconductance (G/sub m/)-capacitance compensation (NGCC) has a simple transfer function that yields simple stability conditions. These conditions can be exploited to simplify design. The authors show an n-stage NGCC Amplifier topology consisting of n nested modules and describe a four-stage implementation using a 2 /spl mu/m CMOS process.

Edgar Sanchez-sinencio - One of the best experts on this subject based on the ideXlab platform.

  • Multistage Amplifier topologies with nested G/sub m/-C compensation
    IEEE Journal of Solid-State Circuits, 1997
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    This paper presents a Multistage Amplifier for low-voltage applications (

  • A Multistage Amplifier topology with nested Gm-C compensation for low-voltage application
    1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, 1
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    To design an operational Amplifier for low-voltage applications, cascoding is no longer a suitable technique for achieving high DC gain. Instead, multiple cascaded stages must he used, with each stage a simple (noncascode) inverting or noninverting Amplifier. In designing a Multistage opamp with multiple feedback loops, special care must be taken to ensure stability. A well-known compensation technique is nested Miller compensation. The complexity of the transfer function of the NMC based Multistage Amplifiers is reflected on its stability conditions. This makes it difficult to devise a systematic design procedure that yields stable NMC-based Amplifiers. A topology using nested transconductance (G/sub m/)-capacitance compensation (NGCC) has a simple transfer function that yields simple stability conditions. These conditions can be exploited to simplify design. The authors show an n-stage NGCC Amplifier topology consisting of n nested modules and describe a four-stage implementation using a 2 /spl mu/m CMOS process.

Syed Ahmed Aamir - One of the best experts on this subject based on the ideXlab platform.

  • ISCAS - Frequency compensation of high-speed, low-voltage CMOS Multistage Amplifiers
    2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
    Co-Authors: Syed Ahmed Aamir, Prakash Harikumar, J. Jacob Wikner
    Abstract:

    This paper presents the frequency compensation of high-speed, low-voltage Multistage Amplifiers. Two frequency compensation techniques, the Nested Miller Compensation with Nulling Resistors (NMCNR) and Reversed Nested Indirect Compensation (RNIC), are discussed and employed on two Multistage Amplifier architectures. A four-stage pseudo-differential Amplifier with CMFF and CMFB is designed in a 1.2 V, 65-nm CMOS process. With NMCNR, it achieves a phase margin (PM) of 59° with a DC gain of 75 dB and unity-gain frequency (fug) of 712 MHz. With RNIC, the same four-stage Amplifier achieves a phase margin of 84°, DC gain of 76 dB and fug of 2 GHz. Further, a three-stage single-ended Amplifier is designed in a 1.1-V, 40-nm CMOS process. The three-stage OTA with RNIC achieves PM of 81°, DC gain of 80 dB and fug of 770 MHz. The same OTA achieves PM of 59° with NMCNR, while maintaining a DC gain of 75 dB and fug of 262 MHz. Pole-splitting, to achieve increased stability, is illustrated for both compensation schemes. Simulations illustrate that the RNIC scheme achieves much higher PM and fug for lower values of compensation capacitance compared to NMCNR, despite the growing number of low voltage Amplifier stages.

S.h.k. Embabi - One of the best experts on this subject based on the ideXlab platform.

  • Multistage Amplifier topologies with nested g sub m c compensation
    IEEE Journal of Solid-state Circuits, 1997
    Co-Authors: Fan You, S.h.k. Embabi, E Sanchezsinencio
    Abstract:

    This paper presents a Multistage Amplifier for low-voltage applications (<2 V). The Amplifier consists of simple (noncascode) low gain stages and is stabilized using a nested transconductance-capacitance compensation (NGCC) scheme. The resulting topology is similar to the well known nested Miller compensation (NMC) Multistage Amplifier, except that the proposed topology contains extra G/sub m/ feedforward stages which are used to enhance the Amplifier performance. The NGCC simplifies the transfer function of the proposed Multistage Amplifier which, in turn, simplifies its stability conditions. A comparison between the NGCC and NMC shows that the NGCC has wider bandwidth and is easier to stabilize. A four-stage NGCC Amplifier has been fabricated using a 2-/spl mu/m CMOS process and is tested using a /spl plusmn/1.0 V power supply. A dc gain of 100 dB has been measured. A gain bandwidth product of 1 MHz with 58/spl deg/ of phase margin and power of 1.4 mW can be achieved. The op amp occupies an active area of 0.22 mm/sup 2/. Step response shows that the op amp is stable.

  • Multistage Amplifier topologies with nested G/sub m/-C compensation
    IEEE Journal of Solid-State Circuits, 1997
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    This paper presents a Multistage Amplifier for low-voltage applications (

  • A Multistage Amplifier topology with nested Gm-C compensation for low-voltage application
    1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, 1
    Co-Authors: Fan You, S.h.k. Embabi, Edgar Sanchez-sinencio
    Abstract:

    To design an operational Amplifier for low-voltage applications, cascoding is no longer a suitable technique for achieving high DC gain. Instead, multiple cascaded stages must he used, with each stage a simple (noncascode) inverting or noninverting Amplifier. In designing a Multistage opamp with multiple feedback loops, special care must be taken to ensure stability. A well-known compensation technique is nested Miller compensation. The complexity of the transfer function of the NMC based Multistage Amplifiers is reflected on its stability conditions. This makes it difficult to devise a systematic design procedure that yields stable NMC-based Amplifiers. A topology using nested transconductance (G/sub m/)-capacitance compensation (NGCC) has a simple transfer function that yields simple stability conditions. These conditions can be exploited to simplify design. The authors show an n-stage NGCC Amplifier topology consisting of n nested modules and describe a four-stage implementation using a 2 /spl mu/m CMOS process.