The Experts below are selected from a list of 747 Experts worldwide ranked by ideXlab platform
Sutanu Dutta - One of the best experts on this subject based on the ideXlab platform.
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A theoretical study on the temperature-dependent RF performance of a SiC MESFET
International Journal of Electronics, 2018Co-Authors: Sutanu DuttaAbstract:ABSTRACTThe impact of ambient temperature on the drain current of a SiC Metal-Semiconductor Field Effect Transistor (MESFET) has been studied theoretically assuming the device is operating under two-region model. This study has been extended to explore the effect of temperature on other device parameters i.e. drain resistance, Mutual Conductance, cut-off frequency and maximum operating frequency. It is observed that the overall performance of the device in terms of these parameters degrades as the device temperature is enhanced. In addition, the device performance is also studied incorporating self-heating effect applicable at higher drain field. The results calculated using this work are compared with the experimental data reported earlier and a good agreement has been found.
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Impact of parasitic resistances on the electrical characteristics of a SiC MESFET
Superlattices and Microstructures, 2017Co-Authors: Sutanu DuttaAbstract:Abstract The mathematical formulations of extrinsic resistances of a SiC-MESFET are developed and their impact on the electrical characteristics of the device has been studied in this work. Numerical techniques are used to calculate the drain current of a MESFET considering the existence of parasitic resistances. The analytical expressions of drain Conductance, Mutual Conductance and cut off frequency of the device have been derived and their variations over different device parameters are studied incorporating the effect of extrinsic resistances. It is observed that the impact of parasitic resistances on the drain current and other parameters of the device is significant and device performance usually degrades with parasitic resistances. The parasitic resistances computed using our approach is compared with the experimentally extracted data reported earlier and a reasonably good agreement has been observed.
Hiroyuki Okada - One of the best experts on this subject based on the ideXlab platform.
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Transparent-Oxide-Semiconductor Based Top-Gate Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2010Co-Authors: Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Top-gate self-aligned transparent-oxide–semiconductor transistors with indium–zinc-oxide as a semiconductor have been studied. During transistor fabrication, successive sputtering of oxide semiconductor and insulator without breaking the vacuum can be realized owing to the transparency of oxide semiconductor. The overlapping length between the gate–source and gate–drain electrodes was as small as 0.7 µm. The obtained field-effect mobility, on–off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 30 cm2 V-1 s-1, 105, -3 V, 2 mS/mm, and 0.7 V/decade, respectively.
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Transparent-Oxide–Semiconductor-Based Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2009Co-Authors: Yasumitsu Hirouchi, Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Transparent-oxide–semiconductor-based self-alignment thin-film transistors fabricated by a back-surface exposure method were investigated. The alignment margin of the source and drain electrodes against a gate electrode was minimized. The length of the overlapping resion between the gate-source and gate-drain electrodes was as small as 0.9 µm. The field-effect mobility, on-off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 4.3 cm2 V-1 s-1, 108, +0.5 V, 2.93 mS/mm, and 0.25 V/decade, respectively. Combined with the Mutual Conductance and capacitance, the estimated cutoff frequency was 70 MHz. A level-shift inverter with a super-buffer configuration, where a wide voltage margin and fast switching were expected, was fabricated. The obtained gain and logic swing were 1.8 and 2.5 V, respectively.
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Self-Aligned Organic Field-Effect Transistors Using Back-Surface Exposure Method
Japanese Journal of Applied Physics, 2004Co-Authors: Takahiro Hyodo, Shigeki Naka, Hiroyuki Okada, Fumiya Morita, Hiroyoshi OnnagawaAbstract:Self-aligned organic field-effect transistors using the back-surface exposure method were investigated. Using the back-surface exposure method, source and drain electrodes were self-aligned to the gate electrode. The overlapping length of the gate-source and the gate-drain electrodes was as small as 0.8 µm. Excellent field-effect operation was obtained with small parasitic resistance, where the maximum field-effect mobility was 0.12 cm2/Vs. The on-off ratio was 104, threshold voltage was -1.0 V, Mutual Conductance was 1.8 mS and subthreshold slope was 0.5 V/decade. Combined with capacitance measurement, the estimated cutoff frequency was 0.18 MHz.
Shigeki Naka - One of the best experts on this subject based on the ideXlab platform.
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Transparent-Oxide-Semiconductor Based Top-Gate Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2010Co-Authors: Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Top-gate self-aligned transparent-oxide–semiconductor transistors with indium–zinc-oxide as a semiconductor have been studied. During transistor fabrication, successive sputtering of oxide semiconductor and insulator without breaking the vacuum can be realized owing to the transparency of oxide semiconductor. The overlapping length between the gate–source and gate–drain electrodes was as small as 0.7 µm. The obtained field-effect mobility, on–off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 30 cm2 V-1 s-1, 105, -3 V, 2 mS/mm, and 0.7 V/decade, respectively.
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Transparent-Oxide–Semiconductor-Based Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2009Co-Authors: Yasumitsu Hirouchi, Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Transparent-oxide–semiconductor-based self-alignment thin-film transistors fabricated by a back-surface exposure method were investigated. The alignment margin of the source and drain electrodes against a gate electrode was minimized. The length of the overlapping resion between the gate-source and gate-drain electrodes was as small as 0.9 µm. The field-effect mobility, on-off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 4.3 cm2 V-1 s-1, 108, +0.5 V, 2.93 mS/mm, and 0.25 V/decade, respectively. Combined with the Mutual Conductance and capacitance, the estimated cutoff frequency was 70 MHz. A level-shift inverter with a super-buffer configuration, where a wide voltage margin and fast switching were expected, was fabricated. The obtained gain and logic swing were 1.8 and 2.5 V, respectively.
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Self-Aligned Organic Field-Effect Transistors Using Back-Surface Exposure Method
Japanese Journal of Applied Physics, 2004Co-Authors: Takahiro Hyodo, Shigeki Naka, Hiroyuki Okada, Fumiya Morita, Hiroyoshi OnnagawaAbstract:Self-aligned organic field-effect transistors using the back-surface exposure method were investigated. Using the back-surface exposure method, source and drain electrodes were self-aligned to the gate electrode. The overlapping length of the gate-source and the gate-drain electrodes was as small as 0.8 µm. Excellent field-effect operation was obtained with small parasitic resistance, where the maximum field-effect mobility was 0.12 cm2/Vs. The on-off ratio was 104, threshold voltage was -1.0 V, Mutual Conductance was 1.8 mS and subthreshold slope was 0.5 V/decade. Combined with capacitance measurement, the estimated cutoff frequency was 0.18 MHz.
Akira Yamagishi - One of the best experts on this subject based on the ideXlab platform.
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Transparent-Oxide-Semiconductor Based Top-Gate Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2010Co-Authors: Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Top-gate self-aligned transparent-oxide–semiconductor transistors with indium–zinc-oxide as a semiconductor have been studied. During transistor fabrication, successive sputtering of oxide semiconductor and insulator without breaking the vacuum can be realized owing to the transparency of oxide semiconductor. The overlapping length between the gate–source and gate–drain electrodes was as small as 0.7 µm. The obtained field-effect mobility, on–off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 30 cm2 V-1 s-1, 105, -3 V, 2 mS/mm, and 0.7 V/decade, respectively.
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Transparent-Oxide–Semiconductor-Based Self-Alignment Thin-Film Transistors
Japanese Journal of Applied Physics, 2009Co-Authors: Yasumitsu Hirouchi, Akira Yamagishi, Shigeki Naka, Hiroyuki OkadaAbstract:Transparent-oxide–semiconductor-based self-alignment thin-film transistors fabricated by a back-surface exposure method were investigated. The alignment margin of the source and drain electrodes against a gate electrode was minimized. The length of the overlapping resion between the gate-source and gate-drain electrodes was as small as 0.9 µm. The field-effect mobility, on-off ratio, threshold voltage, Mutual Conductance, and subthreshold slope were 4.3 cm2 V-1 s-1, 108, +0.5 V, 2.93 mS/mm, and 0.25 V/decade, respectively. Combined with the Mutual Conductance and capacitance, the estimated cutoff frequency was 70 MHz. A level-shift inverter with a super-buffer configuration, where a wide voltage margin and fast switching were expected, was fabricated. The obtained gain and logic swing were 1.8 and 2.5 V, respectively.
Ivan Sutanto - One of the best experts on this subject based on the ideXlab platform.
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Voltage biased Varistor-Transistor Hybrid Devices: Properties and Applications
AIMS Materials Science, 2015Co-Authors: Raghvendra K. Pandey, William A. Stapleton, Mohammad Shamsuzzoha, Ivan SutantoAbstract:The paper describes the properties and potential applications of a novel hybrid varistor device originating from biased voltage induced modified nonlinear current-voltage (I-V) characteristics. Single crystal of an oxide semiconductor in the family of iron-titanates with the chemical formula of Fe 2 TiO 5 (pseudobrookite) has been used as substrate for the varistor. The modifications of the varistor characteristics are achieved by superimposition of a bias voltage in the current path of the varistor. These altered I-V characteristics, when analyzed, reveal the existence of embedded transistors coexisting with the varistor. These transistors exhibit Mutual Conductance, signal amplification and electronic switching which are the defining signatures of a typical transistor. The tuned varistors also acquire the properties of signal amplification and Mutual Conductance which expand the range of applications for a varistor beyond its traditional use as circuit protector. Both tuned varistors and the embedded transistors have attributes which make them suitable for many applications in electronics including at high temperatures and for radiation dominated environments such as space.
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Nature and Characteristics of a Voltage-Biased Varistor and its Embedded Transistor
IEEE Journal of the Electron Devices Society, 2015Co-Authors: Raghvendra K. Pandey, William A. Stapleton, Ivan SutantoAbstract:An unorthodox approach for producing simple and yet practical transistors based on ceramic platforms is discussed in this paper. To achieve this, we modify the original nonlinear current-voltage ( I-V ) characteristics of a varistor by superimposing a biasing voltage ( Vb ). This leads to the formation of a hybrid device consisting of a biased varistor and transistor. The studies were done under two experimental conditions; first, when the ratio between the drain current ( Id ) and the bias current ( Ib ) is of the order of $10^{3}$ or more, and second when it is less than $10^{2}$ . The transistors embedded in the hybrid device exhibit the typical attributes of a conventional transistor. The transistors are analogous to the well-established bipolar junction transistors and yet different because they are based on different physical principles. These transistors can meet the requirements of many general purpose applications and can also function satisfactorily as low-pass filters. The specialized applications could be under hazardous conditions such as at high temperatures, in radiation-filled environments such as outer space, and possibly in bio systems. The biased varistor assumes the property of Mutual Conductance like a transistor as well as becomes a good signal amplifier.
