The Experts below are selected from a list of 153 Experts worldwide ranked by ideXlab platform
Andreas Kaiser - One of the best experts on this subject based on the ideXlab platform.
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A 2- mu m CMOS fifth-order low-pass continuous-time filter for video-frequency applications
IEEE Journal of Solid-State Circuits, 1993Co-Authors: B. Stefanelli, Andreas KaiserAbstract:A fifth-order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2- mu m CMOS technology, the circuit occupies 6 mm/sup 2/ of silicon area including the automatic tuning circuitry. The filter achieves a 7-MHz cutoff frequency using a parasitic Pole Compensation scheme. The dynamic range is 40 dB and power consumption is 30 mW for a 5-V supply. A transconductor biasing strategy which allows a continuous tuning range for the cutoff frequency of one decade is presented. >
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A 2μm CMOS 5th Order Low-pass Continuous-Time Filter for Video-Frequency Applications
ESSCIRC '92: Eighteenth European Solid-State Circuits conference, 1992Co-Authors: B. Stefanelli, Andreas KaiserAbstract:A 5th order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2μm CMOS technology, the filter achieves a 7 MHz cut-off frequency using a simple parasitic Pole Compensation scheme. A new transconductor biasing strategy is also presented, which allows the tuning of the transconductance over a decade.
B. Stefanelli - One of the best experts on this subject based on the ideXlab platform.
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A 2- mu m CMOS fifth-order low-pass continuous-time filter for video-frequency applications
IEEE Journal of Solid-State Circuits, 1993Co-Authors: B. Stefanelli, Andreas KaiserAbstract:A fifth-order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2- mu m CMOS technology, the circuit occupies 6 mm/sup 2/ of silicon area including the automatic tuning circuitry. The filter achieves a 7-MHz cutoff frequency using a parasitic Pole Compensation scheme. The dynamic range is 40 dB and power consumption is 30 mW for a 5-V supply. A transconductor biasing strategy which allows a continuous tuning range for the cutoff frequency of one decade is presented. >
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A 2μm CMOS 5th Order Low-pass Continuous-Time Filter for Video-Frequency Applications
ESSCIRC '92: Eighteenth European Solid-State Circuits conference, 1992Co-Authors: B. Stefanelli, Andreas KaiserAbstract:A 5th order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2μm CMOS technology, the filter achieves a 7 MHz cut-off frequency using a simple parasitic Pole Compensation scheme. A new transconductor biasing strategy is also presented, which allows the tuning of the transconductance over a decade.
Wolfgang Mathis - One of the best experts on this subject based on the ideXlab platform.
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peaking reduced stf design for ct σδ modulators with selective Pole Compensation
International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.
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ISCAS - Peaking reduced STF design for CT ΣΔ modulators with selective Pole Compensation
2012 IEEE International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.
Christoph Zorn - One of the best experts on this subject based on the ideXlab platform.
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peaking reduced stf design for ct σδ modulators with selective Pole Compensation
International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.
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ISCAS - Peaking reduced STF design for CT ΣΔ modulators with selective Pole Compensation
2012 IEEE International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.
Christian Widemann - One of the best experts on this subject based on the ideXlab platform.
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peaking reduced stf design for ct σδ modulators with selective Pole Compensation
International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.
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ISCAS - Peaking reduced STF design for CT ΣΔ modulators with selective Pole Compensation
2012 IEEE International Symposium on Circuits and Systems, 2012Co-Authors: Christoph Zorn, Christian Widemann, Timon Bruckner, Maurits Ortmanns, Wolfgang MathisAbstract:This paper presents a method to design continuous-time ΣΔ modulator with reduced peaking of the signal transfer function (STF). It is demonstrated that the approach is suitable for designing a flat STF while the anti-aliasing properties of the continuous time system can be retained. In addition, the presented method reduces the number of additional circuit elements needed for a flat STF frequency response. Experimental verification of the approach is presented.