Processing Module

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Long Teng - One of the best experts on this subject based on the ideXlab platform.

  • High-performance Signal Processing Module Based on SAR Imaging Algorithm
    Computer Engineering, 2011
    Co-Authors: Long Teng
    Abstract:

    Aiming at the characteristics of high-speed real-time Processing and wide mass storage of SAR imaging algorithm,this paper designs and implements a high-performance signal Processing Module based on multi PowerPC processor.This Processing Module constructs variety levels of networks by using a variety of high-speed serial buses to adapt to the transmission of different types of dataflow in signal Processing system.It completes the mapping of SAR imaging algorithm on the Module by combining with bottom signal Processing nodes of mixed parallel structure.Application result shows that the signal Processing system architecture based on this Module is standardized,modular,reconfigurable and scalable.

  • Design and Realization of High-performance Universal Parallel Signal Processing Module
    Computer Engineering, 2007
    Co-Authors: Long Teng
    Abstract:

    In order to satisfy the increasing task needs in signal Processing field and to deal with different application occasion,it becomes one tendency to design high-performance universal parallel signal Processing Module and further to set up series of signal Processing systems.Based on the theoretical analysis about shared bus parallel architecture and distributed one,combining with the characteristics of signal Processing system,one kind of high-performance universal parallel signal Processing Module is designed.The Module has the characteristics of standardization,modularization,scalability,restructure,hybrid parallel Processing pattern,and multi-layer interconnection.These characteristics are validated through constructing the typical signal Processing system.

Liu Runsheng - One of the best experts on this subject based on the ideXlab platform.

  • Embedded Speech Processing System for Car Wireless Terminals
    Computer Engineering, 2005
    Co-Authors: Liu Runsheng
    Abstract:

    This paper introduces a novel embedded speech Processing system, which is implemented in car wireless terminals. This system is composed of two Modules: bluetooth Module and speech-Processing Module. Through the blue tooth Module, car wireless terminal can communicate with cellular phone, download the address book from cellular phone and send it to the speech Processing Module, while the speech Processing Module fulfills speech recognition, speech synthesis, speech coding and system controlling functions. This system can on-line generate the speech recognition network according to the address book and the recognizable vocabulary scale is up to 1000 words. When the address book includes 600 names, the recognition accuracy rate is more than 97%. The hardware platform of this system is based on SoC architecture and high integration of this architecture makes the system more robust.

B. Yang - One of the best experts on this subject based on the ideXlab platform.

  • High-speed data Processing Module for LLRF
    IEEE Transactions on Nuclear Science, 2015
    Co-Authors: D. Makowski, A. Mielczarek, P. Perek, A. Napieralski, L. Butkowski, J. Branlard, M. Fenner, H. Schlarb, B. Yang
    Abstract:

    Linear accelerators, like the Free-electron LASer in Hamburg (FLASH) or the European X-Ray Free Electron Laser (E-XFEL) take advantage of the digital Low Level Radio Frequency (LLRF) system to control the phase and amplitude of an electromagnetic field inside superconducting cavities. The real-time control LLRF system, Processing data within a few microseconds, has to fulfil performance requirements and provide comprehensive monitoring and diagnostics. The AMC-based controller (DAMC-TCK7) board was developed as a general purpose high-performance low-latency data Processing unit designed according to the PICMG MTCA.4 spec. The Module provides the Processing power, data memory, communication links, reference clock, trigger and interlock signals that are required in modern LLRF control systems. The Module was originally designed as a cavity field stabilizing controller for standing-wave linear accelerators. However, the application of the board is much wider because it is a general purpose data Processing Module suitable for systems requiring low latency and high-speed digital signal Processing. According to authors’ knowledge this is the first MTCA.4 Module offering 12.5 Gbps links, unified Zone 3 connectivity and advanced Module Management Controller proposed by DESY. The DAMC-TCK7 card was used as a hardware template for the development of the other AMC Modules of the XFEL accelerator’s LLRF system. This paper discusses the requirements for the digital real-time data Processing Module, presents the laboratory performance evaluation and verification in Cryo-Module Test Bench (CMTB) at DESY.

  • High-speed data Processing Module for LLRF
    2014 19th IEEE-NPSS Real Time Conference, 2014
    Co-Authors: D. Makowski, A. Mielczarek, P. Perek, A. Napieralski, L. Butkowski, J. Branlard, M. Fenner, H. Schlarb, B. Yang
    Abstract:

    The linear accelerators, like Free-electron LAser in Hamburg (FLASH) or the European X-Ray Free Electron Laser (E-XFEL) take advantage of digital Low Level Radio Frequency (LLRF) system to control the phase and amplitude of electromagnetic field inside superconducting cavities. The real-time control LLRF system, Processing data within a few micro seconds, must fulfil the performance requirements and provide monitoring and diagnostics. The AMC-based Controller (DAMC-TCK7) board was developed as a general purpose high-performance low-latency data Processingunit designed according to the PICMG MTCA.4 spec. The Module provides Processing power, data memory, communication links, reference clock, trigger and interlock signals that are required in modern LLRF control systems.The Module was originally designed as a LLRF (Low Level Radio Frequency) cavity field stabilizing controller for standing-wave linear accelerators. However, the application of the board is much wider, it is general purpose data Processing Module suitable for systems requiring low latency and high speed digital signal Processing. This paper discusses the requirements for the digital real-time data Processing Module, presents the laboratory performance evaluation and the first results from Cryo Module Test Bench (CMTB) at DESY

Ni Jing - One of the best experts on this subject based on the ideXlab platform.

  • A Universal Signal Processing Module Based on VEM Bus and ADSP21160
    Modern Radar, 2004
    Co-Authors: Ni Jing
    Abstract:

    Now using universal signal Processing Modules to construct the hardware platform of signal Processing system has been the frend of radar signal Processing system design. This paper introduces a kind of universal signal Processing Module, which is based on the high performance DSP ADSP21160 from AD Co. and uses highly reliabile,high openness and highly universal VMEbus for output interface. This paper also introduces the configuration, performance and interface of the Module, summarizes the experience from the developing, designing and applications of the DSP, and gives an example of its application. This Module has been widely used.

Jing He - One of the best experts on this subject based on the ideXlab platform.

  • Hardware design of a wireless video Processing Module based on TMS320DM6446
    2010 3rd International Congress on Image and Signal Processing, 2010
    Co-Authors: Jing He
    Abstract:

    A wireless video Processing Module using TI's DaVinci chip TMS320DM6446 as the main chip is described in this paper. In this system analog video signal is digitized by a high speed video decoding circuit and computed by the DSP chip and transmitted over by model of 3G wireless network. The paper describes the design scheme of the wireless video Processing Module hardware in detail. The hardware is made up of a special video decoder TVP5146, FPGA and DSP, and the circuits include video Processing, wireless communication and interface circuits.