The Experts below are selected from a list of 60 Experts worldwide ranked by ideXlab platform
Eric F. Robinson - One of the best experts on this subject based on the ideXlab platform.
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A Cost-Efficient L1–L2 Multicore Interconnect: Performance, Power, and Area Considerations
IEEE Transactions on Circuits and Systems I: Regular Papers, 2011Co-Authors: Amit Golander, Nadav Levison, Omer Heymann, Alexander Briskman, Mark J. Wolski, Eric F. RobinsonAbstract:Processor manufacturers use advances in manufacturing technologies to increase the number of cores on chip in order to scale performance in a cost-efficient manner. As the number of cores scales up, not all cores can be directly connected to the main memory and there is a need for hierarchy, for example, by arranging them in clusters that share L2 caches. This paper focuses on designing cost-efficient L1-L2 interconnects. We discuss performance and power- and area-consumption considerations for a Real Processor designed in 45-nm technology. We explain the architectures and heuristics developed, including a smart floorplan with instance flips to address interconnect latency, customized decentralized arbitration schemes tailored per transaction type, and heterogeneous Vt device assignment to reduce overall power consumption, taking into account the expected switching factors. These and other methods worked together to achieve high throughput in a power-efficient interconnect that consumes less than 3% of the compute cluster area.
Rodolfo Azevedo - One of the best experts on this subject based on the ideXlab platform.
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SBAC-PAD - On the Dark Silicon Automatic Evaluation on Multicore Processors
2016 28th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2016Co-Authors: Tony Santos, Ana Paula Silva, Liana Duenha, Ricardo Ribeiro Dos Santos, Edward David Moreno, Rodolfo AzevedoAbstract:The advent of Dark Silicon as result of the limit on Dennard scaling forced modern Processor designs to reduce the chip area that can work on maximum clock frequency. This effect reduced the free gains from Moore's law. This work introduces a less conservative dark silicon estimate based on chip components power density and technological process, so that designers could explore architectural resources to mitigate it. We implemented our dark silicon estimation tool on top of MultiExplorer and evaluated on a set of Intel Pentium and AMD K8/10 multicore Processors built on transistor technologies from 90nm down to 32nm. Our contributions are twofold: (1) Our experiments have shown dark silicon estimates up to 8.26% of the chip area compared to a baseline 90nm Real Processor, we also evaluated clock frequency behavior based on Dennard scaling and obtained up to 15.65% dark silicon on chip area. (2) We designed and showed that a dark silicon aware Design Space Exploration (DSE) strategy can minimize chip dark area while increasing performance at design time. Our results on DSE found dark silicon free multicore platforms while providing 3.6 speedup.
Lanet Jean-louis - One of the best experts on this subject based on the ideXlab platform.
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Reversing the Operating System of a Java Based Smart Card
'Springer Science and Business Media LLC', 2014Co-Authors: Bouffard Guillaume, Lanet Jean-louisAbstract:International audienceAttacks on smart cards can only be based on a black box approach where the code of cryptographic primitives and operating system are not accessible. To perform hardware or software attacks, a white box approach providing access to the binary code is more effi- cient. In this paper, we propose a methodology to discover the romized code whose access is protected by the virtual machine. It uses a hooked code in an indirection table. We gained access to Real Processor, thus allowing us to run a shell code written in 8051 assembler language. As a result, this code has been able to dump completely the ROM of a Java Card operating system. One of the issues is the possibility to reverse the cryptographic algorithm and all the embedded countermeasures. Finally, our attack is evaluated on different cards from distinct manufacturers
Jean-louis Lanet - One of the best experts on this subject based on the ideXlab platform.
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Reversing the operating system of a Java based smart card
Journal of Computer Virology and Hacking Techniques, 2014Co-Authors: Guillaume Bouffard, Jean-louis LanetAbstract:Attacks on smart cards can only be based on a black box approach where the code of cryptographic primitives and operating system are not accessible. To perform hardware or software attacks, a white box approach providing access to the binary code is more efficient. In this paper, we propose a methodology to discover the romized code whose access is protected by the virtual machine. It uses a hooked code in an indirection table. We gained access to the Real Processor, thus allowing us to run a shell code written in 8051 assembly language. As a result, this code has been able to dump completely the ROM of a Java Card operating system. One of the issues is the possibility to reverse the cryptographic algorithm and all the embedded countermeasures. Finally, our attack is evaluated on different cards from distinct manufacturers.
Haibing Guan - One of the best experts on this subject based on the ideXlab platform.
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reducing world switches in virtualized environment with flexible cross world calls
International Symposium on Computer Architecture, 2015Co-Authors: Yubin Xia, Haibo Chen, Binyu Zang, Haibing GuanAbstract:Modern computers are built with increasingly complex software stack crossing multiple layers (i.e., worlds), where cross-world call has been a necessity for various important purposes like security, reliability, and reduced complexity. Unfortunately, there is currently limited cross-world call support (e.g., syscall, vmcall), and thus other calls need to be emulated by detouring multiple times to the privileged software layer (i.e., OS kernel and hypervisor). This causes not only significant performance degradation, but also unnecessary implementation complexity. This paper argues that it is time to rethink the design of traditional cross-world call mechanisms by reviewing existing systems built upon hypervisors. Following the design philosophy of separating authentication from authorization, this paper advocates decoupling of the authorization on whether a world call is permitted (by software) from unforgeable identification of calling peers (by hardware). This results in a flexible cross-world call scheme (namely CrossOver) that allows secure, efficient and flexible cross-world calls across multiple layers not only within the same address space, but also across multiple address spaces. We demonstrate that CrossOver can be approximated by using existing hardware mechanism (namely VMFUNC) and a trivial modification of the VMFUNC mechanism can provide a full support of CrossOver. To show its usefulness, we have conducted case studies by using several recent systems such as Proxos, Hyper-Shell, Tahoma and ShadowContext. Performance measurements using full-system emulation and a Real Processor with VMFUNC shows that CrossOver significantly boosts the performance of the mentioned systems.
