The Experts below are selected from a list of 156126 Experts worldwide ranked by ideXlab platform
M. Congedo - One of the best experts on this subject based on the ideXlab platform.
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Subspace Projection Filters for Real-Time Brain Electromagnetic Imaging
IEEE Transactions on Biomedical Engineering, 2006Co-Authors: M. CongedoAbstract:An increasing number of neuroimaging laboratories are becoming interested in real-time investigations of the human brain. The opportunities offered by real-time applications are inversely proportional to the latency of the brain activity response and to the computational delay of brain activity estimation. Electromagnetic tomographies, based on EEG or MEG, feature immediacy of brain activity response and excellent time resolution, hence they are natural candidates. However their spatial resolution and signal-to-noise ratio are poor. In this paper we develop data-independent and datadependent subspace projection filters for the standardized Low- Resolution Electromagnetic Tomography (sLORETA), a weighted minimum norm inverse solution for EEG/MEG. The filters are designed for extracting time-series of source activity in any given region of interest. The data-independent filter is shown to reduce interference of sources originating in neighboring regions, whereas the data-dependent filter is shown to suppress Sensor Measurement noise. An effective and straightforward way to combine them is demonstrated. The result is a dual subspace projection allowing both noise suppression and interference reduction.
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Subspace Projection Filters for Real-Time Brain Electromagnetic Imaging
IEEE transactions on bio-medical engineering, 2006Co-Authors: M. CongedoAbstract:An increasing number of neuroimaging laboratories are becoming interested in real-time investigations of the human brain. The opportunities offered by real-time applications are inversely proportional to the latency of the brain activity response and to the computational delay of brain activity estimation. Electromagnetic tomographies, based on electroencephalography (EEG) or magnetoencephalography (MEG), feature immediacy of brain activity response and excellent time resolution, hence they are natural candidates. However their spatial resolution and signal-to-noise ratio are poor. In this paper, we develop data-independent and data-dependent subspace projection filters for the standardized low-resolution electromagnetic tomography (sLORETA), a weighted minimum norm inverse solution for EEG/MEG. The filters are designed for extracting time-series of source activity in any given region of interest. The data-independent filter is shown to reduce interference of sources originating in neighboring regions, whereas the data-dependent filter is shown to suppress Sensor Measurement noise. An effective and straightforward way to combine them is demonstrated. The result is a dual subspace projection allowing both noise suppression and interference reduction
T Mougel - One of the best experts on this subject based on the ideXlab platform.
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modeling and design of novel architecture of multibit switched capacitor sigma delta converter with two step quantization process
International Conference on Networking, 2006Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
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ICN/ICONS/MCL - Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process
International Conference on Networking International Conference on Systems and International Conference on Mobile Communications and Learning Technolo, 1Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
Biao Liu - One of the best experts on this subject based on the ideXlab platform.
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Finite-Horizon Robust Kalman Filter for Uncertain Attitude Estimation System with Star Sensor Measurement Delays
Abstract and Applied Analysis, 2014Co-Authors: Hua-ming Qian, Wei Huang, Biao LiuAbstract:This paper addresses the robust Kalman filtering problem for uncertain attitude estimation system with star Sensor Measurement delays. Combined with the misalignment errors and scale factor errors of gyros in the process model and the misalignment errors of star Sensors in the Measurement model, the uncertain attitude estimation model can be established, which indicates that uncertainties not only appear in the state and output matrices but also affect the statistic of the process noise. Meanwhile, the phenomenon of star Sensor Measurement delays is described by introducing Bernoulli random variables with different delay characteristics. The aim of the addressed attitude estimation problem is to design a filter such that, in the presence of model uncertainties and star Sensors delays for the attitude estimation system, the optimized filter parameters can be obtained to minimize the upper bound on the estimation error covariance. Therefore, a finite-horizon robust Kalman filter is proposed to cope with this question. Compared with traditional attitude estimation algorithms, the designed robust filter takes into account the effects of star Sensor Measurement delays and model uncertainties. Simulation results illustrate the effectiveness of the developed robust filter.
Lukas Fujcik - One of the best experts on this subject based on the ideXlab platform.
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ICONS - Digital Synchronization Utilizing Harmonic Signal Generator for Capacitive Pressure Sensor Measurement
Third International Conference on Systems (icons 2008), 2008Co-Authors: Lukas Fujcik, Radimir Vrba, Linus Michaeli, Jiri HazeAbstract:The harmonic signal generator utilizing sigma-delta modulation for capacitive pressure Sensor Measurement was designed in AMIS CMOS 0.7 mum technology. Harmonic signal generator is one of the important parts of complex Measurement system for capacitive pressure Sensor Measurement. Whole capacitive Measurement system is based on bandpass (BP) Sigma-Delta modulation. Phasing of harmonic signal and digital sampling signal is main requirement for proper function of capacitive pressure Sensor Measurement utilizing BP Sigma-Delta modulator. Harmonic signal generator was designed using VHDL. Synthesis of digital synchronization utilizing harmonic signal generator was accomplished in Cadence BuildGates and implemented in Cadence Silicon Ensemble.
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modeling and design of novel architecture of multibit switched capacitor sigma delta converter with two step quantization process
International Conference on Networking, 2006Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
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ICN/ICONS/MCL - Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process
International Conference on Networking International Conference on Systems and International Conference on Mobile Communications and Learning Technolo, 1Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
Jiri Haze - One of the best experts on this subject based on the ideXlab platform.
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ICONS - Digital Synchronization Utilizing Harmonic Signal Generator for Capacitive Pressure Sensor Measurement
Third International Conference on Systems (icons 2008), 2008Co-Authors: Lukas Fujcik, Radimir Vrba, Linus Michaeli, Jiri HazeAbstract:The harmonic signal generator utilizing sigma-delta modulation for capacitive pressure Sensor Measurement was designed in AMIS CMOS 0.7 mum technology. Harmonic signal generator is one of the important parts of complex Measurement system for capacitive pressure Sensor Measurement. Whole capacitive Measurement system is based on bandpass (BP) Sigma-Delta modulation. Phasing of harmonic signal and digital sampling signal is main requirement for proper function of capacitive pressure Sensor Measurement utilizing BP Sigma-Delta modulator. Harmonic signal generator was designed using VHDL. Synthesis of digital synchronization utilizing harmonic signal generator was accomplished in Cadence BuildGates and implemented in Cadence Silicon Ensemble.
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modeling and design of novel architecture of multibit switched capacitor sigma delta converter with two step quantization process
International Conference on Networking, 2006Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
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ICN/ICONS/MCL - Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process
International Conference on Networking International Conference on Systems and International Conference on Mobile Communications and Learning Technolo, 1Co-Authors: Lukas Fujcik, Jiri Haze, Radimir Vrba, T MougelAbstract:This paper presents a novel architecture of high-order single-stage sigma-delta (\sigma \delta) converter for Sensor Measurement. The two-step quantization technique was utilized to design of novel architecture of \sigma \delta? modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a \sigma \delta modulator. Parameters of decimation filter are derived from the specifications of the overall \sigma \delta modulator. The proposed architecture of switched-capacitor (SC) \sigma \delta modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC \sigma \delta modulator with twostep quantization process was designed and simulated in MATLAB SIMULINK.
