Sequential Code

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Saeed Parsa - One of the best experts on this subject based on the ideXlab platform.

  • ISPA - Semi-automatic Transformation of Sequential Code to Distributed Code Using Model Driven Architecture Approach
    2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009
    Co-Authors: Siamak Najjar Karimi, Saeed Parsa
    Abstract:

    In this paper, a Model Driven Architecture (MDA) approach is applied to Semi-automatically translate Sequential programs into corresponding distributed Code. The novelty of our work is the use of MDA in the process of translating serial into distributed Code. The transformation comprises automatic generation of platform independent and then platform specific models from the Sequential Code. In order to generate the PIM, a meta-model defining the overall architecture of the resultant distributed Code is developed. The meta-model is used as a basis for the development of platform independent models (PIM) for the resultant distributed Code. A set of transformation rules are defined to transform the resulted PIM into a corresponding platform-specific model. These transformation rules can be modified by the user, depending on the details of the underlying middle-ware applied for the distribution. The platform independent model provides a better understanding of the distributed Code and helps the programmer to modify the Code more easily.

  • Semi-automatic Transformation of Sequential Code to Distributed Code Using Model Driven Architecture Approach
    2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009
    Co-Authors: Siamak Najjar Karimi, Saeed Parsa
    Abstract:

    In this paper, a model driven architecture (MDA) approach is applied to Semi-automatically translate Sequential programs into corresponding distributed Code. The novelty of our work is the use of MDA in the process of translating serial into distributed Code. The transformation comprises automatic generation of platform independent and then platform specific models from the Sequential Code. In order to generate the PIM, a meta-model defining the overall architecture of the resultant distributed Code is developed. The meta-model is used as a basis for the development of platform independent models (PIM) for the resultant distributed Code. A set of transformation rules are defined to transform the resulted PIM into a corresponding platform-specific model. These transformation rules can be modified by the user, depending on the details of the underlying middle-ware applied for the distribution. The platform independent model provides a better understanding of the distributed Code and helps the programmer to modify the Code more easily.

  • ISCIS - Formal description of a runtime infrastructure for automatic distribution of programs
    Computer and Information Sciences – ISCIS 2006, 2006
    Co-Authors: Omid Bushehrian, Saeed Parsa
    Abstract:

    Automatic distribution of Sequential Code is of great concern in applying networks of low cost computers to run computationally intensive Code. A major difficulty is to prove that the final distributed Code is equivalent with the original Sequential Code. To achieve this, a formal specification of structure and behavior of the distributed and a formal proof of the equivalence of the operational semantics of the Sequential with the final distributed Code is presented. To support platform and distributing middleware independence a new architecture is presented.

  • SOFSEM - Automatic distribution of Sequential Code using javasymphony middleware
    SOFSEM 2006: Theory and Practice of Computer Science, 2006
    Co-Authors: Saeed Parsa, Vahid Khalilpoor
    Abstract:

    In this paper the design and implementation of a framework, called jDistributor, for automatic conversion of Sequential Code into distributed program Code is described. Optimal distribution of the program Code is attained by applying a specific hierarchical clustering algorithm to partition the Code into components with almost the same amount of speed up. To speed up the execution of the components, inter-component method calls are converted into non-blocking remote calls, when appropriate. All the inter-component remote calls are carried out through a component, called Proxy. The Proxy uses an Object Manager component to construct remote objects. A component called Synchronizer receives the values of reference parameters and the return value from remote methods. All the inter-component communications are handled by a connector component, which is based on a javaSymphony infrastructure.

  • automatic distribution of Sequential Code using javasymphony middleware
    Lecture Notes in Computer Science, 2006
    Co-Authors: Saeed Parsa, Vahid Khalilpoor
    Abstract:

    In this paper the design and implementation of a framework, called jDistributor, for automatic conversion of Sequential Code into distributed program Code is described. Optimal distribution of the program Code is attained by applying a specific hierarchical clustering algorithm to partition the Code into components with almost the same amount of speed up. To speed up the execution of the components, inter-component method calls are converted into non-blocking remote calls, when appropriate. All the inter-component remote calls are carried out through a component, called Proxy. The Proxy uses an Object Manager component to construct remote objects. A component called Synchronizer receives the values of reference parameters and the return value from remote methods. All the inter-component communications are handled by a connector component, which is based on ajavaSymphony infrastructure.

S.a. Edwards - One of the best experts on this subject based on the ideXlab platform.

  • Compiling Concurrent Languages for Sequential Processors
    2020
    Co-Authors: S.a. Edwards
    Abstract:

    Embedded systems often include a traditional processor capable of executing Sequential Code, but both control and data-dominated tasks are often more naturally expressed using one of the many domain-specific concurrent specification languages. This paper surveys a variety of techniques for translating these concurrent specifications into Sequential Code. The techniques address compiling a wide variety of languages, ranging from dataflow to Petri nets. Each uses a different technique, to some degree chosen to match the semantics of concurrent language. Each technique is considered to consist of a partial evaluator operating on an interpreter. This combination provides a clearer picture of how parts of each technique could be used in a different setting.

  • LCTES - Generating fast Code from concurrent program dependence graphs
    Proceedings of the 2004 ACM SIGPLAN SIGBED conference on Languages compilers and tools - LCTES '04, 2004
    Co-Authors: Jia Zeng, Cristian Soviani, S.a. Edwards
    Abstract:

    While concurrency in embedded systems is most often supplied by real-time operating systems, this approach can be unpredictable and difficult to debug. Synchronous concurrency, in which a system marches in lockstep to a global clock, is conceptually easier and potentially more efficient because it can be statically scheduled beforehand.We present an algorithm for generating efficient Sequential Code from such synchronous concurrent specifications. Starting from a concurrent program dependence graph generated from the synchronous, concurrent language Esterel, we generate efficient, statically scheduled Sequential Code while adding a minimal amount of runtime scheduling overhead.Experimentally, we obtain speedups as high as six times over existing techniques. While we applied our technique to Esterel, it should be applicable to other synchronous, concurrent languages.

  • Tutorial: Compiling concurrent languages for Sequential processors
    ACM Transactions on Design Automation of Electronic Systems, 2003
    Co-Authors: S.a. Edwards
    Abstract:

    Embedded systems often include a traditional processor capable of executing Sequential Code, but both control and data-dominated tasks are often more naturally expressed using one of the many domain-specific concurrent specification languages. This article surveys a variety of techniques for translating these concurrent specifications into Sequential Code. The techniques address compiling a wide variety of languages, ranging from dataflow to Petri nets. Each uses a different method, to some degree chosen to match the semantics of concurrent language. Each technique is considered to consist of a partial evaluator operating on an interpreter. This combination provides a clearer picture of how parts of each technique could be used in a different setting.

  • compiling esterel into Sequential Code
    Design Automation Conference, 2000
    Co-Authors: S.a. Edwards
    Abstract:

    Embedded real-time software systems often need fine-grained parallelism and precise control over time, things typical real-time operating systems do not provide. The Esterel language has both, but Existing compilers produce slow Code for large programs. This paper presents the first Esterel compiler able to produce small, fast Code for large programs. It can produce Code half the size and up to a hundred times faster than Code from existing compilers. Esterel's semantics allow the compiler to statically schedule concurrency and synthesize Code that efficiently and predictably simulates context switches. The main contribution is an algorithm that synthesizes an efficient Sequential program from the concurrent control-flow graph used as an intermediate representation. These techniques could be applied to any language with fine-grained parallelism.

  • DAC - Compiling Esterel into Sequential Code
    Proceedings of the 37th conference on Design automation - DAC '00, 2000
    Co-Authors: S.a. Edwards
    Abstract:

    Embedded real-time software systems often need fine-grained parallelism and precise control over time, things typical real-time operating systems do not provide. The Esterel language has both, but Existing compilers produce slow Code for large programs. This paper presents the first Esterel compiler able to produce small, fast Code for large programs. It can produce Code half the size and up to a hundred times faster than Code from existing compilers. Esterel's semantics allow the compiler to statically schedule concurrency and synthesize Code that efficiently and predictably simulates context switches. The main contribution is an algorithm that synthesizes an efficient Sequential program from the concurrent control-flow graph used as an intermediate representation. These techniques could be applied to any language with fine-grained parallelism.

J. Manzano - One of the best experts on this subject based on the ideXlab platform.

  • De-pipeline a software-pipelined loop
    2003 IEEE International Conference on Acoustics Speech and Signal Processing 2003. Proceedings. (ICASSP '03)., 2003
    Co-Authors: Bogong Su, Jian Wang, Erh-wen Hu, J. Manzano
    Abstract:

    Software pipelining is a loop optimization technique that has been widely implemented in modem optimizing compilers. In order to utilize fully the instruction level parallelism of the recent VLIW DSP processors, DSP programs have to be optimized by software pipelining. However, because of the transformation of the original Sequential Code, a software-pipelined loop is often difficult to understand, test, and debug. It is also very difficult to reuse and port a software-pipelined loop to other processors, especially when the original Sequential Code is unavailable. We propose a de-pipelining technique, which converts the optimized assembly Code of a software-pipelined loop back to a semantically equivalent Sequential counterpart. Preliminary experiments on 20 assembly programs verifies the validity of the proposed de-pipelining algorithm.

  • ICASSP (2) - De-pipeline a software-pipelined loop
    2003 IEEE International Conference on Acoustics Speech and Signal Processing 2003. Proceedings. (ICASSP '03)., 2003
    Co-Authors: Bogong Su, Jian Wang, Erh-wen Hu, J. Manzano
    Abstract:

    Software pipelining is a loop optimization technique that has been widely implemented in modem optimizing compilers. In order to utilize fully the instruction level parallelism of the recent VLIW DSP processors, DSP programs have to be optimized by software pipelining. However, because of the transformation of the original Sequential Code, a software-pipelined loop is often difficult to understand, test, and debug. It is also very difficult to reuse and port a software-pipelined loop to other processors, especially when the original Sequential Code is unavailable. We propose a de-pipelining technique, which converts the optimized assembly Code of a software-pipelined loop back to a semantically equivalent Sequential counterpart. Preliminary experiments on 20 assembly programs verifies the validity of the proposed de-pipelining algorithm.

Bogong Su - One of the best experts on this subject based on the ideXlab platform.

  • De-pipeline a software-pipelined loop
    2003 IEEE International Conference on Acoustics Speech and Signal Processing 2003. Proceedings. (ICASSP '03)., 2003
    Co-Authors: Bogong Su, Jian Wang, Erh-wen Hu, J. Manzano
    Abstract:

    Software pipelining is a loop optimization technique that has been widely implemented in modem optimizing compilers. In order to utilize fully the instruction level parallelism of the recent VLIW DSP processors, DSP programs have to be optimized by software pipelining. However, because of the transformation of the original Sequential Code, a software-pipelined loop is often difficult to understand, test, and debug. It is also very difficult to reuse and port a software-pipelined loop to other processors, especially when the original Sequential Code is unavailable. We propose a de-pipelining technique, which converts the optimized assembly Code of a software-pipelined loop back to a semantically equivalent Sequential counterpart. Preliminary experiments on 20 assembly programs verifies the validity of the proposed de-pipelining algorithm.

  • ICASSP (2) - De-pipeline a software-pipelined loop
    2003 IEEE International Conference on Acoustics Speech and Signal Processing 2003. Proceedings. (ICASSP '03)., 2003
    Co-Authors: Bogong Su, Jian Wang, Erh-wen Hu, J. Manzano
    Abstract:

    Software pipelining is a loop optimization technique that has been widely implemented in modem optimizing compilers. In order to utilize fully the instruction level parallelism of the recent VLIW DSP processors, DSP programs have to be optimized by software pipelining. However, because of the transformation of the original Sequential Code, a software-pipelined loop is often difficult to understand, test, and debug. It is also very difficult to reuse and port a software-pipelined loop to other processors, especially when the original Sequential Code is unavailable. We propose a de-pipelining technique, which converts the optimized assembly Code of a software-pipelined loop back to a semantically equivalent Sequential counterpart. Preliminary experiments on 20 assembly programs verifies the validity of the proposed de-pipelining algorithm.

Siamak Najjar Karimi - One of the best experts on this subject based on the ideXlab platform.

  • ISPA - Semi-automatic Transformation of Sequential Code to Distributed Code Using Model Driven Architecture Approach
    2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009
    Co-Authors: Siamak Najjar Karimi, Saeed Parsa
    Abstract:

    In this paper, a Model Driven Architecture (MDA) approach is applied to Semi-automatically translate Sequential programs into corresponding distributed Code. The novelty of our work is the use of MDA in the process of translating serial into distributed Code. The transformation comprises automatic generation of platform independent and then platform specific models from the Sequential Code. In order to generate the PIM, a meta-model defining the overall architecture of the resultant distributed Code is developed. The meta-model is used as a basis for the development of platform independent models (PIM) for the resultant distributed Code. A set of transformation rules are defined to transform the resulted PIM into a corresponding platform-specific model. These transformation rules can be modified by the user, depending on the details of the underlying middle-ware applied for the distribution. The platform independent model provides a better understanding of the distributed Code and helps the programmer to modify the Code more easily.

  • Semi-automatic Transformation of Sequential Code to Distributed Code Using Model Driven Architecture Approach
    2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009
    Co-Authors: Siamak Najjar Karimi, Saeed Parsa
    Abstract:

    In this paper, a model driven architecture (MDA) approach is applied to Semi-automatically translate Sequential programs into corresponding distributed Code. The novelty of our work is the use of MDA in the process of translating serial into distributed Code. The transformation comprises automatic generation of platform independent and then platform specific models from the Sequential Code. In order to generate the PIM, a meta-model defining the overall architecture of the resultant distributed Code is developed. The meta-model is used as a basis for the development of platform independent models (PIM) for the resultant distributed Code. A set of transformation rules are defined to transform the resulted PIM into a corresponding platform-specific model. These transformation rules can be modified by the user, depending on the details of the underlying middle-ware applied for the distribution. The platform independent model provides a better understanding of the distributed Code and helps the programmer to modify the Code more easily.