The Experts below are selected from a list of 309 Experts worldwide ranked by ideXlab platform
M. J. Griffin - One of the best experts on this subject based on the ideXlab platform.
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EChOSim: The Exoplanet Characterisation Observatory Software Simulator
Experimental Astronomy, 2015Co-Authors: E. Pascale, I. P. Waldmann, C. J. Mactavish, A. Papageorgiou, A. Amaral-rogers, R. Varley, V. Coudé Du Foresto, M. J. Griffin, M. Ollivier, S. SarkarAbstract:EChOSim is the end-to-end time-domain Simulator of the Exoplanet Characterisation Observatory (EChO) space mission. EChOSim has been developed to assess the capability of the EChO mission concept to detect and characterise the atmospheres of transiting exoplanets. Here we discuss the details of the EChOSim implementation and describe the models used to represent the instrument and to simulate the detection. Software Simulators have assumed a central role in the design of new instrumentation and in assessing the level of systematics affecting the measurements of existing experiments. Thanks to its high modularity, EChOSim can simulate basic aspects of several existing and proposed spectrometers including instruments on the Hubble Space Telescope and Spitzer, ground-based and balloon-borne experiments. A discussion of different uses of EChOSim is given, including examples of simulations performed to assess the EChO mission.
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EChOSim: The Exoplanet Characterisation Observatory Software Simulator
Experimental Astronomy, 2015Co-Authors: E. Pascale, C. J. Mactavish, A. Papageorgiou, A. Amaral-rogers, R. Varley, M. J. Griffin, M. Ollivier, Ingo Waldmann, V. Coudé De Foresto, S. SarkarAbstract:EChOSim is the end-to-end time-domain Simulator of the Exoplanet Characterisation Observatory (EChO) space mission. EChOSim has been developed to assess the capability EChO has to detect and characterize the atmospheres of transiting exoplanets, and through this revolutionize the knowledge we have of the Milky Way and of our place in the Galaxy. Here we discuss the details of the EChOSim implementation and describe the models used to represent the instrument and to simulate the detection. Software Simulators have assumed a central role in the design of new instrumentation and in assessing the level of systematics affecting the measurements of existing experiments. Thanks to its high modularity, EChOSim can simulate basic aspects of several existing and proposed spectrometers for exoplanet transits, including instruments on the Hubble Space Telescope and Spitzer, or ground-based and balloon borne experiments. A discussion of different uses of EChOSim is given, including examples of simulations performed to assess the EChO mission.
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SPS: a Software Simulator for the Herschel-SPIRE photometer
Astronomy & Astrophysics, 2009Co-Authors: B. Sibthorpe, Pierre Chanial, M. J. GriffinAbstract:Aims. Instrument Simulators are becoming ever more useful for planning and analysing large astronomy survey data. In this paper we present a Simulator for the Herschel-SPIRE photometer. We describe the models it uses and the form of the input and output data. Methods. The SPIRE photometer Simulator is a Software package which uses theoretical models, along with flight model test data, to perform numerical simulations of the output time-lines from the instrument in operation on board the Herschel space observatory. Results. A description of the types of uses of the Simulator are given, along with information on its past uses. These include example simulations performed in preparation for a high redshift galaxy survey, and a debris disc survey. These are presented as a demonstration of the sort of outputs the Simulator is capable of producing.
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sps a Software Simulator for the herschel spire photometer
arXiv: Instrumentation and Methods for Astrophysics, 2009Co-Authors: B. Sibthorpe, Pierre Chanial, M. J. GriffinAbstract:Instrument Simulators are becoming ever more useful for planning and analysing large astronomy survey data. In this paper we present a Simulator for the Herschel-SPIRE photometer. We describe the models it uses and the form of the input and output data. The SPIRE photometer Simulator is a Software package which uses theoretical models, along with flight model test data, to perform numerical simulations of the output time-lines from the instrument in operation on board the Herschel space observatory. A description of the types of uses of the Simulator are given, along with information on its past uses. These include example simulations performed in preparation for a high redshift galaxy survey, and a debris disc survey. These are presented as a demonstration of the sort of outputs the Simulator is capable of producing.
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A Software Simulator for the Herschel-SPIRE imaging photometer
Optical Infrared and Millimeter Space Telescopes, 2004Co-Authors: B. Sibthorpe, M. J. Griffin, Adam Woodcraft, Steven Lloyd WatkinAbstract:SPIRE, the Spectral and Photometric Imaging Receiver, is one of three instruments to be flown on ESA's Herschel Space Observatory. It contains a three-band submillimetre camera and an imaging Fourier transform spectrometer, and uses arrays of feedhorn-coupled bolometric detectors operating at a temperature of 300 mK. Detailed Software Simulators are being developed for the SPIRE photometer and spectrometer. The photometer Simulator is based on an adaptable modular representation of the relevant instrument and telescope subsystems, and is designed to produce highly realistic science and housekeeping data timelines. It will be used for a variety of purposes, including instrument characterisation during ground testing and in orbit, testing and optimisation of operating modes and strategies, evaluation of data reduction Software using simulated data streams (derived by "observing" a simulated sky intensity distribution with the Simulator), observing time estimation, and diagnostics of instrument systematics. In this paper we present the current status of the photometer Simulator and the future development and implementation strategy.
Liu Ming-ye - One of the best experts on this subject based on the ideXlab platform.
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Realization of RTOS Software Simulator in Co-simulation Environment
Computer Engineering, 2004Co-Authors: Liu Ming-yeAbstract:This paper presents a fast Software Simulator, RTOS Software Co-Simulator, and show how to validate designed system with it. In RTOS co-Simulator model, RTOS is extended, and hardware Simulator driver is used to build connection with VHDL/VerilogHDL Simulator. At the end of this paper, it presents some examples to show how to build RTOS co-simulating environment and how RTOS Software Simulator works.
Ioannis Papaefstathiou - One of the best experts on this subject based on the ideXlab platform.
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Accelerating Emulation and Providing Full Chip Observability and Controllability at Run-Time
IEEE Design & Test, 2013Co-Authors: Iakovos Mavroidis, Ioannis Mavroidis, Ioannis PapaefstathiouAbstract:Performing hardware emulation on FPGAs is a significantly faster and more accurate approach for the verification of complex designs than Software simulation. Therefore, hardware Simulation Accelerator and Emulator co-processor units are used to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and the hardware emulator is becoming a new critical bottleneck. Moreover, in a hardware emulation environment it is impossible to bring outside of the chip a large number of internal signals for verification purposes. Therefore, on-chip observability has become a significant issue. In our work we tackle both aforementioned problems. First, we deploy a novel emulation framework that automatically transforms into synthesizable code certain HDL parts of the testbench, in order to offload them from the Software Simulator and, more importantly, minimize the aforementioned communication overhead. Next, we extend this architecture by adding multiple fast scan-chain paths in the design in order to provide full circuit observability and controllability on the fly. In this paper, we briefly describe our approach for reducing the communication overhead problem, and present, for the first time, our complete innovative system which offers extensive observability and controllability in complex Design Under Tests (DUTs).
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FPT - Accelerating hardware simulation: Testbench code emulation
2008 International Conference on Field-Programmable Technology, 2008Co-Authors: Iakovos Mavroidis, Ioannis PapaefstathiouAbstract:Todaypsilas verification challenges require high-performance simulation solutions, such as hardware simulation accelerators and emulators, that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and the hardware emulator is becoming a new critical bottleneck. In our work we introduce a novel way of repartitioning the simulation between Software and hardware in order to minimize this communication bottleneck. Using the techniques described in this paper we are able to offload a big part of the work that is traditionally done by the Software Simulator, onto the hardware emulator. Our experiments, using real-world designs, demonstrate that the proposed method reduces significantly the communication overhead and outperforms the conventional hardware emulation systems by a factor of more than 7. Finally, we provide a way of observing and modifying the internal state of the hardware emulator while the test is running.
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DATE - Efficient testbench code synthesis for a hardware emulator system
2007 Design Automation & Test in Europe Conference & Exhibition, 2007Co-Authors: Iakovos Mavroidis, Ioannis PapaefstathiouAbstract:The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and Software developers, leading to the "design verification crisis", as it is known among engineers. Today's verification challenges require powerful testbenches and high-performance simulation solutions such as Hardware Simulation Accelerators and Hardware Emulators that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and hardware emulator is becoming a new critical bottleneck. We tackle this problem by partitioning the code running on the Software Simulator into two sections: the testbench HDL (Hardware Description Language) code that communicates directly with the Design Under Test (DUT) and the rest C-like testbench code. The former section is transformed into synthesizable code while the latter runs in a general purpose CPU. Our experiments demonstrate that the proposed method reduces the communication overhead by a factor of about 5 compared to a conventional hardware emulated simulation.
B. Sibthorpe - One of the best experts on this subject based on the ideXlab platform.
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SPS: a Software Simulator for the Herschel-SPIRE photometer
Astronomy & Astrophysics, 2009Co-Authors: B. Sibthorpe, Pierre Chanial, M. J. GriffinAbstract:Aims. Instrument Simulators are becoming ever more useful for planning and analysing large astronomy survey data. In this paper we present a Simulator for the Herschel-SPIRE photometer. We describe the models it uses and the form of the input and output data. Methods. The SPIRE photometer Simulator is a Software package which uses theoretical models, along with flight model test data, to perform numerical simulations of the output time-lines from the instrument in operation on board the Herschel space observatory. Results. A description of the types of uses of the Simulator are given, along with information on its past uses. These include example simulations performed in preparation for a high redshift galaxy survey, and a debris disc survey. These are presented as a demonstration of the sort of outputs the Simulator is capable of producing.
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sps a Software Simulator for the herschel spire photometer
arXiv: Instrumentation and Methods for Astrophysics, 2009Co-Authors: B. Sibthorpe, Pierre Chanial, M. J. GriffinAbstract:Instrument Simulators are becoming ever more useful for planning and analysing large astronomy survey data. In this paper we present a Simulator for the Herschel-SPIRE photometer. We describe the models it uses and the form of the input and output data. The SPIRE photometer Simulator is a Software package which uses theoretical models, along with flight model test data, to perform numerical simulations of the output time-lines from the instrument in operation on board the Herschel space observatory. A description of the types of uses of the Simulator are given, along with information on its past uses. These include example simulations performed in preparation for a high redshift galaxy survey, and a debris disc survey. These are presented as a demonstration of the sort of outputs the Simulator is capable of producing.
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A Software Simulator for the Herschel-SPIRE imaging photometer
Optical Infrared and Millimeter Space Telescopes, 2004Co-Authors: B. Sibthorpe, M. J. Griffin, Adam Woodcraft, Steven Lloyd WatkinAbstract:SPIRE, the Spectral and Photometric Imaging Receiver, is one of three instruments to be flown on ESA's Herschel Space Observatory. It contains a three-band submillimetre camera and an imaging Fourier transform spectrometer, and uses arrays of feedhorn-coupled bolometric detectors operating at a temperature of 300 mK. Detailed Software Simulators are being developed for the SPIRE photometer and spectrometer. The photometer Simulator is based on an adaptable modular representation of the relevant instrument and telescope subsystems, and is designed to produce highly realistic science and housekeeping data timelines. It will be used for a variety of purposes, including instrument characterisation during ground testing and in orbit, testing and optimisation of operating modes and strategies, evaluation of data reduction Software using simulated data streams (derived by "observing" a simulated sky intensity distribution with the Simulator), observing time estimation, and diagnostics of instrument systematics. In this paper we present the current status of the photometer Simulator and the future development and implementation strategy.
Iakovos Mavroidis - One of the best experts on this subject based on the ideXlab platform.
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Accelerating Emulation and Providing Full Chip Observability and Controllability at Run-Time
IEEE Design & Test, 2013Co-Authors: Iakovos Mavroidis, Ioannis Mavroidis, Ioannis PapaefstathiouAbstract:Performing hardware emulation on FPGAs is a significantly faster and more accurate approach for the verification of complex designs than Software simulation. Therefore, hardware Simulation Accelerator and Emulator co-processor units are used to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and the hardware emulator is becoming a new critical bottleneck. Moreover, in a hardware emulation environment it is impossible to bring outside of the chip a large number of internal signals for verification purposes. Therefore, on-chip observability has become a significant issue. In our work we tackle both aforementioned problems. First, we deploy a novel emulation framework that automatically transforms into synthesizable code certain HDL parts of the testbench, in order to offload them from the Software Simulator and, more importantly, minimize the aforementioned communication overhead. Next, we extend this architecture by adding multiple fast scan-chain paths in the design in order to provide full circuit observability and controllability on the fly. In this paper, we briefly describe our approach for reducing the communication overhead problem, and present, for the first time, our complete innovative system which offers extensive observability and controllability in complex Design Under Tests (DUTs).
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FPT - Accelerating hardware simulation: Testbench code emulation
2008 International Conference on Field-Programmable Technology, 2008Co-Authors: Iakovos Mavroidis, Ioannis PapaefstathiouAbstract:Todaypsilas verification challenges require high-performance simulation solutions, such as hardware simulation accelerators and emulators, that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and the hardware emulator is becoming a new critical bottleneck. In our work we introduce a novel way of repartitioning the simulation between Software and hardware in order to minimize this communication bottleneck. Using the techniques described in this paper we are able to offload a big part of the work that is traditionally done by the Software Simulator, onto the hardware emulator. Our experiments, using real-world designs, demonstrate that the proposed method reduces significantly the communication overhead and outperforms the conventional hardware emulation systems by a factor of more than 7. Finally, we provide a way of observing and modifying the internal state of the hardware emulator while the test is running.
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DATE - Efficient testbench code synthesis for a hardware emulator system
2007 Design Automation & Test in Europe Conference & Exhibition, 2007Co-Authors: Iakovos Mavroidis, Ioannis PapaefstathiouAbstract:The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and Software developers, leading to the "design verification crisis", as it is known among engineers. Today's verification challenges require powerful testbenches and high-performance simulation solutions such as Hardware Simulation Accelerators and Hardware Emulators that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the Software Simulator. However, the communication overhead between the Software Simulator and hardware emulator is becoming a new critical bottleneck. We tackle this problem by partitioning the code running on the Software Simulator into two sections: the testbench HDL (Hardware Description Language) code that communicates directly with the Design Under Test (DUT) and the rest C-like testbench code. The former section is transformed into synthesizable code while the latter runs in a general purpose CPU. Our experiments demonstrate that the proposed method reduces the communication overhead by a factor of about 5 compared to a conventional hardware emulated simulation.
